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LibX86: Add OP_regW_immW

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This is a variation of OP_reg32_imm32 that turns into
"OP_reg64_imm64" with a REX.W prefix.
This commit is contained in:
Simon Wanner 2022-03-27 19:40:52 +02:00 committed by Andreas Kling
parent bf768ed215
commit 4041ea835c
Notes: sideshowbarker 2024-07-17 04:02:01 +09:00 
Author: https://github.com/skyrising
Commit: https://github.com/SerenityOS/serenity/commit/4041ea835c
Pull-request: https://github.com/SerenityOS/serenity/pull/15465
Reviewed-by: https://github.com/ADKaster ✅
Reviewed-by: https://github.com/Hendiadyoin1
2 changed files with 25 additions and 7 deletions
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30
Userland/Libraries/LibX86/Instruction.cpp
View file

@ -90,6 +90,9 @@ static void build(InstructionDescriptor* table, u8 op, char const* mnemonic, Ins
case OP_relimm32:
d.imm1_bytes = 4;
break;
case OP_regW_immW:
d.imm1_bytes = CurrentOperandSize;
break;
case OP_imm16_imm8:
d.imm1_bytes = 2;
d.imm2_bytes = 1;
@ -1666,13 +1669,20 @@ void Instruction::to_string_internal(StringBuilder& builder, u32 origin, SymbolP
auto append_fpu_rm32 = [&] { builder.append(m_modrm.to_string_fpu32(*this)); };
auto append_fpu_rm64 = [&] { builder.append(m_modrm.to_string_fpu64(*this)); };
auto append_fpu_rm80 = [&] { builder.append(m_modrm.to_string_fpu80(*this)); };
auto append_imm8 = [&] { builder.appendff("{:#x}", imm8()); };
auto append_imm8_2 = [&] { builder.appendff("{:#x}", imm8_2()); };
auto append_imm16 = [&] { builder.appendff("{:#x}", imm16()); };
auto append_imm16_1 = [&] { builder.appendff("{:#x}", imm16_1()); };
auto append_imm16_2 = [&] { builder.appendff("{:#x}", imm16_2()); };
auto append_imm32 = [&] { builder.appendff("{:#x}", imm32()); };
auto append_imm32_2 = [&] { builder.appendff("{:#x}", imm32_2()); };
auto append_imm8 = [&] { builder.appendff("{:#02x}", imm8()); };
auto append_imm8_2 = [&] { builder.appendff("{:#02x}", imm8_2()); };
auto append_imm16 = [&] { builder.appendff("{:#04x}", imm16()); };
auto append_imm16_1 = [&] { builder.appendff("{:#04x}", imm16_1()); };
auto append_imm16_2 = [&] { builder.appendff("{:#04x}", imm16_2()); };
auto append_imm32 = [&] { builder.appendff("{:#08x}", imm32()); };
auto append_imm32_2 = [&] { builder.appendff("{:#08x}", imm32_2()); };
auto append_imm64 = [&] { builder.appendff("{:#016x}", imm64()); };
auto append_immW = [&] {
if (m_operand_size == OperandSize::Size64)
append_imm64();
else
append_imm32();
};
auto append_reg8 = [&] { builder.append(reg8_name()); };
auto append_reg16 = [&] { builder.append(reg16_name()); };
auto append_reg32 = [&] { builder.append(reg32_name()); };
@ -1929,6 +1939,12 @@ void Instruction::to_string_internal(StringBuilder& builder, u32 origin, SymbolP
append(',');
append_imm32();
break;
case OP_regW_immW:
append_mnemonic_space();
append_reg32();
append(", "sv);
append_immW();
break;
case OP_RM8_1:
append_mnemonic_space();
append_rm8();

2
Userland/Libraries/LibX86/Instruction.h
View file

@ -160,6 +160,7 @@ enum InstructionFormat {
__EndFormatsWithRMByte,
OP_reg32_imm32,
OP_regW_immW,
OP_AL_imm8,
OP_AX_imm16,
OP_EAX_imm32,
@ -210,6 +211,7 @@ enum InstructionFormat {
};
static constexpr unsigned CurrentAddressSize = 0xB33FBABE;
static constexpr unsigned CurrentOperandSize = 0xB33FB00F;
struct InstructionDescriptor {
InstructionHandler handler { nullptr };