From 4041ea835ce67c81c5eca15d2d0a2878b179ed59 Mon Sep 17 00:00:00 2001
From: Simon Wanner <skyrising@pvpctutorials.de>
Date: Sun, 27 Mar 2022 19:40:52 +0200
Subject: [PATCH] LibX86: Add OP_regW_immW

This is a variation of OP_reg32_imm32 that turns into
"OP_reg64_imm64" with a REX.W prefix.
---
 Userland/Libraries/LibX86/Instruction.cpp | 30 +++++++++++++++++------
 Userland/Libraries/LibX86/Instruction.h   |  2 ++
 2 files changed, 25 insertions(+), 7 deletions(-)

diff --git a/Userland/Libraries/LibX86/Instruction.cpp b/Userland/Libraries/LibX86/Instruction.cpp
index e6d777446d7..f0a5e4bd169 100644
--- a/Userland/Libraries/LibX86/Instruction.cpp
+++ b/Userland/Libraries/LibX86/Instruction.cpp
@@ -90,6 +90,9 @@ static void build(InstructionDescriptor* table, u8 op, char const* mnemonic, Ins
     case OP_relimm32:
         d.imm1_bytes = 4;
         break;
+    case OP_regW_immW:
+        d.imm1_bytes = CurrentOperandSize;
+        break;
     case OP_imm16_imm8:
         d.imm1_bytes = 2;
         d.imm2_bytes = 1;
@@ -1666,13 +1669,20 @@ void Instruction::to_string_internal(StringBuilder& builder, u32 origin, SymbolP
     auto append_fpu_rm32 = [&] { builder.append(m_modrm.to_string_fpu32(*this)); };
     auto append_fpu_rm64 = [&] { builder.append(m_modrm.to_string_fpu64(*this)); };
     auto append_fpu_rm80 = [&] { builder.append(m_modrm.to_string_fpu80(*this)); };
-    auto append_imm8 = [&] { builder.appendff("{:#x}", imm8()); };
-    auto append_imm8_2 = [&] { builder.appendff("{:#x}", imm8_2()); };
-    auto append_imm16 = [&] { builder.appendff("{:#x}", imm16()); };
-    auto append_imm16_1 = [&] { builder.appendff("{:#x}", imm16_1()); };
-    auto append_imm16_2 = [&] { builder.appendff("{:#x}", imm16_2()); };
-    auto append_imm32 = [&] { builder.appendff("{:#x}", imm32()); };
-    auto append_imm32_2 = [&] { builder.appendff("{:#x}", imm32_2()); };
+    auto append_imm8 = [&] { builder.appendff("{:#02x}", imm8()); };
+    auto append_imm8_2 = [&] { builder.appendff("{:#02x}", imm8_2()); };
+    auto append_imm16 = [&] { builder.appendff("{:#04x}", imm16()); };
+    auto append_imm16_1 = [&] { builder.appendff("{:#04x}", imm16_1()); };
+    auto append_imm16_2 = [&] { builder.appendff("{:#04x}", imm16_2()); };
+    auto append_imm32 = [&] { builder.appendff("{:#08x}", imm32()); };
+    auto append_imm32_2 = [&] { builder.appendff("{:#08x}", imm32_2()); };
+    auto append_imm64 = [&] { builder.appendff("{:#016x}", imm64()); };
+    auto append_immW = [&] {
+        if (m_operand_size == OperandSize::Size64)
+            append_imm64();
+        else
+            append_imm32();
+    };
     auto append_reg8 = [&] { builder.append(reg8_name()); };
     auto append_reg16 = [&] { builder.append(reg16_name()); };
     auto append_reg32 = [&] { builder.append(reg32_name()); };
@@ -1929,6 +1939,12 @@ void Instruction::to_string_internal(StringBuilder& builder, u32 origin, SymbolP
         append(',');
         append_imm32();
         break;
+    case OP_regW_immW:
+        append_mnemonic_space();
+        append_reg32();
+        append(", "sv);
+        append_immW();
+        break;
     case OP_RM8_1:
         append_mnemonic_space();
         append_rm8();
diff --git a/Userland/Libraries/LibX86/Instruction.h b/Userland/Libraries/LibX86/Instruction.h
index c8f65cf97ef..547a2e6c48b 100644
--- a/Userland/Libraries/LibX86/Instruction.h
+++ b/Userland/Libraries/LibX86/Instruction.h
@@ -160,6 +160,7 @@ enum InstructionFormat {
     __EndFormatsWithRMByte,
 
     OP_reg32_imm32,
+    OP_regW_immW,
     OP_AL_imm8,
     OP_AX_imm16,
     OP_EAX_imm32,
@@ -210,6 +211,7 @@ enum InstructionFormat {
 };
 
 static constexpr unsigned CurrentAddressSize = 0xB33FBABE;
+static constexpr unsigned CurrentOperandSize = 0xB33FB00F;
 
 struct InstructionDescriptor {
     InstructionHandler handler { nullptr };