825 lines
20 KiB
C
825 lines
20 KiB
C
/*
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* AD5933 AD5934 Impedance Converter, Network Analyzer
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*
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* Copyright 2011 Analog Devices Inc.
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*
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* Licensed under the GPL-2.
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*/
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#include <linux/interrupt.h>
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#include <linux/device.h>
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#include <linux/kernel.h>
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#include <linux/sysfs.h>
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#include <linux/i2c.h>
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#include <linux/regulator/consumer.h>
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#include <linux/types.h>
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#include <linux/err.h>
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#include <linux/delay.h>
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#include <linux/module.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/sysfs.h>
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#include <linux/iio/buffer.h>
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#include <linux/iio/kfifo_buf.h>
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/* AD5933/AD5934 Registers */
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#define AD5933_REG_CONTROL_HB 0x80 /* R/W, 1 byte */
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#define AD5933_REG_CONTROL_LB 0x81 /* R/W, 1 byte */
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#define AD5933_REG_FREQ_START 0x82 /* R/W, 3 bytes */
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#define AD5933_REG_FREQ_INC 0x85 /* R/W, 3 bytes */
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#define AD5933_REG_INC_NUM 0x88 /* R/W, 2 bytes, 9 bit */
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#define AD5933_REG_SETTLING_CYCLES 0x8A /* R/W, 2 bytes */
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#define AD5933_REG_STATUS 0x8F /* R, 1 byte */
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#define AD5933_REG_TEMP_DATA 0x92 /* R, 2 bytes*/
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#define AD5933_REG_REAL_DATA 0x94 /* R, 2 bytes*/
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#define AD5933_REG_IMAG_DATA 0x96 /* R, 2 bytes*/
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/* AD5933_REG_CONTROL_HB Bits */
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#define AD5933_CTRL_INIT_START_FREQ (0x1 << 4)
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#define AD5933_CTRL_START_SWEEP (0x2 << 4)
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#define AD5933_CTRL_INC_FREQ (0x3 << 4)
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#define AD5933_CTRL_REPEAT_FREQ (0x4 << 4)
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#define AD5933_CTRL_MEASURE_TEMP (0x9 << 4)
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#define AD5933_CTRL_POWER_DOWN (0xA << 4)
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#define AD5933_CTRL_STANDBY (0xB << 4)
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#define AD5933_CTRL_RANGE_2000mVpp (0x0 << 1)
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#define AD5933_CTRL_RANGE_200mVpp (0x1 << 1)
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#define AD5933_CTRL_RANGE_400mVpp (0x2 << 1)
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#define AD5933_CTRL_RANGE_1000mVpp (0x3 << 1)
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#define AD5933_CTRL_RANGE(x) ((x) << 1)
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#define AD5933_CTRL_PGA_GAIN_1 (0x1 << 0)
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#define AD5933_CTRL_PGA_GAIN_5 (0x0 << 0)
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/* AD5933_REG_CONTROL_LB Bits */
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#define AD5933_CTRL_RESET (0x1 << 4)
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#define AD5933_CTRL_INT_SYSCLK (0x0 << 3)
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#define AD5933_CTRL_EXT_SYSCLK (0x1 << 3)
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/* AD5933_REG_STATUS Bits */
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#define AD5933_STAT_TEMP_VALID (0x1 << 0)
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#define AD5933_STAT_DATA_VALID (0x1 << 1)
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#define AD5933_STAT_SWEEP_DONE (0x1 << 2)
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/* I2C Block Commands */
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#define AD5933_I2C_BLOCK_WRITE 0xA0
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#define AD5933_I2C_BLOCK_READ 0xA1
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#define AD5933_I2C_ADDR_POINTER 0xB0
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/* Device Specs */
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#define AD5933_INT_OSC_FREQ_Hz 16776000
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#define AD5933_MAX_OUTPUT_FREQ_Hz 100000
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#define AD5933_MAX_RETRIES 100
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#define AD5933_OUT_RANGE 1
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#define AD5933_OUT_RANGE_AVAIL 2
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#define AD5933_OUT_SETTLING_CYCLES 3
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#define AD5933_IN_PGA_GAIN 4
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#define AD5933_IN_PGA_GAIN_AVAIL 5
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#define AD5933_FREQ_POINTS 6
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#define AD5933_POLL_TIME_ms 10
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#define AD5933_INIT_EXCITATION_TIME_ms 100
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/**
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* struct ad5933_platform_data - platform specific data
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* @ext_clk_Hz: the external clock frequency in Hz, if not set
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* the driver uses the internal clock (16.776 MHz)
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* @vref_mv: the external reference voltage in millivolt
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*/
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struct ad5933_platform_data {
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unsigned long ext_clk_Hz;
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unsigned short vref_mv;
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};
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struct ad5933_state {
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struct i2c_client *client;
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struct regulator *reg;
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struct delayed_work work;
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struct mutex lock; /* Protect sensor state */
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unsigned long mclk_hz;
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unsigned char ctrl_hb;
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unsigned char ctrl_lb;
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unsigned int range_avail[4];
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unsigned short vref_mv;
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unsigned short settling_cycles;
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unsigned short freq_points;
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unsigned int freq_start;
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unsigned int freq_inc;
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unsigned int state;
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unsigned int poll_time_jiffies;
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};
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static struct ad5933_platform_data ad5933_default_pdata = {
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.vref_mv = 3300,
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};
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static const struct iio_chan_spec ad5933_channels[] = {
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{
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.type = IIO_TEMP,
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.indexed = 1,
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.channel = 0,
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
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BIT(IIO_CHAN_INFO_SCALE),
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.address = AD5933_REG_TEMP_DATA,
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.scan_index = -1,
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.scan_type = {
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.sign = 's',
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.realbits = 14,
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.storagebits = 16,
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},
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}, { /* Ring Channels */
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.type = IIO_VOLTAGE,
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.indexed = 1,
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.channel = 0,
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.extend_name = "real",
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.address = AD5933_REG_REAL_DATA,
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.scan_index = 0,
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.scan_type = {
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.sign = 's',
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.realbits = 16,
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.storagebits = 16,
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},
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}, {
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.type = IIO_VOLTAGE,
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.indexed = 1,
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.channel = 0,
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.extend_name = "imag",
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.address = AD5933_REG_IMAG_DATA,
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.scan_index = 1,
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.scan_type = {
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.sign = 's',
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.realbits = 16,
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.storagebits = 16,
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},
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},
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};
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static int ad5933_i2c_write(struct i2c_client *client, u8 reg, u8 len, u8 *data)
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{
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int ret;
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while (len--) {
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ret = i2c_smbus_write_byte_data(client, reg++, *data++);
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if (ret < 0) {
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dev_err(&client->dev, "I2C write error\n");
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return ret;
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}
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}
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return 0;
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}
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static int ad5933_i2c_read(struct i2c_client *client, u8 reg, u8 len, u8 *data)
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{
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int ret;
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while (len--) {
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ret = i2c_smbus_read_byte_data(client, reg++);
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if (ret < 0) {
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dev_err(&client->dev, "I2C read error\n");
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return ret;
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}
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*data++ = ret;
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}
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return 0;
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}
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static int ad5933_cmd(struct ad5933_state *st, unsigned char cmd)
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{
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unsigned char dat = st->ctrl_hb | cmd;
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return ad5933_i2c_write(st->client,
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AD5933_REG_CONTROL_HB, 1, &dat);
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}
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static int ad5933_reset(struct ad5933_state *st)
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{
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unsigned char dat = st->ctrl_lb | AD5933_CTRL_RESET;
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return ad5933_i2c_write(st->client,
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AD5933_REG_CONTROL_LB, 1, &dat);
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}
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static int ad5933_wait_busy(struct ad5933_state *st, unsigned char event)
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{
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unsigned char val, timeout = AD5933_MAX_RETRIES;
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int ret;
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while (timeout--) {
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ret = ad5933_i2c_read(st->client, AD5933_REG_STATUS, 1, &val);
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if (ret < 0)
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return ret;
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if (val & event)
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return val;
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cpu_relax();
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mdelay(1);
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}
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return -EAGAIN;
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}
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static int ad5933_set_freq(struct ad5933_state *st,
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unsigned int reg, unsigned long freq)
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{
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unsigned long long freqreg;
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union {
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__be32 d32;
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u8 d8[4];
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} dat;
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freqreg = (u64) freq * (u64) (1 << 27);
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do_div(freqreg, st->mclk_hz / 4);
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switch (reg) {
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case AD5933_REG_FREQ_START:
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st->freq_start = freq;
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break;
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case AD5933_REG_FREQ_INC:
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st->freq_inc = freq;
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break;
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default:
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return -EINVAL;
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}
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dat.d32 = cpu_to_be32(freqreg);
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return ad5933_i2c_write(st->client, reg, 3, &dat.d8[1]);
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}
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static int ad5933_setup(struct ad5933_state *st)
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{
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__be16 dat;
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int ret;
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ret = ad5933_reset(st);
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if (ret < 0)
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return ret;
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ret = ad5933_set_freq(st, AD5933_REG_FREQ_START, 10000);
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if (ret < 0)
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return ret;
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ret = ad5933_set_freq(st, AD5933_REG_FREQ_INC, 200);
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if (ret < 0)
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return ret;
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st->settling_cycles = 10;
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dat = cpu_to_be16(st->settling_cycles);
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ret = ad5933_i2c_write(st->client,
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AD5933_REG_SETTLING_CYCLES,
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2, (u8 *)&dat);
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if (ret < 0)
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return ret;
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st->freq_points = 100;
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dat = cpu_to_be16(st->freq_points);
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return ad5933_i2c_write(st->client, AD5933_REG_INC_NUM, 2, (u8 *)&dat);
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}
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static void ad5933_calc_out_ranges(struct ad5933_state *st)
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{
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int i;
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unsigned int normalized_3v3[4] = {1980, 198, 383, 970};
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for (i = 0; i < 4; i++)
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st->range_avail[i] = normalized_3v3[i] * st->vref_mv / 3300;
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}
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/*
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* handles: AD5933_REG_FREQ_START and AD5933_REG_FREQ_INC
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*/
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static ssize_t ad5933_show_frequency(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct iio_dev *indio_dev = dev_to_iio_dev(dev);
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struct ad5933_state *st = iio_priv(indio_dev);
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struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
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int ret;
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unsigned long long freqreg;
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union {
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__be32 d32;
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u8 d8[4];
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} dat;
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ret = iio_device_claim_direct_mode(indio_dev);
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if (ret)
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return ret;
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ret = ad5933_i2c_read(st->client, this_attr->address, 3, &dat.d8[1]);
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iio_device_release_direct_mode(indio_dev);
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if (ret < 0)
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return ret;
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freqreg = be32_to_cpu(dat.d32) & 0xFFFFFF;
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freqreg = (u64)freqreg * (u64)(st->mclk_hz / 4);
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do_div(freqreg, 1 << 27);
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return sprintf(buf, "%d\n", (int)freqreg);
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}
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static ssize_t ad5933_store_frequency(struct device *dev,
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struct device_attribute *attr,
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const char *buf,
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size_t len)
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{
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struct iio_dev *indio_dev = dev_to_iio_dev(dev);
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struct ad5933_state *st = iio_priv(indio_dev);
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struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
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unsigned long val;
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int ret;
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ret = kstrtoul(buf, 10, &val);
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if (ret)
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return ret;
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if (val > AD5933_MAX_OUTPUT_FREQ_Hz)
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return -EINVAL;
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ret = iio_device_claim_direct_mode(indio_dev);
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if (ret)
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return ret;
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ret = ad5933_set_freq(st, this_attr->address, val);
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iio_device_release_direct_mode(indio_dev);
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return ret ? ret : len;
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}
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static IIO_DEVICE_ATTR(out_voltage0_freq_start, 0644,
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ad5933_show_frequency,
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ad5933_store_frequency,
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AD5933_REG_FREQ_START);
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static IIO_DEVICE_ATTR(out_voltage0_freq_increment, 0644,
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ad5933_show_frequency,
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ad5933_store_frequency,
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AD5933_REG_FREQ_INC);
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static ssize_t ad5933_show(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct iio_dev *indio_dev = dev_to_iio_dev(dev);
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struct ad5933_state *st = iio_priv(indio_dev);
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struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
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int ret = 0, len = 0;
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mutex_lock(&st->lock);
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switch ((u32)this_attr->address) {
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case AD5933_OUT_RANGE:
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len = sprintf(buf, "%u\n",
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st->range_avail[(st->ctrl_hb >> 1) & 0x3]);
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break;
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case AD5933_OUT_RANGE_AVAIL:
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len = sprintf(buf, "%u %u %u %u\n", st->range_avail[0],
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st->range_avail[3], st->range_avail[2],
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st->range_avail[1]);
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break;
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case AD5933_OUT_SETTLING_CYCLES:
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len = sprintf(buf, "%d\n", st->settling_cycles);
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break;
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case AD5933_IN_PGA_GAIN:
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len = sprintf(buf, "%s\n",
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(st->ctrl_hb & AD5933_CTRL_PGA_GAIN_1) ?
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"1" : "0.2");
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break;
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case AD5933_IN_PGA_GAIN_AVAIL:
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len = sprintf(buf, "1 0.2\n");
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break;
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case AD5933_FREQ_POINTS:
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len = sprintf(buf, "%d\n", st->freq_points);
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break;
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default:
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ret = -EINVAL;
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}
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mutex_unlock(&st->lock);
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return ret ? ret : len;
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}
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static ssize_t ad5933_store(struct device *dev,
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struct device_attribute *attr,
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const char *buf,
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size_t len)
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{
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struct iio_dev *indio_dev = dev_to_iio_dev(dev);
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struct ad5933_state *st = iio_priv(indio_dev);
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struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
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u16 val;
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int i, ret = 0;
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__be16 dat;
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if (this_attr->address != AD5933_IN_PGA_GAIN) {
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ret = kstrtou16(buf, 10, &val);
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if (ret)
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return ret;
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}
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ret = iio_device_claim_direct_mode(indio_dev);
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if (ret)
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return ret;
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mutex_lock(&st->lock);
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switch ((u32)this_attr->address) {
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case AD5933_OUT_RANGE:
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ret = -EINVAL;
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for (i = 0; i < 4; i++)
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if (val == st->range_avail[i]) {
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st->ctrl_hb &= ~AD5933_CTRL_RANGE(0x3);
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st->ctrl_hb |= AD5933_CTRL_RANGE(i);
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ret = ad5933_cmd(st, 0);
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break;
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}
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break;
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case AD5933_IN_PGA_GAIN:
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if (sysfs_streq(buf, "1")) {
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st->ctrl_hb |= AD5933_CTRL_PGA_GAIN_1;
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} else if (sysfs_streq(buf, "0.2")) {
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st->ctrl_hb &= ~AD5933_CTRL_PGA_GAIN_1;
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} else {
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ret = -EINVAL;
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break;
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}
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ret = ad5933_cmd(st, 0);
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break;
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case AD5933_OUT_SETTLING_CYCLES:
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val = clamp(val, (u16)0, (u16)0x7FF);
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st->settling_cycles = val;
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/* 2x, 4x handling, see datasheet */
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if (val > 1022)
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val = (val >> 2) | (3 << 9);
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else if (val > 511)
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val = (val >> 1) | (1 << 9);
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dat = cpu_to_be16(val);
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ret = ad5933_i2c_write(st->client,
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AD5933_REG_SETTLING_CYCLES,
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2, (u8 *)&dat);
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break;
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case AD5933_FREQ_POINTS:
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val = clamp(val, (u16)0, (u16)511);
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st->freq_points = val;
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dat = cpu_to_be16(val);
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ret = ad5933_i2c_write(st->client, AD5933_REG_INC_NUM, 2,
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(u8 *)&dat);
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break;
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default:
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ret = -EINVAL;
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}
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mutex_unlock(&st->lock);
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iio_device_release_direct_mode(indio_dev);
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return ret ? ret : len;
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}
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static IIO_DEVICE_ATTR(out_voltage0_scale, 0644,
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ad5933_show,
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ad5933_store,
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AD5933_OUT_RANGE);
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static IIO_DEVICE_ATTR(out_voltage0_scale_available, 0444,
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ad5933_show,
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NULL,
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AD5933_OUT_RANGE_AVAIL);
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static IIO_DEVICE_ATTR(in_voltage0_scale, 0644,
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|
ad5933_show,
|
|
ad5933_store,
|
|
AD5933_IN_PGA_GAIN);
|
|
|
|
static IIO_DEVICE_ATTR(in_voltage0_scale_available, 0444,
|
|
ad5933_show,
|
|
NULL,
|
|
AD5933_IN_PGA_GAIN_AVAIL);
|
|
|
|
static IIO_DEVICE_ATTR(out_voltage0_freq_points, 0644,
|
|
ad5933_show,
|
|
ad5933_store,
|
|
AD5933_FREQ_POINTS);
|
|
|
|
static IIO_DEVICE_ATTR(out_voltage0_settling_cycles, 0644,
|
|
ad5933_show,
|
|
ad5933_store,
|
|
AD5933_OUT_SETTLING_CYCLES);
|
|
|
|
/* note:
|
|
* ideally we would handle the scale attributes via the iio_info
|
|
* (read|write)_raw methods, however this part is a untypical since we
|
|
* don't create dedicated sysfs channel attributes for out0 and in0.
|
|
*/
|
|
static struct attribute *ad5933_attributes[] = {
|
|
&iio_dev_attr_out_voltage0_scale.dev_attr.attr,
|
|
&iio_dev_attr_out_voltage0_scale_available.dev_attr.attr,
|
|
&iio_dev_attr_out_voltage0_freq_start.dev_attr.attr,
|
|
&iio_dev_attr_out_voltage0_freq_increment.dev_attr.attr,
|
|
&iio_dev_attr_out_voltage0_freq_points.dev_attr.attr,
|
|
&iio_dev_attr_out_voltage0_settling_cycles.dev_attr.attr,
|
|
&iio_dev_attr_in_voltage0_scale.dev_attr.attr,
|
|
&iio_dev_attr_in_voltage0_scale_available.dev_attr.attr,
|
|
NULL
|
|
};
|
|
|
|
static const struct attribute_group ad5933_attribute_group = {
|
|
.attrs = ad5933_attributes,
|
|
};
|
|
|
|
static int ad5933_read_raw(struct iio_dev *indio_dev,
|
|
struct iio_chan_spec const *chan,
|
|
int *val,
|
|
int *val2,
|
|
long m)
|
|
{
|
|
struct ad5933_state *st = iio_priv(indio_dev);
|
|
__be16 dat;
|
|
int ret;
|
|
|
|
switch (m) {
|
|
case IIO_CHAN_INFO_RAW:
|
|
ret = iio_device_claim_direct_mode(indio_dev);
|
|
if (ret)
|
|
return ret;
|
|
ret = ad5933_cmd(st, AD5933_CTRL_MEASURE_TEMP);
|
|
if (ret < 0)
|
|
goto out;
|
|
ret = ad5933_wait_busy(st, AD5933_STAT_TEMP_VALID);
|
|
if (ret < 0)
|
|
goto out;
|
|
|
|
ret = ad5933_i2c_read(st->client,
|
|
AD5933_REG_TEMP_DATA,
|
|
2, (u8 *)&dat);
|
|
if (ret < 0)
|
|
goto out;
|
|
iio_device_release_direct_mode(indio_dev);
|
|
*val = sign_extend32(be16_to_cpu(dat), 13);
|
|
|
|
return IIO_VAL_INT;
|
|
case IIO_CHAN_INFO_SCALE:
|
|
*val = 1000;
|
|
*val2 = 5;
|
|
return IIO_VAL_FRACTIONAL_LOG2;
|
|
}
|
|
|
|
return -EINVAL;
|
|
out:
|
|
iio_device_release_direct_mode(indio_dev);
|
|
return ret;
|
|
}
|
|
|
|
static const struct iio_info ad5933_info = {
|
|
.read_raw = ad5933_read_raw,
|
|
.attrs = &ad5933_attribute_group,
|
|
.driver_module = THIS_MODULE,
|
|
};
|
|
|
|
static int ad5933_ring_preenable(struct iio_dev *indio_dev)
|
|
{
|
|
struct ad5933_state *st = iio_priv(indio_dev);
|
|
int ret;
|
|
|
|
if (bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength))
|
|
return -EINVAL;
|
|
|
|
ret = ad5933_reset(st);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = ad5933_cmd(st, AD5933_CTRL_STANDBY);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = ad5933_cmd(st, AD5933_CTRL_INIT_START_FREQ);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
st->state = AD5933_CTRL_INIT_START_FREQ;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ad5933_ring_postenable(struct iio_dev *indio_dev)
|
|
{
|
|
struct ad5933_state *st = iio_priv(indio_dev);
|
|
|
|
/* AD5933_CTRL_INIT_START_FREQ:
|
|
* High Q complex circuits require a long time to reach steady state.
|
|
* To facilitate the measurement of such impedances, this mode allows
|
|
* the user full control of the settling time requirement before
|
|
* entering start frequency sweep mode where the impedance measurement
|
|
* takes place. In this mode the impedance is excited with the
|
|
* programmed start frequency (ad5933_ring_preenable),
|
|
* but no measurement takes place.
|
|
*/
|
|
|
|
schedule_delayed_work(&st->work,
|
|
msecs_to_jiffies(AD5933_INIT_EXCITATION_TIME_ms));
|
|
return 0;
|
|
}
|
|
|
|
static int ad5933_ring_postdisable(struct iio_dev *indio_dev)
|
|
{
|
|
struct ad5933_state *st = iio_priv(indio_dev);
|
|
|
|
cancel_delayed_work_sync(&st->work);
|
|
return ad5933_cmd(st, AD5933_CTRL_POWER_DOWN);
|
|
}
|
|
|
|
static const struct iio_buffer_setup_ops ad5933_ring_setup_ops = {
|
|
.preenable = ad5933_ring_preenable,
|
|
.postenable = ad5933_ring_postenable,
|
|
.postdisable = ad5933_ring_postdisable,
|
|
};
|
|
|
|
static int ad5933_register_ring_funcs_and_init(struct iio_dev *indio_dev)
|
|
{
|
|
struct iio_buffer *buffer;
|
|
|
|
buffer = iio_kfifo_allocate();
|
|
if (!buffer)
|
|
return -ENOMEM;
|
|
|
|
iio_device_attach_buffer(indio_dev, buffer);
|
|
|
|
/* Ring buffer functions - here trigger setup related */
|
|
indio_dev->setup_ops = &ad5933_ring_setup_ops;
|
|
|
|
indio_dev->modes |= INDIO_BUFFER_HARDWARE;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void ad5933_work(struct work_struct *work)
|
|
{
|
|
struct ad5933_state *st = container_of(work,
|
|
struct ad5933_state, work.work);
|
|
struct iio_dev *indio_dev = i2c_get_clientdata(st->client);
|
|
__be16 buf[2];
|
|
int val[2];
|
|
unsigned char status;
|
|
int ret;
|
|
|
|
if (st->state == AD5933_CTRL_INIT_START_FREQ) {
|
|
/* start sweep */
|
|
ad5933_cmd(st, AD5933_CTRL_START_SWEEP);
|
|
st->state = AD5933_CTRL_START_SWEEP;
|
|
schedule_delayed_work(&st->work, st->poll_time_jiffies);
|
|
return;
|
|
}
|
|
|
|
ret = ad5933_i2c_read(st->client, AD5933_REG_STATUS, 1, &status);
|
|
if (ret)
|
|
return;
|
|
|
|
if (status & AD5933_STAT_DATA_VALID) {
|
|
int scan_count = bitmap_weight(indio_dev->active_scan_mask,
|
|
indio_dev->masklength);
|
|
ret = ad5933_i2c_read(st->client,
|
|
test_bit(1, indio_dev->active_scan_mask) ?
|
|
AD5933_REG_REAL_DATA : AD5933_REG_IMAG_DATA,
|
|
scan_count * 2, (u8 *)buf);
|
|
if (ret)
|
|
return;
|
|
|
|
if (scan_count == 2) {
|
|
val[0] = be16_to_cpu(buf[0]);
|
|
val[1] = be16_to_cpu(buf[1]);
|
|
} else {
|
|
val[0] = be16_to_cpu(buf[0]);
|
|
}
|
|
iio_push_to_buffers(indio_dev, val);
|
|
} else {
|
|
/* no data available - try again later */
|
|
schedule_delayed_work(&st->work, st->poll_time_jiffies);
|
|
return;
|
|
}
|
|
|
|
if (status & AD5933_STAT_SWEEP_DONE) {
|
|
/* last sample received - power down do
|
|
* nothing until the ring enable is toggled
|
|
*/
|
|
ad5933_cmd(st, AD5933_CTRL_POWER_DOWN);
|
|
} else {
|
|
/* we just received a valid datum, move on to the next */
|
|
ad5933_cmd(st, AD5933_CTRL_INC_FREQ);
|
|
schedule_delayed_work(&st->work, st->poll_time_jiffies);
|
|
}
|
|
}
|
|
|
|
static int ad5933_probe(struct i2c_client *client,
|
|
const struct i2c_device_id *id)
|
|
{
|
|
int ret, voltage_uv = 0;
|
|
struct ad5933_platform_data *pdata = dev_get_platdata(&client->dev);
|
|
struct ad5933_state *st;
|
|
struct iio_dev *indio_dev;
|
|
|
|
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st));
|
|
if (!indio_dev)
|
|
return -ENOMEM;
|
|
|
|
st = iio_priv(indio_dev);
|
|
i2c_set_clientdata(client, indio_dev);
|
|
st->client = client;
|
|
|
|
mutex_init(&st->lock);
|
|
|
|
if (!pdata)
|
|
pdata = &ad5933_default_pdata;
|
|
|
|
st->reg = devm_regulator_get(&client->dev, "vdd");
|
|
if (IS_ERR(st->reg))
|
|
return PTR_ERR(st->reg);
|
|
|
|
ret = regulator_enable(st->reg);
|
|
if (ret) {
|
|
dev_err(&client->dev, "Failed to enable specified VDD supply\n");
|
|
return ret;
|
|
}
|
|
voltage_uv = regulator_get_voltage(st->reg);
|
|
|
|
if (voltage_uv)
|
|
st->vref_mv = voltage_uv / 1000;
|
|
else
|
|
st->vref_mv = pdata->vref_mv;
|
|
|
|
if (pdata->ext_clk_Hz) {
|
|
st->mclk_hz = pdata->ext_clk_Hz;
|
|
st->ctrl_lb = AD5933_CTRL_EXT_SYSCLK;
|
|
} else {
|
|
st->mclk_hz = AD5933_INT_OSC_FREQ_Hz;
|
|
st->ctrl_lb = AD5933_CTRL_INT_SYSCLK;
|
|
}
|
|
|
|
ad5933_calc_out_ranges(st);
|
|
INIT_DELAYED_WORK(&st->work, ad5933_work);
|
|
st->poll_time_jiffies = msecs_to_jiffies(AD5933_POLL_TIME_ms);
|
|
|
|
indio_dev->dev.parent = &client->dev;
|
|
indio_dev->info = &ad5933_info;
|
|
indio_dev->name = id->name;
|
|
indio_dev->modes = INDIO_DIRECT_MODE;
|
|
indio_dev->channels = ad5933_channels;
|
|
indio_dev->num_channels = ARRAY_SIZE(ad5933_channels);
|
|
|
|
ret = ad5933_register_ring_funcs_and_init(indio_dev);
|
|
if (ret)
|
|
goto error_disable_reg;
|
|
|
|
ret = ad5933_setup(st);
|
|
if (ret)
|
|
goto error_unreg_ring;
|
|
|
|
ret = iio_device_register(indio_dev);
|
|
if (ret)
|
|
goto error_unreg_ring;
|
|
|
|
return 0;
|
|
|
|
error_unreg_ring:
|
|
iio_kfifo_free(indio_dev->buffer);
|
|
error_disable_reg:
|
|
regulator_disable(st->reg);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int ad5933_remove(struct i2c_client *client)
|
|
{
|
|
struct iio_dev *indio_dev = i2c_get_clientdata(client);
|
|
struct ad5933_state *st = iio_priv(indio_dev);
|
|
|
|
iio_device_unregister(indio_dev);
|
|
iio_kfifo_free(indio_dev->buffer);
|
|
regulator_disable(st->reg);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct i2c_device_id ad5933_id[] = {
|
|
{ "ad5933", 0 },
|
|
{ "ad5934", 0 },
|
|
{}
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(i2c, ad5933_id);
|
|
|
|
static struct i2c_driver ad5933_driver = {
|
|
.driver = {
|
|
.name = "ad5933",
|
|
},
|
|
.probe = ad5933_probe,
|
|
.remove = ad5933_remove,
|
|
.id_table = ad5933_id,
|
|
};
|
|
module_i2c_driver(ad5933_driver);
|
|
|
|
MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
|
|
MODULE_DESCRIPTION("Analog Devices AD5933 Impedance Conv. Network Analyzer");
|
|
MODULE_LICENSE("GPL v2");
|