Changes: - SAM: - Battery: Take UEFI battery limiter into accound when scheduling delayed update - Clean up code, minor fixes - Misc: - Drop efivarfs fix (included in upstream v4.19.161) Links: - SAM:61b9bb859c
- kernel:43f1cd62e4
90 lines
3.1 KiB
Diff
90 lines
3.1 KiB
Diff
From 886620c9c0f4324c08faf7f6b3205a2a9e0db216 Mon Sep 17 00:00:00 2001
|
|
From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
|
|
Date: Sun, 5 Jul 2020 14:56:20 +0300
|
|
Subject: [PATCH] dmaengine: dw: Initialize channel before each transfer
|
|
|
|
In some cases DMA can be used only with a consumer which does runtime power
|
|
management and on the platforms, that have DMA auto power gating logic
|
|
(see comments in the drivers/acpi/acpi_lpss.c), may result in DMA losing
|
|
its context. Simple mitigation of this issue is to initialize channel
|
|
each time the consumer initiates a transfer.
|
|
|
|
Fixes: cfdf5b6cc598 ("dw_dmac: add support for Lynxpoint DMA controllers")
|
|
Reported-by: Tsuchiya Yuto <kitakar@gmail.com>
|
|
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
|
|
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
|
|
BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=206403
|
|
Link: https://lore.kernel.org/r/20200705115620.51929-1-andriy.shevchenko@linux.intel.com
|
|
Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
|
|
|
(cherry picked from commit 99ba8b9b0d9780e9937eb1d488d120e9e5c2533d)
|
|
[Reason for cherry-picking this commit:
|
|
This commit fixes touch input when using DMA mode on Surface 3's
|
|
touchscreen.
|
|
Note: this commit was not backported to v4.19 by upstream. For now,
|
|
backport this patch ourselves.]
|
|
[ Conflicts:
|
|
drivers/dma/dw/core.c
|
|
Resolved conflict by accepting current change then removed
|
|
DW_DMA_IS_INITIALIZED lines]
|
|
Signed-off-by: Tsuchiya Yuto <kitakar@gmail.com>
|
|
Patchset: surface3-touchscreen-dma-fix
|
|
---
|
|
drivers/dma/dw/core.c | 12 ------------
|
|
1 file changed, 12 deletions(-)
|
|
|
|
diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
|
|
index 055d83b6cb68..acf64302a2b2 100644
|
|
--- a/drivers/dma/dw/core.c
|
|
+++ b/drivers/dma/dw/core.c
|
|
@@ -180,9 +180,6 @@ static void dwc_initialize(struct dw_dma_chan *dwc)
|
|
{
|
|
struct dw_dma *dw = to_dw_dma(dwc->chan.device);
|
|
|
|
- if (test_bit(DW_DMA_IS_INITIALIZED, &dwc->flags))
|
|
- return;
|
|
-
|
|
if (dw->pdata->is_idma32)
|
|
dwc_initialize_chan_idma32(dwc);
|
|
else
|
|
@@ -191,8 +188,6 @@ static void dwc_initialize(struct dw_dma_chan *dwc)
|
|
/* Enable interrupts */
|
|
channel_set_bit(dw, MASK.XFER, dwc->mask);
|
|
channel_set_bit(dw, MASK.ERROR, dwc->mask);
|
|
-
|
|
- set_bit(DW_DMA_IS_INITIALIZED, &dwc->flags);
|
|
}
|
|
|
|
/*----------------------------------------------------------------------*/
|
|
@@ -1091,8 +1086,6 @@ static void idma32_fifo_partition(struct dw_dma *dw)
|
|
|
|
static void dw_dma_off(struct dw_dma *dw)
|
|
{
|
|
- unsigned int i;
|
|
-
|
|
dma_writel(dw, CFG, 0);
|
|
|
|
channel_clear_bit(dw, MASK.XFER, dw->all_chan_mask);
|
|
@@ -1103,9 +1096,6 @@ static void dw_dma_off(struct dw_dma *dw)
|
|
|
|
while (dma_readl(dw, CFG) & DW_CFG_DMA_EN)
|
|
cpu_relax();
|
|
-
|
|
- for (i = 0; i < dw->dma.chancnt; i++)
|
|
- clear_bit(DW_DMA_IS_INITIALIZED, &dw->chan[i].flags);
|
|
}
|
|
|
|
static void dw_dma_on(struct dw_dma *dw)
|
|
@@ -1170,8 +1160,6 @@ static void dwc_free_chan_resources(struct dma_chan *chan)
|
|
/* Clear custom channel configuration */
|
|
memset(&dwc->dws, 0, sizeof(struct dw_dma_slave));
|
|
|
|
- clear_bit(DW_DMA_IS_INITIALIZED, &dwc->flags);
|
|
-
|
|
/* Disable interrupts */
|
|
channel_clear_bit(dw, MASK.XFER, dwc->mask);
|
|
channel_clear_bit(dw, MASK.BLOCK, dwc->mask);
|
|
--
|
|
2.29.2
|
|
|