updating to mainline 4.14.8
This commit is contained in:
parent
b30e09357b
commit
fdff755d81
2
config
2
config
|
@ -1,6 +1,6 @@
|
||||||
#
|
#
|
||||||
# Automatically generated file; DO NOT EDIT.
|
# Automatically generated file; DO NOT EDIT.
|
||||||
# Linux/x86_64 4.14.6-jakeday Kernel Configuration
|
# Linux/x86_64 4.14.8-jakeday Kernel Configuration
|
||||||
#
|
#
|
||||||
CONFIG_64BIT=y
|
CONFIG_64BIT=y
|
||||||
CONFIG_X86_64=y
|
CONFIG_X86_64=y
|
||||||
|
|
|
@ -1,7 +1,7 @@
|
||||||
# SPDX-License-Identifier: GPL-2.0
|
# SPDX-License-Identifier: GPL-2.0
|
||||||
VERSION = 4
|
VERSION = 4
|
||||||
PATCHLEVEL = 14
|
PATCHLEVEL = 14
|
||||||
SUBLEVEL = 7
|
SUBLEVEL = 8
|
||||||
EXTRAVERSION =
|
EXTRAVERSION =
|
||||||
NAME = Petit Gorille
|
NAME = Petit Gorille
|
||||||
|
|
||||||
|
|
|
@ -14,8 +14,12 @@ LDFLAGS_vmlinux :=-p --no-undefined -X
|
||||||
CPPFLAGS_vmlinux.lds = -DTEXT_OFFSET=$(TEXT_OFFSET)
|
CPPFLAGS_vmlinux.lds = -DTEXT_OFFSET=$(TEXT_OFFSET)
|
||||||
GZFLAGS :=-9
|
GZFLAGS :=-9
|
||||||
|
|
||||||
ifneq ($(CONFIG_RELOCATABLE),)
|
ifeq ($(CONFIG_RELOCATABLE), y)
|
||||||
LDFLAGS_vmlinux += -pie -shared -Bsymbolic
|
# Pass --no-apply-dynamic-relocs to restore pre-binutils-2.27 behaviour
|
||||||
|
# for relative relocs, since this leads to better Image compression
|
||||||
|
# with the relocation offsets always being zero.
|
||||||
|
LDFLAGS_vmlinux += -pie -shared -Bsymbolic \
|
||||||
|
$(call ld-option, --no-apply-dynamic-relocs)
|
||||||
endif
|
endif
|
||||||
|
|
||||||
ifeq ($(CONFIG_ARM64_ERRATUM_843419),y)
|
ifeq ($(CONFIG_ARM64_ERRATUM_843419),y)
|
||||||
|
|
|
@ -301,6 +301,7 @@
|
||||||
|
|
||||||
&usb1_phy {
|
&usb1_phy {
|
||||||
status = "okay";
|
status = "okay";
|
||||||
|
phy-supply = <&usb_otg_pwr>;
|
||||||
};
|
};
|
||||||
|
|
||||||
&usb0 {
|
&usb0 {
|
||||||
|
|
|
@ -149,12 +149,20 @@ static inline pte_t pte_mkwrite(pte_t pte)
|
||||||
|
|
||||||
static inline pte_t pte_mkclean(pte_t pte)
|
static inline pte_t pte_mkclean(pte_t pte)
|
||||||
{
|
{
|
||||||
return clear_pte_bit(pte, __pgprot(PTE_DIRTY));
|
pte = clear_pte_bit(pte, __pgprot(PTE_DIRTY));
|
||||||
|
pte = set_pte_bit(pte, __pgprot(PTE_RDONLY));
|
||||||
|
|
||||||
|
return pte;
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline pte_t pte_mkdirty(pte_t pte)
|
static inline pte_t pte_mkdirty(pte_t pte)
|
||||||
{
|
{
|
||||||
return set_pte_bit(pte, __pgprot(PTE_DIRTY));
|
pte = set_pte_bit(pte, __pgprot(PTE_DIRTY));
|
||||||
|
|
||||||
|
if (pte_write(pte))
|
||||||
|
pte = clear_pte_bit(pte, __pgprot(PTE_RDONLY));
|
||||||
|
|
||||||
|
return pte;
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline pte_t pte_mkold(pte_t pte)
|
static inline pte_t pte_mkold(pte_t pte)
|
||||||
|
@ -642,28 +650,23 @@ static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
|
||||||
#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
|
#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* ptep_set_wrprotect - mark read-only while preserving the hardware update of
|
* ptep_set_wrprotect - mark read-only while trasferring potential hardware
|
||||||
* the Access Flag.
|
* dirty status (PTE_DBM && !PTE_RDONLY) to the software PTE_DIRTY bit.
|
||||||
*/
|
*/
|
||||||
#define __HAVE_ARCH_PTEP_SET_WRPROTECT
|
#define __HAVE_ARCH_PTEP_SET_WRPROTECT
|
||||||
static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep)
|
static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep)
|
||||||
{
|
{
|
||||||
pte_t old_pte, pte;
|
pte_t old_pte, pte;
|
||||||
|
|
||||||
/*
|
|
||||||
* ptep_set_wrprotect() is only called on CoW mappings which are
|
|
||||||
* private (!VM_SHARED) with the pte either read-only (!PTE_WRITE &&
|
|
||||||
* PTE_RDONLY) or writable and software-dirty (PTE_WRITE &&
|
|
||||||
* !PTE_RDONLY && PTE_DIRTY); see is_cow_mapping() and
|
|
||||||
* protection_map[]. There is no race with the hardware update of the
|
|
||||||
* dirty state: clearing of PTE_RDONLY when PTE_WRITE (a.k.a. PTE_DBM)
|
|
||||||
* is set.
|
|
||||||
*/
|
|
||||||
VM_WARN_ONCE(pte_write(*ptep) && !pte_dirty(*ptep),
|
|
||||||
"%s: potential race with hardware DBM", __func__);
|
|
||||||
pte = READ_ONCE(*ptep);
|
pte = READ_ONCE(*ptep);
|
||||||
do {
|
do {
|
||||||
old_pte = pte;
|
old_pte = pte;
|
||||||
|
/*
|
||||||
|
* If hardware-dirty (PTE_WRITE/DBM bit set and PTE_RDONLY
|
||||||
|
* clear), set the PTE_DIRTY bit.
|
||||||
|
*/
|
||||||
|
if (pte_hw_dirty(pte))
|
||||||
|
pte = pte_mkdirty(pte);
|
||||||
pte = pte_wrprotect(pte);
|
pte = pte_wrprotect(pte);
|
||||||
pte_val(pte) = cmpxchg_relaxed(&pte_val(*ptep),
|
pte_val(pte) = cmpxchg_relaxed(&pte_val(*ptep),
|
||||||
pte_val(old_pte), pte_val(pte));
|
pte_val(old_pte), pte_val(pte));
|
||||||
|
|
|
@ -389,7 +389,7 @@ void ptdump_check_wx(void)
|
||||||
.check_wx = true,
|
.check_wx = true,
|
||||||
};
|
};
|
||||||
|
|
||||||
walk_pgd(&st, &init_mm, 0);
|
walk_pgd(&st, &init_mm, VA_START);
|
||||||
note_page(&st, 0, 0, 0);
|
note_page(&st, 0, 0, 0);
|
||||||
if (st.wx_pages || st.uxn_pages)
|
if (st.wx_pages || st.uxn_pages)
|
||||||
pr_warn("Checked W+X mappings: FAILED, %lu W+X pages found, %lu non-UXN pages found\n",
|
pr_warn("Checked W+X mappings: FAILED, %lu W+X pages found, %lu non-UXN pages found\n",
|
||||||
|
|
|
@ -476,6 +476,8 @@ void __init arm64_memblock_init(void)
|
||||||
|
|
||||||
reserve_elfcorehdr();
|
reserve_elfcorehdr();
|
||||||
|
|
||||||
|
high_memory = __va(memblock_end_of_DRAM() - 1) + 1;
|
||||||
|
|
||||||
dma_contiguous_reserve(arm64_dma_phys_limit);
|
dma_contiguous_reserve(arm64_dma_phys_limit);
|
||||||
|
|
||||||
memblock_allow_resize();
|
memblock_allow_resize();
|
||||||
|
@ -502,7 +504,6 @@ void __init bootmem_init(void)
|
||||||
sparse_init();
|
sparse_init();
|
||||||
zone_sizes_init(min, max);
|
zone_sizes_init(min, max);
|
||||||
|
|
||||||
high_memory = __va((max << PAGE_SHIFT) - 1) + 1;
|
|
||||||
memblock_dump_all();
|
memblock_dump_all();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -321,11 +321,14 @@ config BF53x
|
||||||
|
|
||||||
config GPIO_ADI
|
config GPIO_ADI
|
||||||
def_bool y
|
def_bool y
|
||||||
|
depends on !PINCTRL
|
||||||
depends on (BF51x || BF52x || BF53x || BF538 || BF539 || BF561)
|
depends on (BF51x || BF52x || BF53x || BF538 || BF539 || BF561)
|
||||||
|
|
||||||
config PINCTRL
|
config PINCTRL_BLACKFIN_ADI2
|
||||||
def_bool y
|
def_bool y
|
||||||
depends on BF54x || BF60x
|
depends on (BF54x || BF60x)
|
||||||
|
select PINCTRL
|
||||||
|
select PINCTRL_ADI2
|
||||||
|
|
||||||
config MEM_MT48LC64M4A2FB_7E
|
config MEM_MT48LC64M4A2FB_7E
|
||||||
bool
|
bool
|
||||||
|
|
|
@ -18,6 +18,7 @@ config DEBUG_VERBOSE
|
||||||
|
|
||||||
config DEBUG_MMRS
|
config DEBUG_MMRS
|
||||||
tristate "Generate Blackfin MMR tree"
|
tristate "Generate Blackfin MMR tree"
|
||||||
|
depends on !PINCTRL
|
||||||
select DEBUG_FS
|
select DEBUG_FS
|
||||||
help
|
help
|
||||||
Create a tree of Blackfin MMRs via the debugfs tree. If
|
Create a tree of Blackfin MMRs via the debugfs tree. If
|
||||||
|
|
|
@ -540,7 +540,7 @@ static int memord(const void *d1, size_t s1, const void *d2, size_t s2)
|
||||||
{
|
{
|
||||||
if (s1 < s2)
|
if (s1 < s2)
|
||||||
return 1;
|
return 1;
|
||||||
if (s2 > s1)
|
if (s1 > s2)
|
||||||
return -1;
|
return -1;
|
||||||
|
|
||||||
return memcmp(d1, d2, s1);
|
return memcmp(d1, d2, s1);
|
||||||
|
|
|
@ -39,18 +39,18 @@ int __opal_async_get_token(void)
|
||||||
int token;
|
int token;
|
||||||
|
|
||||||
spin_lock_irqsave(&opal_async_comp_lock, flags);
|
spin_lock_irqsave(&opal_async_comp_lock, flags);
|
||||||
token = find_first_bit(opal_async_complete_map, opal_max_async_tokens);
|
token = find_first_zero_bit(opal_async_token_map, opal_max_async_tokens);
|
||||||
if (token >= opal_max_async_tokens) {
|
if (token >= opal_max_async_tokens) {
|
||||||
token = -EBUSY;
|
token = -EBUSY;
|
||||||
goto out;
|
goto out;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (__test_and_set_bit(token, opal_async_token_map)) {
|
if (!__test_and_clear_bit(token, opal_async_complete_map)) {
|
||||||
token = -EBUSY;
|
token = -EBUSY;
|
||||||
goto out;
|
goto out;
|
||||||
}
|
}
|
||||||
|
|
||||||
__clear_bit(token, opal_async_complete_map);
|
__set_bit(token, opal_async_token_map);
|
||||||
|
|
||||||
out:
|
out:
|
||||||
spin_unlock_irqrestore(&opal_async_comp_lock, flags);
|
spin_unlock_irqrestore(&opal_async_comp_lock, flags);
|
||||||
|
|
|
@ -319,7 +319,7 @@ static unsigned long pnv_get_proc_freq(unsigned int cpu)
|
||||||
{
|
{
|
||||||
unsigned long ret_freq;
|
unsigned long ret_freq;
|
||||||
|
|
||||||
ret_freq = cpufreq_quick_get(cpu) * 1000ul;
|
ret_freq = cpufreq_get(cpu) * 1000ul;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* If the backend cpufreq driver does not exist,
|
* If the backend cpufreq driver does not exist,
|
||||||
|
|
|
@ -1592,6 +1592,8 @@ ATTRIBUTE_GROUPS(vio_dev);
|
||||||
void vio_unregister_device(struct vio_dev *viodev)
|
void vio_unregister_device(struct vio_dev *viodev)
|
||||||
{
|
{
|
||||||
device_unregister(&viodev->dev);
|
device_unregister(&viodev->dev);
|
||||||
|
if (viodev->family == VDEVICE)
|
||||||
|
irq_dispose_mapping(viodev->irq);
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL(vio_unregister_device);
|
EXPORT_SYMBOL(vio_unregister_device);
|
||||||
|
|
||||||
|
|
|
@ -846,12 +846,12 @@ void ipic_disable_mcp(enum ipic_mcp_irq mcp_irq)
|
||||||
|
|
||||||
u32 ipic_get_mcp_status(void)
|
u32 ipic_get_mcp_status(void)
|
||||||
{
|
{
|
||||||
return ipic_read(primary_ipic->regs, IPIC_SERMR);
|
return ipic_read(primary_ipic->regs, IPIC_SERSR);
|
||||||
}
|
}
|
||||||
|
|
||||||
void ipic_clear_mcp_status(u32 mask)
|
void ipic_clear_mcp_status(u32 mask)
|
||||||
{
|
{
|
||||||
ipic_write(primary_ipic->regs, IPIC_SERMR, mask);
|
ipic_write(primary_ipic->regs, IPIC_SERSR, mask);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Return an interrupt vector or 0 if no interrupt is pending. */
|
/* Return an interrupt vector or 0 if no interrupt is pending. */
|
||||||
|
|
|
@ -2475,6 +2475,11 @@ static void dump_xives(void)
|
||||||
unsigned long num;
|
unsigned long num;
|
||||||
int c;
|
int c;
|
||||||
|
|
||||||
|
if (!xive_enabled()) {
|
||||||
|
printf("Xive disabled on this system\n");
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
c = inchar();
|
c = inchar();
|
||||||
if (c == 'a') {
|
if (c == 'a') {
|
||||||
dump_all_xives();
|
dump_all_xives();
|
||||||
|
|
|
@ -263,6 +263,7 @@ COMPAT_SYSCALL_DEFINE2(s390_setgroups16, int, gidsetsize, u16 __user *, grouplis
|
||||||
return retval;
|
return retval;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
groups_sort(group_info);
|
||||||
retval = set_current_groups(group_info);
|
retval = set_current_groups(group_info);
|
||||||
put_group_info(group_info);
|
put_group_info(group_info);
|
||||||
|
|
||||||
|
|
|
@ -78,6 +78,7 @@ vmlinux-objs-$(CONFIG_EARLY_PRINTK) += $(obj)/early_serial_console.o
|
||||||
vmlinux-objs-$(CONFIG_RANDOMIZE_BASE) += $(obj)/kaslr.o
|
vmlinux-objs-$(CONFIG_RANDOMIZE_BASE) += $(obj)/kaslr.o
|
||||||
ifdef CONFIG_X86_64
|
ifdef CONFIG_X86_64
|
||||||
vmlinux-objs-$(CONFIG_RANDOMIZE_BASE) += $(obj)/pagetable.o
|
vmlinux-objs-$(CONFIG_RANDOMIZE_BASE) += $(obj)/pagetable.o
|
||||||
|
vmlinux-objs-y += $(obj)/pgtable_64.o
|
||||||
endif
|
endif
|
||||||
|
|
||||||
$(obj)/eboot.o: KBUILD_CFLAGS += -fshort-wchar -mno-red-zone
|
$(obj)/eboot.o: KBUILD_CFLAGS += -fshort-wchar -mno-red-zone
|
||||||
|
|
|
@ -289,10 +289,18 @@ ENTRY(startup_64)
|
||||||
leaq boot_stack_end(%rbx), %rsp
|
leaq boot_stack_end(%rbx), %rsp
|
||||||
|
|
||||||
#ifdef CONFIG_X86_5LEVEL
|
#ifdef CONFIG_X86_5LEVEL
|
||||||
/* Check if 5-level paging has already enabled */
|
/*
|
||||||
movq %cr4, %rax
|
* Check if we need to enable 5-level paging.
|
||||||
testl $X86_CR4_LA57, %eax
|
* RSI holds real mode data and need to be preserved across
|
||||||
jnz lvl5
|
* a function call.
|
||||||
|
*/
|
||||||
|
pushq %rsi
|
||||||
|
call l5_paging_required
|
||||||
|
popq %rsi
|
||||||
|
|
||||||
|
/* If l5_paging_required() returned zero, we're done here. */
|
||||||
|
cmpq $0, %rax
|
||||||
|
je lvl5
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* At this point we are in long mode with 4-level paging enabled,
|
* At this point we are in long mode with 4-level paging enabled,
|
||||||
|
|
|
@ -169,6 +169,16 @@ void __puthex(unsigned long value)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static bool l5_supported(void)
|
||||||
|
{
|
||||||
|
/* Check if leaf 7 is supported. */
|
||||||
|
if (native_cpuid_eax(0) < 7)
|
||||||
|
return 0;
|
||||||
|
|
||||||
|
/* Check if la57 is supported. */
|
||||||
|
return native_cpuid_ecx(7) & (1 << (X86_FEATURE_LA57 & 31));
|
||||||
|
}
|
||||||
|
|
||||||
#if CONFIG_X86_NEED_RELOCS
|
#if CONFIG_X86_NEED_RELOCS
|
||||||
static void handle_relocations(void *output, unsigned long output_len,
|
static void handle_relocations(void *output, unsigned long output_len,
|
||||||
unsigned long virt_addr)
|
unsigned long virt_addr)
|
||||||
|
@ -362,6 +372,12 @@ asmlinkage __visible void *extract_kernel(void *rmode, memptr heap,
|
||||||
console_init();
|
console_init();
|
||||||
debug_putstr("early console in extract_kernel\n");
|
debug_putstr("early console in extract_kernel\n");
|
||||||
|
|
||||||
|
if (IS_ENABLED(CONFIG_X86_5LEVEL) && !l5_supported()) {
|
||||||
|
error("This linux kernel as configured requires 5-level paging\n"
|
||||||
|
"This CPU does not support the required 'cr4.la57' feature\n"
|
||||||
|
"Unable to boot - please use a kernel appropriate for your CPU\n");
|
||||||
|
}
|
||||||
|
|
||||||
free_mem_ptr = heap; /* Heap */
|
free_mem_ptr = heap; /* Heap */
|
||||||
free_mem_end_ptr = heap + BOOT_HEAP_SIZE;
|
free_mem_end_ptr = heap + BOOT_HEAP_SIZE;
|
||||||
|
|
||||||
|
|
28
kernel/arch/x86/boot/compressed/pgtable_64.c
Normal file
28
kernel/arch/x86/boot/compressed/pgtable_64.c
Normal file
|
@ -0,0 +1,28 @@
|
||||||
|
#include <asm/processor.h>
|
||||||
|
|
||||||
|
/*
|
||||||
|
* __force_order is used by special_insns.h asm code to force instruction
|
||||||
|
* serialization.
|
||||||
|
*
|
||||||
|
* It is not referenced from the code, but GCC < 5 with -fPIE would fail
|
||||||
|
* due to an undefined symbol. Define it to make these ancient GCCs work.
|
||||||
|
*/
|
||||||
|
unsigned long __force_order;
|
||||||
|
|
||||||
|
int l5_paging_required(void)
|
||||||
|
{
|
||||||
|
/* Check if leaf 7 is supported. */
|
||||||
|
|
||||||
|
if (native_cpuid_eax(0) < 7)
|
||||||
|
return 0;
|
||||||
|
|
||||||
|
/* Check if la57 is supported. */
|
||||||
|
if (!(native_cpuid_ecx(7) & (1 << (X86_FEATURE_LA57 & 31))))
|
||||||
|
return 0;
|
||||||
|
|
||||||
|
/* Check if 5-level paging has already been enabled. */
|
||||||
|
if (native_read_cr4() & X86_CR4_LA57)
|
||||||
|
return 0;
|
||||||
|
|
||||||
|
return 1;
|
||||||
|
}
|
|
@ -59,13 +59,6 @@ static int encrypt(struct blkcipher_desc *desc,
|
||||||
|
|
||||||
salsa20_ivsetup(ctx, walk.iv);
|
salsa20_ivsetup(ctx, walk.iv);
|
||||||
|
|
||||||
if (likely(walk.nbytes == nbytes))
|
|
||||||
{
|
|
||||||
salsa20_encrypt_bytes(ctx, walk.src.virt.addr,
|
|
||||||
walk.dst.virt.addr, nbytes);
|
|
||||||
return blkcipher_walk_done(desc, &walk, 0);
|
|
||||||
}
|
|
||||||
|
|
||||||
while (walk.nbytes >= 64) {
|
while (walk.nbytes >= 64) {
|
||||||
salsa20_encrypt_bytes(ctx, walk.src.virt.addr,
|
salsa20_encrypt_bytes(ctx, walk.src.virt.addr,
|
||||||
walk.dst.virt.addr,
|
walk.dst.virt.addr,
|
||||||
|
|
|
@ -2845,6 +2845,7 @@ static void nested_vmx_setup_ctls_msrs(struct vcpu_vmx *vmx)
|
||||||
* Advertise EPTP switching unconditionally
|
* Advertise EPTP switching unconditionally
|
||||||
* since we emulate it
|
* since we emulate it
|
||||||
*/
|
*/
|
||||||
|
if (enable_ept)
|
||||||
vmx->nested.nested_vmx_vmfunc_controls =
|
vmx->nested.nested_vmx_vmfunc_controls =
|
||||||
VMX_VMFUNC_EPTP_SWITCHING;
|
VMX_VMFUNC_EPTP_SWITCHING;
|
||||||
}
|
}
|
||||||
|
|
|
@ -178,7 +178,7 @@ int badblocks_set(struct badblocks *bb, sector_t s, int sectors,
|
||||||
|
|
||||||
if (bb->shift < 0)
|
if (bb->shift < 0)
|
||||||
/* badblocks are disabled */
|
/* badblocks are disabled */
|
||||||
return 0;
|
return 1;
|
||||||
|
|
||||||
if (bb->shift) {
|
if (bb->shift) {
|
||||||
/* round the start down, and the end up */
|
/* round the start down, and the end up */
|
||||||
|
|
|
@ -94,7 +94,7 @@ void blk_mq_sched_dispatch_requests(struct blk_mq_hw_ctx *hctx)
|
||||||
struct request_queue *q = hctx->queue;
|
struct request_queue *q = hctx->queue;
|
||||||
struct elevator_queue *e = q->elevator;
|
struct elevator_queue *e = q->elevator;
|
||||||
const bool has_sched_dispatch = e && e->type->ops.mq.dispatch_request;
|
const bool has_sched_dispatch = e && e->type->ops.mq.dispatch_request;
|
||||||
bool did_work = false;
|
bool do_sched_dispatch = true;
|
||||||
LIST_HEAD(rq_list);
|
LIST_HEAD(rq_list);
|
||||||
|
|
||||||
/* RCU or SRCU read lock is needed before checking quiesced flag */
|
/* RCU or SRCU read lock is needed before checking quiesced flag */
|
||||||
|
@ -125,18 +125,18 @@ void blk_mq_sched_dispatch_requests(struct blk_mq_hw_ctx *hctx)
|
||||||
*/
|
*/
|
||||||
if (!list_empty(&rq_list)) {
|
if (!list_empty(&rq_list)) {
|
||||||
blk_mq_sched_mark_restart_hctx(hctx);
|
blk_mq_sched_mark_restart_hctx(hctx);
|
||||||
did_work = blk_mq_dispatch_rq_list(q, &rq_list);
|
do_sched_dispatch = blk_mq_dispatch_rq_list(q, &rq_list);
|
||||||
} else if (!has_sched_dispatch) {
|
} else if (!has_sched_dispatch) {
|
||||||
blk_mq_flush_busy_ctxs(hctx, &rq_list);
|
blk_mq_flush_busy_ctxs(hctx, &rq_list);
|
||||||
blk_mq_dispatch_rq_list(q, &rq_list);
|
blk_mq_dispatch_rq_list(q, &rq_list);
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* We want to dispatch from the scheduler if we had no work left
|
* We want to dispatch from the scheduler if there was nothing
|
||||||
* on the dispatch list, OR if we did have work but weren't able
|
* on the dispatch list or we were able to dispatch from the
|
||||||
* to make progress.
|
* dispatch list.
|
||||||
*/
|
*/
|
||||||
if (!did_work && has_sched_dispatch) {
|
if (do_sched_dispatch && has_sched_dispatch) {
|
||||||
do {
|
do {
|
||||||
struct request *rq;
|
struct request *rq;
|
||||||
|
|
||||||
|
|
|
@ -699,15 +699,16 @@ void af_alg_free_areq_sgls(struct af_alg_async_req *areq)
|
||||||
}
|
}
|
||||||
|
|
||||||
tsgl = areq->tsgl;
|
tsgl = areq->tsgl;
|
||||||
|
if (tsgl) {
|
||||||
for_each_sg(tsgl, sg, areq->tsgl_entries, i) {
|
for_each_sg(tsgl, sg, areq->tsgl_entries, i) {
|
||||||
if (!sg_page(sg))
|
if (!sg_page(sg))
|
||||||
continue;
|
continue;
|
||||||
put_page(sg_page(sg));
|
put_page(sg_page(sg));
|
||||||
}
|
}
|
||||||
|
|
||||||
if (areq->tsgl && areq->tsgl_entries)
|
|
||||||
sock_kfree_s(sk, tsgl, areq->tsgl_entries * sizeof(*tsgl));
|
sock_kfree_s(sk, tsgl, areq->tsgl_entries * sizeof(*tsgl));
|
||||||
}
|
}
|
||||||
|
}
|
||||||
EXPORT_SYMBOL_GPL(af_alg_free_areq_sgls);
|
EXPORT_SYMBOL_GPL(af_alg_free_areq_sgls);
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
|
@ -503,6 +503,7 @@ static void aead_release(void *private)
|
||||||
struct aead_tfm *tfm = private;
|
struct aead_tfm *tfm = private;
|
||||||
|
|
||||||
crypto_free_aead(tfm->aead);
|
crypto_free_aead(tfm->aead);
|
||||||
|
crypto_put_default_null_skcipher2();
|
||||||
kfree(tfm);
|
kfree(tfm);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -535,7 +536,6 @@ static void aead_sock_destruct(struct sock *sk)
|
||||||
unsigned int ivlen = crypto_aead_ivsize(tfm);
|
unsigned int ivlen = crypto_aead_ivsize(tfm);
|
||||||
|
|
||||||
af_alg_pull_tsgl(sk, ctx->used, NULL, 0);
|
af_alg_pull_tsgl(sk, ctx->used, NULL, 0);
|
||||||
crypto_put_default_null_skcipher2();
|
|
||||||
sock_kzfree_s(sk, ctx->iv, ivlen);
|
sock_kzfree_s(sk, ctx->iv, ivlen);
|
||||||
sock_kfree_s(sk, ctx, ctx->len);
|
sock_kfree_s(sk, ctx, ctx->len);
|
||||||
af_alg_release_parent(sk);
|
af_alg_release_parent(sk);
|
||||||
|
|
|
@ -195,11 +195,15 @@ static int hmac_create(struct crypto_template *tmpl, struct rtattr **tb)
|
||||||
salg = shash_attr_alg(tb[1], 0, 0);
|
salg = shash_attr_alg(tb[1], 0, 0);
|
||||||
if (IS_ERR(salg))
|
if (IS_ERR(salg))
|
||||||
return PTR_ERR(salg);
|
return PTR_ERR(salg);
|
||||||
|
alg = &salg->base;
|
||||||
|
|
||||||
|
/* The underlying hash algorithm must be unkeyed */
|
||||||
err = -EINVAL;
|
err = -EINVAL;
|
||||||
|
if (crypto_shash_alg_has_setkey(salg))
|
||||||
|
goto out_put_alg;
|
||||||
|
|
||||||
ds = salg->digestsize;
|
ds = salg->digestsize;
|
||||||
ss = salg->statesize;
|
ss = salg->statesize;
|
||||||
alg = &salg->base;
|
|
||||||
if (ds > alg->cra_blocksize ||
|
if (ds > alg->cra_blocksize ||
|
||||||
ss < alg->cra_blocksize)
|
ss < alg->cra_blocksize)
|
||||||
goto out_put_alg;
|
goto out_put_alg;
|
||||||
|
|
|
@ -30,7 +30,7 @@ int rsa_get_n(void *context, size_t hdrlen, unsigned char tag,
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
||||||
if (fips_enabled) {
|
if (fips_enabled) {
|
||||||
while (!*ptr && n_sz) {
|
while (n_sz && !*ptr) {
|
||||||
ptr++;
|
ptr++;
|
||||||
n_sz--;
|
n_sz--;
|
||||||
}
|
}
|
||||||
|
|
|
@ -188,13 +188,6 @@ static int encrypt(struct blkcipher_desc *desc,
|
||||||
|
|
||||||
salsa20_ivsetup(ctx, walk.iv);
|
salsa20_ivsetup(ctx, walk.iv);
|
||||||
|
|
||||||
if (likely(walk.nbytes == nbytes))
|
|
||||||
{
|
|
||||||
salsa20_encrypt_bytes(ctx, walk.dst.virt.addr,
|
|
||||||
walk.src.virt.addr, nbytes);
|
|
||||||
return blkcipher_walk_done(desc, &walk, 0);
|
|
||||||
}
|
|
||||||
|
|
||||||
while (walk.nbytes >= 64) {
|
while (walk.nbytes >= 64) {
|
||||||
salsa20_encrypt_bytes(ctx, walk.dst.virt.addr,
|
salsa20_encrypt_bytes(ctx, walk.dst.virt.addr,
|
||||||
walk.src.virt.addr,
|
walk.src.virt.addr,
|
||||||
|
|
|
@ -25,11 +25,12 @@
|
||||||
|
|
||||||
static const struct crypto_type crypto_shash_type;
|
static const struct crypto_type crypto_shash_type;
|
||||||
|
|
||||||
static int shash_no_setkey(struct crypto_shash *tfm, const u8 *key,
|
int shash_no_setkey(struct crypto_shash *tfm, const u8 *key,
|
||||||
unsigned int keylen)
|
unsigned int keylen)
|
||||||
{
|
{
|
||||||
return -ENOSYS;
|
return -ENOSYS;
|
||||||
}
|
}
|
||||||
|
EXPORT_SYMBOL_GPL(shash_no_setkey);
|
||||||
|
|
||||||
static int shash_setkey_unaligned(struct crypto_shash *tfm, const u8 *key,
|
static int shash_setkey_unaligned(struct crypto_shash *tfm, const u8 *key,
|
||||||
unsigned int keylen)
|
unsigned int keylen)
|
||||||
|
|
|
@ -340,7 +340,7 @@ static void test_aead_speed(const char *algo, int enc, unsigned int secs,
|
||||||
}
|
}
|
||||||
|
|
||||||
sg_init_aead(sg, xbuf,
|
sg_init_aead(sg, xbuf,
|
||||||
*b_size + (enc ? authsize : 0));
|
*b_size + (enc ? 0 : authsize));
|
||||||
|
|
||||||
sg_init_aead(sgout, xoutbuf,
|
sg_init_aead(sgout, xoutbuf,
|
||||||
*b_size + (enc ? authsize : 0));
|
*b_size + (enc ? authsize : 0));
|
||||||
|
@ -348,7 +348,9 @@ static void test_aead_speed(const char *algo, int enc, unsigned int secs,
|
||||||
sg_set_buf(&sg[0], assoc, aad_size);
|
sg_set_buf(&sg[0], assoc, aad_size);
|
||||||
sg_set_buf(&sgout[0], assoc, aad_size);
|
sg_set_buf(&sgout[0], assoc, aad_size);
|
||||||
|
|
||||||
aead_request_set_crypt(req, sg, sgout, *b_size, iv);
|
aead_request_set_crypt(req, sg, sgout,
|
||||||
|
*b_size + (enc ? 0 : authsize),
|
||||||
|
iv);
|
||||||
aead_request_set_ad(req, aad_size);
|
aead_request_set_ad(req, aad_size);
|
||||||
|
|
||||||
if (secs)
|
if (secs)
|
||||||
|
|
|
@ -1985,8 +1985,10 @@ static int __init null_init(void)
|
||||||
|
|
||||||
for (i = 0; i < nr_devices; i++) {
|
for (i = 0; i < nr_devices; i++) {
|
||||||
dev = null_alloc_dev();
|
dev = null_alloc_dev();
|
||||||
if (!dev)
|
if (!dev) {
|
||||||
|
ret = -ENOMEM;
|
||||||
goto err_dev;
|
goto err_dev;
|
||||||
|
}
|
||||||
ret = null_add_dev(dev);
|
ret = null_add_dev(dev);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
null_free_dev(dev);
|
null_free_dev(dev);
|
||||||
|
|
|
@ -272,6 +272,7 @@ static const struct usb_device_id blacklist_table[] = {
|
||||||
{ USB_DEVICE(0x0cf3, 0xe301), .driver_info = BTUSB_QCA_ROME },
|
{ USB_DEVICE(0x0cf3, 0xe301), .driver_info = BTUSB_QCA_ROME },
|
||||||
{ USB_DEVICE(0x0cf3, 0xe360), .driver_info = BTUSB_QCA_ROME },
|
{ USB_DEVICE(0x0cf3, 0xe360), .driver_info = BTUSB_QCA_ROME },
|
||||||
{ USB_DEVICE(0x0489, 0xe092), .driver_info = BTUSB_QCA_ROME },
|
{ USB_DEVICE(0x0489, 0xe092), .driver_info = BTUSB_QCA_ROME },
|
||||||
|
{ USB_DEVICE(0x0489, 0xe09f), .driver_info = BTUSB_QCA_ROME },
|
||||||
{ USB_DEVICE(0x0489, 0xe0a2), .driver_info = BTUSB_QCA_ROME },
|
{ USB_DEVICE(0x0489, 0xe0a2), .driver_info = BTUSB_QCA_ROME },
|
||||||
{ USB_DEVICE(0x04ca, 0x3011), .driver_info = BTUSB_QCA_ROME },
|
{ USB_DEVICE(0x04ca, 0x3011), .driver_info = BTUSB_QCA_ROME },
|
||||||
{ USB_DEVICE(0x04ca, 0x3016), .driver_info = BTUSB_QCA_ROME },
|
{ USB_DEVICE(0x04ca, 0x3016), .driver_info = BTUSB_QCA_ROME },
|
||||||
|
|
|
@ -510,13 +510,13 @@ static void hci_uart_tty_close(struct tty_struct *tty)
|
||||||
if (hdev)
|
if (hdev)
|
||||||
hci_uart_close(hdev);
|
hci_uart_close(hdev);
|
||||||
|
|
||||||
cancel_work_sync(&hu->write_work);
|
|
||||||
|
|
||||||
if (test_bit(HCI_UART_PROTO_READY, &hu->flags)) {
|
if (test_bit(HCI_UART_PROTO_READY, &hu->flags)) {
|
||||||
write_lock_irqsave(&hu->proto_lock, flags);
|
write_lock_irqsave(&hu->proto_lock, flags);
|
||||||
clear_bit(HCI_UART_PROTO_READY, &hu->flags);
|
clear_bit(HCI_UART_PROTO_READY, &hu->flags);
|
||||||
write_unlock_irqrestore(&hu->proto_lock, flags);
|
write_unlock_irqrestore(&hu->proto_lock, flags);
|
||||||
|
|
||||||
|
cancel_work_sync(&hu->write_work);
|
||||||
|
|
||||||
if (hdev) {
|
if (hdev) {
|
||||||
if (test_bit(HCI_UART_REGISTERED, &hu->flags))
|
if (test_bit(HCI_UART_REGISTERED, &hu->flags))
|
||||||
hci_unregister_dev(hdev);
|
hci_unregister_dev(hdev);
|
||||||
|
|
|
@ -1280,6 +1280,7 @@ static int arm_ccn_pmu_init(struct arm_ccn *ccn)
|
||||||
|
|
||||||
/* Perf driver registration */
|
/* Perf driver registration */
|
||||||
ccn->dt.pmu = (struct pmu) {
|
ccn->dt.pmu = (struct pmu) {
|
||||||
|
.module = THIS_MODULE,
|
||||||
.attr_groups = arm_ccn_pmu_attr_groups,
|
.attr_groups = arm_ccn_pmu_attr_groups,
|
||||||
.task_ctx_nr = perf_invalid_context,
|
.task_ctx_nr = perf_invalid_context,
|
||||||
.event_init = arm_ccn_pmu_event_init,
|
.event_init = arm_ccn_pmu_event_init,
|
||||||
|
|
|
@ -3469,6 +3469,7 @@ static int add_smi(struct smi_info *new_smi)
|
||||||
ipmi_addr_src_to_str(new_smi->addr_source),
|
ipmi_addr_src_to_str(new_smi->addr_source),
|
||||||
si_to_str[new_smi->si_type]);
|
si_to_str[new_smi->si_type]);
|
||||||
rv = -EBUSY;
|
rv = -EBUSY;
|
||||||
|
kfree(new_smi);
|
||||||
goto out_err;
|
goto out_err;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
@ -145,7 +145,7 @@ static struct hisi_gate_clock hi6220_separated_gate_clks_sys[] __initdata = {
|
||||||
{ HI6220_BBPPLL_SEL, "bbppll_sel", "pll0_bbp_gate", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x270, 9, 0, },
|
{ HI6220_BBPPLL_SEL, "bbppll_sel", "pll0_bbp_gate", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x270, 9, 0, },
|
||||||
{ HI6220_MEDIA_PLL_SRC, "media_pll_src", "pll_media_gate", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x270, 10, 0, },
|
{ HI6220_MEDIA_PLL_SRC, "media_pll_src", "pll_media_gate", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x270, 10, 0, },
|
||||||
{ HI6220_MMC2_SEL, "mmc2_sel", "mmc2_mux1", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x270, 11, 0, },
|
{ HI6220_MMC2_SEL, "mmc2_sel", "mmc2_mux1", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x270, 11, 0, },
|
||||||
{ HI6220_CS_ATB_SYSPLL, "cs_atb_syspll", "syspll", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x270, 12, 0, },
|
{ HI6220_CS_ATB_SYSPLL, "cs_atb_syspll", "syspll", CLK_SET_RATE_PARENT|CLK_IS_CRITICAL, 0x270, 12, 0, },
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct hisi_mux_clock hi6220_mux_clks_sys[] __initdata = {
|
static struct hisi_mux_clock hi6220_mux_clks_sys[] __initdata = {
|
||||||
|
|
|
@ -761,7 +761,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
|
||||||
clk[IMX6QDL_CLK_GPU2D_CORE] = imx_clk_gate2("gpu2d_core", "gpu2d_core_podf", base + 0x6c, 24);
|
clk[IMX6QDL_CLK_GPU2D_CORE] = imx_clk_gate2("gpu2d_core", "gpu2d_core_podf", base + 0x6c, 24);
|
||||||
clk[IMX6QDL_CLK_GPU3D_CORE] = imx_clk_gate2("gpu3d_core", "gpu3d_core_podf", base + 0x6c, 26);
|
clk[IMX6QDL_CLK_GPU3D_CORE] = imx_clk_gate2("gpu3d_core", "gpu3d_core_podf", base + 0x6c, 26);
|
||||||
clk[IMX6QDL_CLK_HDMI_IAHB] = imx_clk_gate2("hdmi_iahb", "ahb", base + 0x70, 0);
|
clk[IMX6QDL_CLK_HDMI_IAHB] = imx_clk_gate2("hdmi_iahb", "ahb", base + 0x70, 0);
|
||||||
clk[IMX6QDL_CLK_HDMI_ISFR] = imx_clk_gate2("hdmi_isfr", "video_27m", base + 0x70, 4);
|
clk[IMX6QDL_CLK_HDMI_ISFR] = imx_clk_gate2("hdmi_isfr", "mipi_core_cfg", base + 0x70, 4);
|
||||||
clk[IMX6QDL_CLK_I2C1] = imx_clk_gate2("i2c1", "ipg_per", base + 0x70, 6);
|
clk[IMX6QDL_CLK_I2C1] = imx_clk_gate2("i2c1", "ipg_per", base + 0x70, 6);
|
||||||
clk[IMX6QDL_CLK_I2C2] = imx_clk_gate2("i2c2", "ipg_per", base + 0x70, 8);
|
clk[IMX6QDL_CLK_I2C2] = imx_clk_gate2("i2c2", "ipg_per", base + 0x70, 8);
|
||||||
clk[IMX6QDL_CLK_I2C3] = imx_clk_gate2("i2c3", "ipg_per", base + 0x70, 10);
|
clk[IMX6QDL_CLK_I2C3] = imx_clk_gate2("i2c3", "ipg_per", base + 0x70, 10);
|
||||||
|
|
|
@ -797,7 +797,7 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node)
|
||||||
clks[IMX7D_MAIN_AXI_ROOT_CLK] = imx_clk_gate4("main_axi_root_clk", "axi_post_div", base + 0x4040, 0);
|
clks[IMX7D_MAIN_AXI_ROOT_CLK] = imx_clk_gate4("main_axi_root_clk", "axi_post_div", base + 0x4040, 0);
|
||||||
clks[IMX7D_DISP_AXI_ROOT_CLK] = imx_clk_gate4("disp_axi_root_clk", "disp_axi_post_div", base + 0x4050, 0);
|
clks[IMX7D_DISP_AXI_ROOT_CLK] = imx_clk_gate4("disp_axi_root_clk", "disp_axi_post_div", base + 0x4050, 0);
|
||||||
clks[IMX7D_ENET_AXI_ROOT_CLK] = imx_clk_gate4("enet_axi_root_clk", "enet_axi_post_div", base + 0x4060, 0);
|
clks[IMX7D_ENET_AXI_ROOT_CLK] = imx_clk_gate4("enet_axi_root_clk", "enet_axi_post_div", base + 0x4060, 0);
|
||||||
clks[IMX7D_OCRAM_CLK] = imx_clk_gate4("ocram_clk", "axi_post_div", base + 0x4110, 0);
|
clks[IMX7D_OCRAM_CLK] = imx_clk_gate4("ocram_clk", "main_axi_root_clk", base + 0x4110, 0);
|
||||||
clks[IMX7D_OCRAM_S_CLK] = imx_clk_gate4("ocram_s_clk", "ahb_root_clk", base + 0x4120, 0);
|
clks[IMX7D_OCRAM_S_CLK] = imx_clk_gate4("ocram_s_clk", "ahb_root_clk", base + 0x4120, 0);
|
||||||
clks[IMX7D_DRAM_ROOT_CLK] = imx_clk_gate4("dram_root_clk", "dram_post_div", base + 0x4130, 0);
|
clks[IMX7D_DRAM_ROOT_CLK] = imx_clk_gate4("dram_root_clk", "dram_post_div", base + 0x4130, 0);
|
||||||
clks[IMX7D_DRAM_PHYM_ROOT_CLK] = imx_clk_gate4("dram_phym_root_clk", "dram_phym_cg", base + 0x4130, 0);
|
clks[IMX7D_DRAM_PHYM_ROOT_CLK] = imx_clk_gate4("dram_phym_root_clk", "dram_phym_cg", base + 0x4130, 0);
|
||||||
|
|
|
@ -216,6 +216,7 @@ struct mtk_pll_data {
|
||||||
uint32_t pcw_reg;
|
uint32_t pcw_reg;
|
||||||
int pcw_shift;
|
int pcw_shift;
|
||||||
const struct mtk_pll_div_table *div_table;
|
const struct mtk_pll_div_table *div_table;
|
||||||
|
const char *parent_name;
|
||||||
};
|
};
|
||||||
|
|
||||||
void mtk_clk_register_plls(struct device_node *node,
|
void mtk_clk_register_plls(struct device_node *node,
|
||||||
|
|
|
@ -303,6 +303,9 @@ static struct clk *mtk_clk_register_pll(const struct mtk_pll_data *data,
|
||||||
init.name = data->name;
|
init.name = data->name;
|
||||||
init.flags = (data->flags & PLL_AO) ? CLK_IS_CRITICAL : 0;
|
init.flags = (data->flags & PLL_AO) ? CLK_IS_CRITICAL : 0;
|
||||||
init.ops = &mtk_pll_ops;
|
init.ops = &mtk_pll_ops;
|
||||||
|
if (data->parent_name)
|
||||||
|
init.parent_names = &data->parent_name;
|
||||||
|
else
|
||||||
init.parent_names = &parent_name;
|
init.parent_names = &parent_name;
|
||||||
init.num_parents = 1;
|
init.num_parents = 1;
|
||||||
|
|
||||||
|
|
|
@ -2566,7 +2566,7 @@ static int tegra210_enable_pllu(void)
|
||||||
reg |= PLL_ENABLE;
|
reg |= PLL_ENABLE;
|
||||||
writel(reg, clk_base + PLLU_BASE);
|
writel(reg, clk_base + PLLU_BASE);
|
||||||
|
|
||||||
readl_relaxed_poll_timeout(clk_base + PLLU_BASE, reg,
|
readl_relaxed_poll_timeout_atomic(clk_base + PLLU_BASE, reg,
|
||||||
reg & PLL_BASE_LOCK, 2, 1000);
|
reg & PLL_BASE_LOCK, 2, 1000);
|
||||||
if (!(reg & PLL_BASE_LOCK)) {
|
if (!(reg & PLL_BASE_LOCK)) {
|
||||||
pr_err("Timed out waiting for PLL_U to lock\n");
|
pr_err("Timed out waiting for PLL_U to lock\n");
|
||||||
|
|
|
@ -964,7 +964,7 @@ static void __init tegra30_super_clk_init(void)
|
||||||
* U71 divider of cclk_lp.
|
* U71 divider of cclk_lp.
|
||||||
*/
|
*/
|
||||||
clk = tegra_clk_register_divider("pll_p_out3_cclklp", "pll_p_out3",
|
clk = tegra_clk_register_divider("pll_p_out3_cclklp", "pll_p_out3",
|
||||||
clk_base + SUPER_CCLKG_DIVIDER, 0,
|
clk_base + SUPER_CCLKLP_DIVIDER, 0,
|
||||||
TEGRA_DIVIDER_INT, 16, 8, 1, NULL);
|
TEGRA_DIVIDER_INT, 16, 8, 1, NULL);
|
||||||
clk_register_clkdev(clk, "pll_p_out3_cclklp", NULL);
|
clk_register_clkdev(clk, "pll_p_out3_cclklp", NULL);
|
||||||
|
|
||||||
|
|
|
@ -222,7 +222,8 @@ __weak phys_addr_t dax_pgoff_to_phys(struct dev_dax *dev_dax, pgoff_t pgoff,
|
||||||
unsigned long size)
|
unsigned long size)
|
||||||
{
|
{
|
||||||
struct resource *res;
|
struct resource *res;
|
||||||
phys_addr_t phys;
|
/* gcc-4.6.3-nolibc for i386 complains that this is uninitialized */
|
||||||
|
phys_addr_t uninitialized_var(phys);
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
for (i = 0; i < dev_dax->num_resources; i++) {
|
for (i = 0; i < dev_dax->num_resources; i++) {
|
||||||
|
|
|
@ -155,6 +155,12 @@ MODULE_PARM_DESC(run, "Run the test (default: false)");
|
||||||
#define PATTERN_COUNT_MASK 0x1f
|
#define PATTERN_COUNT_MASK 0x1f
|
||||||
#define PATTERN_MEMSET_IDX 0x01
|
#define PATTERN_MEMSET_IDX 0x01
|
||||||
|
|
||||||
|
/* poor man's completion - we want to use wait_event_freezable() on it */
|
||||||
|
struct dmatest_done {
|
||||||
|
bool done;
|
||||||
|
wait_queue_head_t *wait;
|
||||||
|
};
|
||||||
|
|
||||||
struct dmatest_thread {
|
struct dmatest_thread {
|
||||||
struct list_head node;
|
struct list_head node;
|
||||||
struct dmatest_info *info;
|
struct dmatest_info *info;
|
||||||
|
@ -165,6 +171,8 @@ struct dmatest_thread {
|
||||||
u8 **dsts;
|
u8 **dsts;
|
||||||
u8 **udsts;
|
u8 **udsts;
|
||||||
enum dma_transaction_type type;
|
enum dma_transaction_type type;
|
||||||
|
wait_queue_head_t done_wait;
|
||||||
|
struct dmatest_done test_done;
|
||||||
bool done;
|
bool done;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -342,18 +350,25 @@ static unsigned int dmatest_verify(u8 **bufs, unsigned int start,
|
||||||
return error_count;
|
return error_count;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* poor man's completion - we want to use wait_event_freezable() on it */
|
|
||||||
struct dmatest_done {
|
|
||||||
bool done;
|
|
||||||
wait_queue_head_t *wait;
|
|
||||||
};
|
|
||||||
|
|
||||||
static void dmatest_callback(void *arg)
|
static void dmatest_callback(void *arg)
|
||||||
{
|
{
|
||||||
struct dmatest_done *done = arg;
|
struct dmatest_done *done = arg;
|
||||||
|
struct dmatest_thread *thread =
|
||||||
|
container_of(arg, struct dmatest_thread, done_wait);
|
||||||
|
if (!thread->done) {
|
||||||
done->done = true;
|
done->done = true;
|
||||||
wake_up_all(done->wait);
|
wake_up_all(done->wait);
|
||||||
|
} else {
|
||||||
|
/*
|
||||||
|
* If thread->done, it means that this callback occurred
|
||||||
|
* after the parent thread has cleaned up. This can
|
||||||
|
* happen in the case that driver doesn't implement
|
||||||
|
* the terminate_all() functionality and a dma operation
|
||||||
|
* did not occur within the timeout period
|
||||||
|
*/
|
||||||
|
WARN(1, "dmatest: Kernel memory may be corrupted!!\n");
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static unsigned int min_odd(unsigned int x, unsigned int y)
|
static unsigned int min_odd(unsigned int x, unsigned int y)
|
||||||
|
@ -424,9 +439,8 @@ static unsigned long long dmatest_KBs(s64 runtime, unsigned long long len)
|
||||||
*/
|
*/
|
||||||
static int dmatest_func(void *data)
|
static int dmatest_func(void *data)
|
||||||
{
|
{
|
||||||
DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_wait);
|
|
||||||
struct dmatest_thread *thread = data;
|
struct dmatest_thread *thread = data;
|
||||||
struct dmatest_done done = { .wait = &done_wait };
|
struct dmatest_done *done = &thread->test_done;
|
||||||
struct dmatest_info *info;
|
struct dmatest_info *info;
|
||||||
struct dmatest_params *params;
|
struct dmatest_params *params;
|
||||||
struct dma_chan *chan;
|
struct dma_chan *chan;
|
||||||
|
@ -673,9 +687,9 @@ static int dmatest_func(void *data)
|
||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
|
|
||||||
done.done = false;
|
done->done = false;
|
||||||
tx->callback = dmatest_callback;
|
tx->callback = dmatest_callback;
|
||||||
tx->callback_param = &done;
|
tx->callback_param = done;
|
||||||
cookie = tx->tx_submit(tx);
|
cookie = tx->tx_submit(tx);
|
||||||
|
|
||||||
if (dma_submit_error(cookie)) {
|
if (dma_submit_error(cookie)) {
|
||||||
|
@ -688,21 +702,12 @@ static int dmatest_func(void *data)
|
||||||
}
|
}
|
||||||
dma_async_issue_pending(chan);
|
dma_async_issue_pending(chan);
|
||||||
|
|
||||||
wait_event_freezable_timeout(done_wait, done.done,
|
wait_event_freezable_timeout(thread->done_wait, done->done,
|
||||||
msecs_to_jiffies(params->timeout));
|
msecs_to_jiffies(params->timeout));
|
||||||
|
|
||||||
status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
|
status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
|
||||||
|
|
||||||
if (!done.done) {
|
if (!done->done) {
|
||||||
/*
|
|
||||||
* We're leaving the timed out dma operation with
|
|
||||||
* dangling pointer to done_wait. To make this
|
|
||||||
* correct, we'll need to allocate wait_done for
|
|
||||||
* each test iteration and perform "who's gonna
|
|
||||||
* free it this time?" dancing. For now, just
|
|
||||||
* leave it dangling.
|
|
||||||
*/
|
|
||||||
WARN(1, "dmatest: Kernel stack may be corrupted!!\n");
|
|
||||||
dmaengine_unmap_put(um);
|
dmaengine_unmap_put(um);
|
||||||
result("test timed out", total_tests, src_off, dst_off,
|
result("test timed out", total_tests, src_off, dst_off,
|
||||||
len, 0);
|
len, 0);
|
||||||
|
@ -789,7 +794,7 @@ err_thread_type:
|
||||||
dmatest_KBs(runtime, total_len), ret);
|
dmatest_KBs(runtime, total_len), ret);
|
||||||
|
|
||||||
/* terminate all transfers on specified channels */
|
/* terminate all transfers on specified channels */
|
||||||
if (ret)
|
if (ret || failed_tests)
|
||||||
dmaengine_terminate_all(chan);
|
dmaengine_terminate_all(chan);
|
||||||
|
|
||||||
thread->done = true;
|
thread->done = true;
|
||||||
|
@ -849,6 +854,8 @@ static int dmatest_add_threads(struct dmatest_info *info,
|
||||||
thread->info = info;
|
thread->info = info;
|
||||||
thread->chan = dtc->chan;
|
thread->chan = dtc->chan;
|
||||||
thread->type = type;
|
thread->type = type;
|
||||||
|
thread->test_done.wait = &thread->done_wait;
|
||||||
|
init_waitqueue_head(&thread->done_wait);
|
||||||
smp_wmb();
|
smp_wmb();
|
||||||
thread->task = kthread_create(dmatest_func, thread, "%s-%s%u",
|
thread->task = kthread_create(dmatest_func, thread, "%s-%s%u",
|
||||||
dma_chan_name(chan), op, i);
|
dma_chan_name(chan), op, i);
|
||||||
|
|
|
@ -49,12 +49,12 @@ struct ti_am335x_xbar_data {
|
||||||
|
|
||||||
struct ti_am335x_xbar_map {
|
struct ti_am335x_xbar_map {
|
||||||
u16 dma_line;
|
u16 dma_line;
|
||||||
u16 mux_val;
|
u8 mux_val;
|
||||||
};
|
};
|
||||||
|
|
||||||
static inline void ti_am335x_xbar_write(void __iomem *iomem, int event, u16 val)
|
static inline void ti_am335x_xbar_write(void __iomem *iomem, int event, u8 val)
|
||||||
{
|
{
|
||||||
writeb_relaxed(val & 0x1f, iomem + event);
|
writeb_relaxed(val, iomem + event);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void ti_am335x_xbar_free(struct device *dev, void *route_data)
|
static void ti_am335x_xbar_free(struct device *dev, void *route_data)
|
||||||
|
@ -105,7 +105,7 @@ static void *ti_am335x_xbar_route_allocate(struct of_phandle_args *dma_spec,
|
||||||
}
|
}
|
||||||
|
|
||||||
map->dma_line = (u16)dma_spec->args[0];
|
map->dma_line = (u16)dma_spec->args[0];
|
||||||
map->mux_val = (u16)dma_spec->args[2];
|
map->mux_val = (u8)dma_spec->args[2];
|
||||||
|
|
||||||
dma_spec->args[2] = 0;
|
dma_spec->args[2] = 0;
|
||||||
dma_spec->args_count = 2;
|
dma_spec->args_count = 2;
|
||||||
|
|
|
@ -136,6 +136,7 @@ void amdgpu_ring_commit(struct amdgpu_ring *ring)
|
||||||
if (ring->funcs->end_use)
|
if (ring->funcs->end_use)
|
||||||
ring->funcs->end_use(ring);
|
ring->funcs->end_use(ring);
|
||||||
|
|
||||||
|
if (ring->funcs->type != AMDGPU_RING_TYPE_KIQ)
|
||||||
amdgpu_ring_lru_touch(ring->adev, ring);
|
amdgpu_ring_lru_touch(ring->adev, ring);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -196,6 +196,8 @@ static int cp2112_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
|
||||||
HID_REQ_GET_REPORT);
|
HID_REQ_GET_REPORT);
|
||||||
if (ret != CP2112_GPIO_CONFIG_LENGTH) {
|
if (ret != CP2112_GPIO_CONFIG_LENGTH) {
|
||||||
hid_err(hdev, "error requesting GPIO config: %d\n", ret);
|
hid_err(hdev, "error requesting GPIO config: %d\n", ret);
|
||||||
|
if (ret >= 0)
|
||||||
|
ret = -EIO;
|
||||||
goto exit;
|
goto exit;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -205,8 +207,10 @@ static int cp2112_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
|
||||||
ret = hid_hw_raw_request(hdev, CP2112_GPIO_CONFIG, buf,
|
ret = hid_hw_raw_request(hdev, CP2112_GPIO_CONFIG, buf,
|
||||||
CP2112_GPIO_CONFIG_LENGTH, HID_FEATURE_REPORT,
|
CP2112_GPIO_CONFIG_LENGTH, HID_FEATURE_REPORT,
|
||||||
HID_REQ_SET_REPORT);
|
HID_REQ_SET_REPORT);
|
||||||
if (ret < 0) {
|
if (ret != CP2112_GPIO_CONFIG_LENGTH) {
|
||||||
hid_err(hdev, "error setting GPIO config: %d\n", ret);
|
hid_err(hdev, "error setting GPIO config: %d\n", ret);
|
||||||
|
if (ret >= 0)
|
||||||
|
ret = -EIO;
|
||||||
goto exit;
|
goto exit;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -214,7 +218,7 @@ static int cp2112_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
|
||||||
|
|
||||||
exit:
|
exit:
|
||||||
mutex_unlock(&dev->lock);
|
mutex_unlock(&dev->lock);
|
||||||
return ret < 0 ? ret : -EIO;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void cp2112_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
|
static void cp2112_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
|
||||||
|
|
|
@ -852,7 +852,7 @@ static struct notifier_block nb = {
|
||||||
|
|
||||||
int addr_init(void)
|
int addr_init(void)
|
||||||
{
|
{
|
||||||
addr_wq = alloc_ordered_workqueue("ib_addr", WQ_MEM_RECLAIM);
|
addr_wq = alloc_ordered_workqueue("ib_addr", 0);
|
||||||
if (!addr_wq)
|
if (!addr_wq)
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
||||||
|
|
|
@ -1540,7 +1540,7 @@ static struct rdma_id_private *cma_id_from_event(struct ib_cm_id *cm_id,
|
||||||
return id_priv;
|
return id_priv;
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline int cma_user_data_offset(struct rdma_id_private *id_priv)
|
static inline u8 cma_user_data_offset(struct rdma_id_private *id_priv)
|
||||||
{
|
{
|
||||||
return cma_family(id_priv) == AF_IB ? 0 : sizeof(struct cma_hdr);
|
return cma_family(id_priv) == AF_IB ? 0 : sizeof(struct cma_hdr);
|
||||||
}
|
}
|
||||||
|
@ -1942,7 +1942,8 @@ static int cma_req_handler(struct ib_cm_id *cm_id, struct ib_cm_event *ib_event)
|
||||||
struct rdma_id_private *listen_id, *conn_id = NULL;
|
struct rdma_id_private *listen_id, *conn_id = NULL;
|
||||||
struct rdma_cm_event event;
|
struct rdma_cm_event event;
|
||||||
struct net_device *net_dev;
|
struct net_device *net_dev;
|
||||||
int offset, ret;
|
u8 offset;
|
||||||
|
int ret;
|
||||||
|
|
||||||
listen_id = cma_id_from_event(cm_id, ib_event, &net_dev);
|
listen_id = cma_id_from_event(cm_id, ib_event, &net_dev);
|
||||||
if (IS_ERR(listen_id))
|
if (IS_ERR(listen_id))
|
||||||
|
@ -3440,7 +3441,8 @@ static int cma_resolve_ib_udp(struct rdma_id_private *id_priv,
|
||||||
struct ib_cm_sidr_req_param req;
|
struct ib_cm_sidr_req_param req;
|
||||||
struct ib_cm_id *id;
|
struct ib_cm_id *id;
|
||||||
void *private_data;
|
void *private_data;
|
||||||
int offset, ret;
|
u8 offset;
|
||||||
|
int ret;
|
||||||
|
|
||||||
memset(&req, 0, sizeof req);
|
memset(&req, 0, sizeof req);
|
||||||
offset = cma_user_data_offset(id_priv);
|
offset = cma_user_data_offset(id_priv);
|
||||||
|
@ -3497,7 +3499,8 @@ static int cma_connect_ib(struct rdma_id_private *id_priv,
|
||||||
struct rdma_route *route;
|
struct rdma_route *route;
|
||||||
void *private_data;
|
void *private_data;
|
||||||
struct ib_cm_id *id;
|
struct ib_cm_id *id;
|
||||||
int offset, ret;
|
u8 offset;
|
||||||
|
int ret;
|
||||||
|
|
||||||
memset(&req, 0, sizeof req);
|
memset(&req, 0, sizeof req);
|
||||||
offset = cma_user_data_offset(id_priv);
|
offset = cma_user_data_offset(id_priv);
|
||||||
|
|
|
@ -739,8 +739,11 @@ int ib_mad_enforce_security(struct ib_mad_agent_private *map, u16 pkey_index)
|
||||||
if (!rdma_protocol_ib(map->agent.device, map->agent.port_num))
|
if (!rdma_protocol_ib(map->agent.device, map->agent.port_num))
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
if (map->agent.qp->qp_type == IB_QPT_SMI && !map->agent.smp_allowed)
|
if (map->agent.qp->qp_type == IB_QPT_SMI) {
|
||||||
|
if (!map->agent.smp_allowed)
|
||||||
return -EACCES;
|
return -EACCES;
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
return ib_security_pkey_access(map->agent.device,
|
return ib_security_pkey_access(map->agent.device,
|
||||||
map->agent.port_num,
|
map->agent.port_num,
|
||||||
|
|
|
@ -1982,6 +1982,12 @@ static int modify_qp(struct ib_uverbs_file *file,
|
||||||
goto release_qp;
|
goto release_qp;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
if ((cmd->base.attr_mask & IB_QP_ALT_PATH) &&
|
||||||
|
!rdma_is_port_valid(qp->device, cmd->base.alt_port_num)) {
|
||||||
|
ret = -EINVAL;
|
||||||
|
goto release_qp;
|
||||||
|
}
|
||||||
|
|
||||||
attr->qp_state = cmd->base.qp_state;
|
attr->qp_state = cmd->base.qp_state;
|
||||||
attr->cur_qp_state = cmd->base.cur_qp_state;
|
attr->cur_qp_state = cmd->base.cur_qp_state;
|
||||||
attr->path_mtu = cmd->base.path_mtu;
|
attr->path_mtu = cmd->base.path_mtu;
|
||||||
|
|
|
@ -410,6 +410,11 @@ next_cqe:
|
||||||
|
|
||||||
static int cqe_completes_wr(struct t4_cqe *cqe, struct t4_wq *wq)
|
static int cqe_completes_wr(struct t4_cqe *cqe, struct t4_wq *wq)
|
||||||
{
|
{
|
||||||
|
if (CQE_OPCODE(cqe) == C4IW_DRAIN_OPCODE) {
|
||||||
|
WARN_ONCE(1, "Unexpected DRAIN CQE qp id %u!\n", wq->sq.qid);
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
if (CQE_OPCODE(cqe) == FW_RI_TERMINATE)
|
if (CQE_OPCODE(cqe) == FW_RI_TERMINATE)
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
|
|
|
@ -868,7 +868,12 @@ int c4iw_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
|
||||||
|
|
||||||
qhp = to_c4iw_qp(ibqp);
|
qhp = to_c4iw_qp(ibqp);
|
||||||
spin_lock_irqsave(&qhp->lock, flag);
|
spin_lock_irqsave(&qhp->lock, flag);
|
||||||
if (t4_wq_in_error(&qhp->wq)) {
|
|
||||||
|
/*
|
||||||
|
* If the qp has been flushed, then just insert a special
|
||||||
|
* drain cqe.
|
||||||
|
*/
|
||||||
|
if (qhp->wq.flushed) {
|
||||||
spin_unlock_irqrestore(&qhp->lock, flag);
|
spin_unlock_irqrestore(&qhp->lock, flag);
|
||||||
complete_sq_drain_wr(qhp, wr);
|
complete_sq_drain_wr(qhp, wr);
|
||||||
return err;
|
return err;
|
||||||
|
@ -1012,7 +1017,12 @@ int c4iw_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
|
||||||
|
|
||||||
qhp = to_c4iw_qp(ibqp);
|
qhp = to_c4iw_qp(ibqp);
|
||||||
spin_lock_irqsave(&qhp->lock, flag);
|
spin_lock_irqsave(&qhp->lock, flag);
|
||||||
if (t4_wq_in_error(&qhp->wq)) {
|
|
||||||
|
/*
|
||||||
|
* If the qp has been flushed, then just insert a special
|
||||||
|
* drain cqe.
|
||||||
|
*/
|
||||||
|
if (qhp->wq.flushed) {
|
||||||
spin_unlock_irqrestore(&qhp->lock, flag);
|
spin_unlock_irqrestore(&qhp->lock, flag);
|
||||||
complete_rq_drain_wr(qhp, wr);
|
complete_rq_drain_wr(qhp, wr);
|
||||||
return err;
|
return err;
|
||||||
|
|
|
@ -171,7 +171,7 @@ struct t4_cqe {
|
||||||
__be32 msn;
|
__be32 msn;
|
||||||
} rcqe;
|
} rcqe;
|
||||||
struct {
|
struct {
|
||||||
u32 stag;
|
__be32 stag;
|
||||||
u16 nada2;
|
u16 nada2;
|
||||||
u16 cidx;
|
u16 cidx;
|
||||||
} scqe;
|
} scqe;
|
||||||
|
|
|
@ -9952,7 +9952,7 @@ int hfi1_get_ib_cfg(struct hfi1_pportdata *ppd, int which)
|
||||||
goto unimplemented;
|
goto unimplemented;
|
||||||
|
|
||||||
case HFI1_IB_CFG_OP_VLS:
|
case HFI1_IB_CFG_OP_VLS:
|
||||||
val = ppd->vls_operational;
|
val = ppd->actual_vls_operational;
|
||||||
break;
|
break;
|
||||||
case HFI1_IB_CFG_VL_HIGH_CAP: /* VL arb high priority table size */
|
case HFI1_IB_CFG_VL_HIGH_CAP: /* VL arb high priority table size */
|
||||||
val = VL_ARB_HIGH_PRIO_TABLE_SIZE;
|
val = VL_ARB_HIGH_PRIO_TABLE_SIZE;
|
||||||
|
|
|
@ -154,7 +154,7 @@ void hfi1_trace_parse_9b_bth(struct ib_other_headers *ohdr,
|
||||||
*opcode = ib_bth_get_opcode(ohdr);
|
*opcode = ib_bth_get_opcode(ohdr);
|
||||||
*tver = ib_bth_get_tver(ohdr);
|
*tver = ib_bth_get_tver(ohdr);
|
||||||
*pkey = ib_bth_get_pkey(ohdr);
|
*pkey = ib_bth_get_pkey(ohdr);
|
||||||
*psn = ib_bth_get_psn(ohdr);
|
*psn = mask_psn(ib_bth_get_psn(ohdr));
|
||||||
*qpn = ib_bth_get_qpn(ohdr);
|
*qpn = ib_bth_get_qpn(ohdr);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -169,7 +169,7 @@ void hfi1_trace_parse_16b_bth(struct ib_other_headers *ohdr,
|
||||||
*pad = ib_bth_get_pad(ohdr);
|
*pad = ib_bth_get_pad(ohdr);
|
||||||
*se = ib_bth_get_se(ohdr);
|
*se = ib_bth_get_se(ohdr);
|
||||||
*tver = ib_bth_get_tver(ohdr);
|
*tver = ib_bth_get_tver(ohdr);
|
||||||
*psn = ib_bth_get_psn(ohdr);
|
*psn = mask_psn(ib_bth_get_psn(ohdr));
|
||||||
*qpn = ib_bth_get_qpn(ohdr);
|
*qpn = ib_bth_get_qpn(ohdr);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -2182,11 +2182,6 @@ static int __mlx4_ib_modify_qp(void *src, enum mlx4_ib_source_type src_type,
|
||||||
context->flags = cpu_to_be32((to_mlx4_state(new_state) << 28) |
|
context->flags = cpu_to_be32((to_mlx4_state(new_state) << 28) |
|
||||||
(to_mlx4_st(dev, qp->mlx4_ib_qp_type) << 16));
|
(to_mlx4_st(dev, qp->mlx4_ib_qp_type) << 16));
|
||||||
|
|
||||||
if (rwq_ind_tbl) {
|
|
||||||
fill_qp_rss_context(context, qp);
|
|
||||||
context->flags |= cpu_to_be32(1 << MLX4_RSS_QPC_FLAG_OFFSET);
|
|
||||||
}
|
|
||||||
|
|
||||||
if (!(attr_mask & IB_QP_PATH_MIG_STATE))
|
if (!(attr_mask & IB_QP_PATH_MIG_STATE))
|
||||||
context->flags |= cpu_to_be32(MLX4_QP_PM_MIGRATED << 11);
|
context->flags |= cpu_to_be32(MLX4_QP_PM_MIGRATED << 11);
|
||||||
else {
|
else {
|
||||||
|
@ -2387,6 +2382,7 @@ static int __mlx4_ib_modify_qp(void *src, enum mlx4_ib_source_type src_type,
|
||||||
context->pd = cpu_to_be32(pd->pdn);
|
context->pd = cpu_to_be32(pd->pdn);
|
||||||
|
|
||||||
if (!rwq_ind_tbl) {
|
if (!rwq_ind_tbl) {
|
||||||
|
context->params1 = cpu_to_be32(MLX4_IB_ACK_REQ_FREQ << 28);
|
||||||
get_cqs(qp, src_type, &send_cq, &recv_cq);
|
get_cqs(qp, src_type, &send_cq, &recv_cq);
|
||||||
} else { /* Set dummy CQs to be compatible with HV and PRM */
|
} else { /* Set dummy CQs to be compatible with HV and PRM */
|
||||||
send_cq = to_mcq(rwq_ind_tbl->ind_tbl[0]->cq);
|
send_cq = to_mcq(rwq_ind_tbl->ind_tbl[0]->cq);
|
||||||
|
@ -2394,7 +2390,6 @@ static int __mlx4_ib_modify_qp(void *src, enum mlx4_ib_source_type src_type,
|
||||||
}
|
}
|
||||||
context->cqn_send = cpu_to_be32(send_cq->mcq.cqn);
|
context->cqn_send = cpu_to_be32(send_cq->mcq.cqn);
|
||||||
context->cqn_recv = cpu_to_be32(recv_cq->mcq.cqn);
|
context->cqn_recv = cpu_to_be32(recv_cq->mcq.cqn);
|
||||||
context->params1 = cpu_to_be32(MLX4_IB_ACK_REQ_FREQ << 28);
|
|
||||||
|
|
||||||
/* Set "fast registration enabled" for all kernel QPs */
|
/* Set "fast registration enabled" for all kernel QPs */
|
||||||
if (!ibuobject)
|
if (!ibuobject)
|
||||||
|
@ -2513,7 +2508,7 @@ static int __mlx4_ib_modify_qp(void *src, enum mlx4_ib_source_type src_type,
|
||||||
MLX4_IB_LINK_TYPE_ETH;
|
MLX4_IB_LINK_TYPE_ETH;
|
||||||
if (dev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
|
if (dev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
|
||||||
/* set QP to receive both tunneled & non-tunneled packets */
|
/* set QP to receive both tunneled & non-tunneled packets */
|
||||||
if (!(context->flags & cpu_to_be32(1 << MLX4_RSS_QPC_FLAG_OFFSET)))
|
if (!rwq_ind_tbl)
|
||||||
context->srqn = cpu_to_be32(7 << 28);
|
context->srqn = cpu_to_be32(7 << 28);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -2562,6 +2557,13 @@ static int __mlx4_ib_modify_qp(void *src, enum mlx4_ib_source_type src_type,
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
if (rwq_ind_tbl &&
|
||||||
|
cur_state == IB_QPS_RESET &&
|
||||||
|
new_state == IB_QPS_INIT) {
|
||||||
|
fill_qp_rss_context(context, qp);
|
||||||
|
context->flags |= cpu_to_be32(1 << MLX4_RSS_QPC_FLAG_OFFSET);
|
||||||
|
}
|
||||||
|
|
||||||
err = mlx4_qp_modify(dev->dev, &qp->mtt, to_mlx4_state(cur_state),
|
err = mlx4_qp_modify(dev->dev, &qp->mtt, to_mlx4_state(cur_state),
|
||||||
to_mlx4_state(new_state), context, optpar,
|
to_mlx4_state(new_state), context, optpar,
|
||||||
sqd_event, &qp->mqp);
|
sqd_event, &qp->mqp);
|
||||||
|
|
|
@ -1203,10 +1203,15 @@ static void __ipoib_ib_dev_flush(struct ipoib_dev_priv *priv,
|
||||||
ipoib_ib_dev_down(dev);
|
ipoib_ib_dev_down(dev);
|
||||||
|
|
||||||
if (level == IPOIB_FLUSH_HEAVY) {
|
if (level == IPOIB_FLUSH_HEAVY) {
|
||||||
|
rtnl_lock();
|
||||||
if (test_bit(IPOIB_FLAG_INITIALIZED, &priv->flags))
|
if (test_bit(IPOIB_FLAG_INITIALIZED, &priv->flags))
|
||||||
ipoib_ib_dev_stop(dev);
|
ipoib_ib_dev_stop(dev);
|
||||||
if (ipoib_ib_dev_open(dev) != 0)
|
|
||||||
|
result = ipoib_ib_dev_open(dev);
|
||||||
|
rtnl_unlock();
|
||||||
|
if (result)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
if (netif_queue_stopped(dev))
|
if (netif_queue_stopped(dev))
|
||||||
netif_start_queue(dev);
|
netif_start_queue(dev);
|
||||||
}
|
}
|
||||||
|
|
|
@ -3155,7 +3155,7 @@ static void amd_iommu_apply_resv_region(struct device *dev,
|
||||||
unsigned long start, end;
|
unsigned long start, end;
|
||||||
|
|
||||||
start = IOVA_PFN(region->start);
|
start = IOVA_PFN(region->start);
|
||||||
end = IOVA_PFN(region->start + region->length);
|
end = IOVA_PFN(region->start + region->length - 1);
|
||||||
|
|
||||||
WARN_ON_ONCE(reserve_iova(&dma_dom->iovad, start, end) == NULL);
|
WARN_ON_ONCE(reserve_iova(&dma_dom->iovad, start, end) == NULL);
|
||||||
}
|
}
|
||||||
|
|
|
@ -708,7 +708,7 @@ static struct platform_driver mtk_iommu_driver = {
|
||||||
.probe = mtk_iommu_probe,
|
.probe = mtk_iommu_probe,
|
||||||
.remove = mtk_iommu_remove,
|
.remove = mtk_iommu_remove,
|
||||||
.driver = {
|
.driver = {
|
||||||
.name = "mtk-iommu",
|
.name = "mtk-iommu-v1",
|
||||||
.of_match_table = mtk_iommu_of_ids,
|
.of_match_table = mtk_iommu_of_ids,
|
||||||
.pm = &mtk_iommu_pm_ops,
|
.pm = &mtk_iommu_pm_ops,
|
||||||
}
|
}
|
||||||
|
|
|
@ -193,7 +193,7 @@ void pblk_bio_free_pages(struct pblk *pblk, struct bio *bio, int off,
|
||||||
bio_advance(bio, off * PBLK_EXPOSED_PAGE_SIZE);
|
bio_advance(bio, off * PBLK_EXPOSED_PAGE_SIZE);
|
||||||
for (i = off; i < nr_pages + off; i++) {
|
for (i = off; i < nr_pages + off; i++) {
|
||||||
bv = bio->bi_io_vec[i];
|
bv = bio->bi_io_vec[i];
|
||||||
mempool_free(bv.bv_page, pblk->page_pool);
|
mempool_free(bv.bv_page, pblk->page_bio_pool);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -205,14 +205,14 @@ int pblk_bio_add_pages(struct pblk *pblk, struct bio *bio, gfp_t flags,
|
||||||
int i, ret;
|
int i, ret;
|
||||||
|
|
||||||
for (i = 0; i < nr_pages; i++) {
|
for (i = 0; i < nr_pages; i++) {
|
||||||
page = mempool_alloc(pblk->page_pool, flags);
|
page = mempool_alloc(pblk->page_bio_pool, flags);
|
||||||
if (!page)
|
if (!page)
|
||||||
goto err;
|
goto err;
|
||||||
|
|
||||||
ret = bio_add_pc_page(q, bio, page, PBLK_EXPOSED_PAGE_SIZE, 0);
|
ret = bio_add_pc_page(q, bio, page, PBLK_EXPOSED_PAGE_SIZE, 0);
|
||||||
if (ret != PBLK_EXPOSED_PAGE_SIZE) {
|
if (ret != PBLK_EXPOSED_PAGE_SIZE) {
|
||||||
pr_err("pblk: could not add page to bio\n");
|
pr_err("pblk: could not add page to bio\n");
|
||||||
mempool_free(page, pblk->page_pool);
|
mempool_free(page, pblk->page_bio_pool);
|
||||||
goto err;
|
goto err;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -486,12 +486,14 @@ void pblk_dealloc_page(struct pblk *pblk, struct pblk_line *line, int nr_secs)
|
||||||
u64 addr;
|
u64 addr;
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
|
spin_lock(&line->lock);
|
||||||
addr = find_next_zero_bit(line->map_bitmap,
|
addr = find_next_zero_bit(line->map_bitmap,
|
||||||
pblk->lm.sec_per_line, line->cur_sec);
|
pblk->lm.sec_per_line, line->cur_sec);
|
||||||
line->cur_sec = addr - nr_secs;
|
line->cur_sec = addr - nr_secs;
|
||||||
|
|
||||||
for (i = 0; i < nr_secs; i++, line->cur_sec--)
|
for (i = 0; i < nr_secs; i++, line->cur_sec--)
|
||||||
WARN_ON(!test_and_clear_bit(line->cur_sec, line->map_bitmap));
|
WARN_ON(!test_and_clear_bit(line->cur_sec, line->map_bitmap));
|
||||||
|
spin_unlock(&line->lock);
|
||||||
}
|
}
|
||||||
|
|
||||||
u64 __pblk_alloc_page(struct pblk *pblk, struct pblk_line *line, int nr_secs)
|
u64 __pblk_alloc_page(struct pblk *pblk, struct pblk_line *line, int nr_secs)
|
||||||
|
|
|
@ -486,11 +486,11 @@ void pblk_gc_should_start(struct pblk *pblk)
|
||||||
{
|
{
|
||||||
struct pblk_gc *gc = &pblk->gc;
|
struct pblk_gc *gc = &pblk->gc;
|
||||||
|
|
||||||
if (gc->gc_enabled && !gc->gc_active)
|
if (gc->gc_enabled && !gc->gc_active) {
|
||||||
pblk_gc_start(pblk);
|
pblk_gc_start(pblk);
|
||||||
|
|
||||||
pblk_gc_kick(pblk);
|
pblk_gc_kick(pblk);
|
||||||
}
|
}
|
||||||
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* If flush_wq == 1 then no lock should be held by the caller since
|
* If flush_wq == 1 then no lock should be held by the caller since
|
||||||
|
@ -628,7 +628,8 @@ void pblk_gc_exit(struct pblk *pblk)
|
||||||
flush_workqueue(gc->gc_reader_wq);
|
flush_workqueue(gc->gc_reader_wq);
|
||||||
flush_workqueue(gc->gc_line_reader_wq);
|
flush_workqueue(gc->gc_line_reader_wq);
|
||||||
|
|
||||||
del_timer(&gc->gc_timer);
|
gc->gc_enabled = 0;
|
||||||
|
del_timer_sync(&gc->gc_timer);
|
||||||
pblk_gc_stop(pblk, 1);
|
pblk_gc_stop(pblk, 1);
|
||||||
|
|
||||||
if (gc->gc_ts)
|
if (gc->gc_ts)
|
||||||
|
|
|
@ -132,7 +132,6 @@ static int pblk_rwb_init(struct pblk *pblk)
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Minimum pages needed within a lun */
|
/* Minimum pages needed within a lun */
|
||||||
#define PAGE_POOL_SIZE 16
|
|
||||||
#define ADDR_POOL_SIZE 64
|
#define ADDR_POOL_SIZE 64
|
||||||
|
|
||||||
static int pblk_set_ppaf(struct pblk *pblk)
|
static int pblk_set_ppaf(struct pblk *pblk)
|
||||||
|
@ -247,14 +246,16 @@ static int pblk_core_init(struct pblk *pblk)
|
||||||
if (pblk_init_global_caches(pblk))
|
if (pblk_init_global_caches(pblk))
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
||||||
pblk->page_pool = mempool_create_page_pool(PAGE_POOL_SIZE, 0);
|
/* internal bios can be at most the sectors signaled by the device. */
|
||||||
if (!pblk->page_pool)
|
pblk->page_bio_pool = mempool_create_page_pool(nvm_max_phys_sects(dev),
|
||||||
|
0);
|
||||||
|
if (!pblk->page_bio_pool)
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
||||||
pblk->line_ws_pool = mempool_create_slab_pool(PBLK_WS_POOL_SIZE,
|
pblk->line_ws_pool = mempool_create_slab_pool(PBLK_WS_POOL_SIZE,
|
||||||
pblk_blk_ws_cache);
|
pblk_blk_ws_cache);
|
||||||
if (!pblk->line_ws_pool)
|
if (!pblk->line_ws_pool)
|
||||||
goto free_page_pool;
|
goto free_page_bio_pool;
|
||||||
|
|
||||||
pblk->rec_pool = mempool_create_slab_pool(geo->nr_luns, pblk_rec_cache);
|
pblk->rec_pool = mempool_create_slab_pool(geo->nr_luns, pblk_rec_cache);
|
||||||
if (!pblk->rec_pool)
|
if (!pblk->rec_pool)
|
||||||
|
@ -309,8 +310,8 @@ free_rec_pool:
|
||||||
mempool_destroy(pblk->rec_pool);
|
mempool_destroy(pblk->rec_pool);
|
||||||
free_blk_ws_pool:
|
free_blk_ws_pool:
|
||||||
mempool_destroy(pblk->line_ws_pool);
|
mempool_destroy(pblk->line_ws_pool);
|
||||||
free_page_pool:
|
free_page_bio_pool:
|
||||||
mempool_destroy(pblk->page_pool);
|
mempool_destroy(pblk->page_bio_pool);
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -322,7 +323,7 @@ static void pblk_core_free(struct pblk *pblk)
|
||||||
if (pblk->bb_wq)
|
if (pblk->bb_wq)
|
||||||
destroy_workqueue(pblk->bb_wq);
|
destroy_workqueue(pblk->bb_wq);
|
||||||
|
|
||||||
mempool_destroy(pblk->page_pool);
|
mempool_destroy(pblk->page_bio_pool);
|
||||||
mempool_destroy(pblk->line_ws_pool);
|
mempool_destroy(pblk->line_ws_pool);
|
||||||
mempool_destroy(pblk->rec_pool);
|
mempool_destroy(pblk->rec_pool);
|
||||||
mempool_destroy(pblk->g_rq_pool);
|
mempool_destroy(pblk->g_rq_pool);
|
||||||
|
@ -681,8 +682,8 @@ static int pblk_lines_init(struct pblk *pblk)
|
||||||
lm->blk_bitmap_len = BITS_TO_LONGS(geo->nr_luns) * sizeof(long);
|
lm->blk_bitmap_len = BITS_TO_LONGS(geo->nr_luns) * sizeof(long);
|
||||||
lm->sec_bitmap_len = BITS_TO_LONGS(lm->sec_per_line) * sizeof(long);
|
lm->sec_bitmap_len = BITS_TO_LONGS(lm->sec_per_line) * sizeof(long);
|
||||||
lm->lun_bitmap_len = BITS_TO_LONGS(geo->nr_luns) * sizeof(long);
|
lm->lun_bitmap_len = BITS_TO_LONGS(geo->nr_luns) * sizeof(long);
|
||||||
lm->high_thrs = lm->sec_per_line / 2;
|
lm->mid_thrs = lm->sec_per_line / 2;
|
||||||
lm->mid_thrs = lm->sec_per_line / 4;
|
lm->high_thrs = lm->sec_per_line / 4;
|
||||||
lm->meta_distance = (geo->nr_luns / 2) * pblk->min_write_pgs;
|
lm->meta_distance = (geo->nr_luns / 2) * pblk->min_write_pgs;
|
||||||
|
|
||||||
/* Calculate necessary pages for smeta. See comment over struct
|
/* Calculate necessary pages for smeta. See comment over struct
|
||||||
|
@ -923,6 +924,7 @@ static void *pblk_init(struct nvm_tgt_dev *dev, struct gendisk *tdisk,
|
||||||
pblk->dev = dev;
|
pblk->dev = dev;
|
||||||
pblk->disk = tdisk;
|
pblk->disk = tdisk;
|
||||||
pblk->state = PBLK_STATE_RUNNING;
|
pblk->state = PBLK_STATE_RUNNING;
|
||||||
|
pblk->gc.gc_enabled = 0;
|
||||||
|
|
||||||
spin_lock_init(&pblk->trans_lock);
|
spin_lock_init(&pblk->trans_lock);
|
||||||
spin_lock_init(&pblk->lock);
|
spin_lock_init(&pblk->lock);
|
||||||
|
@ -944,6 +946,7 @@ static void *pblk_init(struct nvm_tgt_dev *dev, struct gendisk *tdisk,
|
||||||
atomic_long_set(&pblk->recov_writes, 0);
|
atomic_long_set(&pblk->recov_writes, 0);
|
||||||
atomic_long_set(&pblk->recov_writes, 0);
|
atomic_long_set(&pblk->recov_writes, 0);
|
||||||
atomic_long_set(&pblk->recov_gc_writes, 0);
|
atomic_long_set(&pblk->recov_gc_writes, 0);
|
||||||
|
atomic_long_set(&pblk->recov_gc_reads, 0);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
atomic_long_set(&pblk->read_failed, 0);
|
atomic_long_set(&pblk->read_failed, 0);
|
||||||
|
|
|
@ -238,7 +238,7 @@ static int pblk_fill_partial_read_bio(struct pblk *pblk, struct nvm_rq *rqd,
|
||||||
kunmap_atomic(src_p);
|
kunmap_atomic(src_p);
|
||||||
kunmap_atomic(dst_p);
|
kunmap_atomic(dst_p);
|
||||||
|
|
||||||
mempool_free(src_bv.bv_page, pblk->page_pool);
|
mempool_free(src_bv.bv_page, pblk->page_bio_pool);
|
||||||
|
|
||||||
hole = find_next_zero_bit(read_bitmap, nr_secs, hole + 1);
|
hole = find_next_zero_bit(read_bitmap, nr_secs, hole + 1);
|
||||||
} while (hole < nr_secs);
|
} while (hole < nr_secs);
|
||||||
|
@ -499,7 +499,7 @@ int pblk_submit_read_gc(struct pblk *pblk, u64 *lba_list, void *data,
|
||||||
|
|
||||||
data_len = (*secs_to_gc) * geo->sec_size;
|
data_len = (*secs_to_gc) * geo->sec_size;
|
||||||
bio = pblk_bio_map_addr(pblk, data, *secs_to_gc, data_len,
|
bio = pblk_bio_map_addr(pblk, data, *secs_to_gc, data_len,
|
||||||
PBLK_KMALLOC_META, GFP_KERNEL);
|
PBLK_VMALLOC_META, GFP_KERNEL);
|
||||||
if (IS_ERR(bio)) {
|
if (IS_ERR(bio)) {
|
||||||
pr_err("pblk: could not allocate GC bio (%lu)\n", PTR_ERR(bio));
|
pr_err("pblk: could not allocate GC bio (%lu)\n", PTR_ERR(bio));
|
||||||
goto err_free_dma;
|
goto err_free_dma;
|
||||||
|
@ -519,7 +519,7 @@ int pblk_submit_read_gc(struct pblk *pblk, u64 *lba_list, void *data,
|
||||||
if (ret) {
|
if (ret) {
|
||||||
bio_endio(bio);
|
bio_endio(bio);
|
||||||
pr_err("pblk: GC read request failed\n");
|
pr_err("pblk: GC read request failed\n");
|
||||||
goto err_free_dma;
|
goto err_free_bio;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (!wait_for_completion_io_timeout(&wait,
|
if (!wait_for_completion_io_timeout(&wait,
|
||||||
|
@ -541,10 +541,13 @@ int pblk_submit_read_gc(struct pblk *pblk, u64 *lba_list, void *data,
|
||||||
atomic_long_sub(*secs_to_gc, &pblk->inflight_reads);
|
atomic_long_sub(*secs_to_gc, &pblk->inflight_reads);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
bio_put(bio);
|
||||||
out:
|
out:
|
||||||
nvm_dev_dma_free(dev->parent, rqd.meta_list, rqd.dma_meta_list);
|
nvm_dev_dma_free(dev->parent, rqd.meta_list, rqd.dma_meta_list);
|
||||||
return NVM_IO_OK;
|
return NVM_IO_OK;
|
||||||
|
|
||||||
|
err_free_bio:
|
||||||
|
bio_put(bio);
|
||||||
err_free_dma:
|
err_free_dma:
|
||||||
nvm_dev_dma_free(dev->parent, rqd.meta_list, rqd.dma_meta_list);
|
nvm_dev_dma_free(dev->parent, rqd.meta_list, rqd.dma_meta_list);
|
||||||
return NVM_IO_ERR;
|
return NVM_IO_ERR;
|
||||||
|
|
|
@ -618,7 +618,7 @@ struct pblk {
|
||||||
|
|
||||||
struct list_head compl_list;
|
struct list_head compl_list;
|
||||||
|
|
||||||
mempool_t *page_pool;
|
mempool_t *page_bio_pool;
|
||||||
mempool_t *line_ws_pool;
|
mempool_t *line_ws_pool;
|
||||||
mempool_t *rec_pool;
|
mempool_t *rec_pool;
|
||||||
mempool_t *g_rq_pool;
|
mempool_t *g_rq_pool;
|
||||||
|
|
|
@ -463,6 +463,7 @@ struct search {
|
||||||
unsigned recoverable:1;
|
unsigned recoverable:1;
|
||||||
unsigned write:1;
|
unsigned write:1;
|
||||||
unsigned read_dirty_data:1;
|
unsigned read_dirty_data:1;
|
||||||
|
unsigned cache_missed:1;
|
||||||
|
|
||||||
unsigned long start_time;
|
unsigned long start_time;
|
||||||
|
|
||||||
|
@ -649,6 +650,7 @@ static inline struct search *search_alloc(struct bio *bio,
|
||||||
|
|
||||||
s->orig_bio = bio;
|
s->orig_bio = bio;
|
||||||
s->cache_miss = NULL;
|
s->cache_miss = NULL;
|
||||||
|
s->cache_missed = 0;
|
||||||
s->d = d;
|
s->d = d;
|
||||||
s->recoverable = 1;
|
s->recoverable = 1;
|
||||||
s->write = op_is_write(bio_op(bio));
|
s->write = op_is_write(bio_op(bio));
|
||||||
|
@ -767,7 +769,7 @@ static void cached_dev_read_done_bh(struct closure *cl)
|
||||||
struct cached_dev *dc = container_of(s->d, struct cached_dev, disk);
|
struct cached_dev *dc = container_of(s->d, struct cached_dev, disk);
|
||||||
|
|
||||||
bch_mark_cache_accounting(s->iop.c, s->d,
|
bch_mark_cache_accounting(s->iop.c, s->d,
|
||||||
!s->cache_miss, s->iop.bypass);
|
!s->cache_missed, s->iop.bypass);
|
||||||
trace_bcache_read(s->orig_bio, !s->cache_miss, s->iop.bypass);
|
trace_bcache_read(s->orig_bio, !s->cache_miss, s->iop.bypass);
|
||||||
|
|
||||||
if (s->iop.status)
|
if (s->iop.status)
|
||||||
|
@ -786,6 +788,8 @@ static int cached_dev_cache_miss(struct btree *b, struct search *s,
|
||||||
struct cached_dev *dc = container_of(s->d, struct cached_dev, disk);
|
struct cached_dev *dc = container_of(s->d, struct cached_dev, disk);
|
||||||
struct bio *miss, *cache_bio;
|
struct bio *miss, *cache_bio;
|
||||||
|
|
||||||
|
s->cache_missed = 1;
|
||||||
|
|
||||||
if (s->cache_miss || s->iop.bypass) {
|
if (s->cache_miss || s->iop.bypass) {
|
||||||
miss = bio_next_split(bio, sectors, GFP_NOIO, s->d->bio_split);
|
miss = bio_next_split(bio, sectors, GFP_NOIO, s->d->bio_split);
|
||||||
ret = miss == bio ? MAP_DONE : MAP_CONTINUE;
|
ret = miss == bio ? MAP_DONE : MAP_CONTINUE;
|
||||||
|
|
|
@ -2085,6 +2085,7 @@ static void bcache_exit(void)
|
||||||
if (bcache_major)
|
if (bcache_major)
|
||||||
unregister_blkdev(bcache_major, "bcache");
|
unregister_blkdev(bcache_major, "bcache");
|
||||||
unregister_reboot_notifier(&reboot);
|
unregister_reboot_notifier(&reboot);
|
||||||
|
mutex_destroy(&bch_register_lock);
|
||||||
}
|
}
|
||||||
|
|
||||||
static int __init bcache_init(void)
|
static int __init bcache_init(void)
|
||||||
|
@ -2103,14 +2104,15 @@ static int __init bcache_init(void)
|
||||||
bcache_major = register_blkdev(0, "bcache");
|
bcache_major = register_blkdev(0, "bcache");
|
||||||
if (bcache_major < 0) {
|
if (bcache_major < 0) {
|
||||||
unregister_reboot_notifier(&reboot);
|
unregister_reboot_notifier(&reboot);
|
||||||
|
mutex_destroy(&bch_register_lock);
|
||||||
return bcache_major;
|
return bcache_major;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (!(bcache_wq = alloc_workqueue("bcache", WQ_MEM_RECLAIM, 0)) ||
|
if (!(bcache_wq = alloc_workqueue("bcache", WQ_MEM_RECLAIM, 0)) ||
|
||||||
!(bcache_kobj = kobject_create_and_add("bcache", fs_kobj)) ||
|
!(bcache_kobj = kobject_create_and_add("bcache", fs_kobj)) ||
|
||||||
sysfs_create_files(bcache_kobj, files) ||
|
|
||||||
bch_request_init() ||
|
bch_request_init() ||
|
||||||
bch_debug_init(bcache_kobj))
|
bch_debug_init(bcache_kobj) ||
|
||||||
|
sysfs_create_files(bcache_kobj, files))
|
||||||
goto err;
|
goto err;
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
|
|
@ -3554,18 +3554,18 @@ static int __init dm_cache_init(void)
|
||||||
{
|
{
|
||||||
int r;
|
int r;
|
||||||
|
|
||||||
r = dm_register_target(&cache_target);
|
|
||||||
if (r) {
|
|
||||||
DMERR("cache target registration failed: %d", r);
|
|
||||||
return r;
|
|
||||||
}
|
|
||||||
|
|
||||||
migration_cache = KMEM_CACHE(dm_cache_migration, 0);
|
migration_cache = KMEM_CACHE(dm_cache_migration, 0);
|
||||||
if (!migration_cache) {
|
if (!migration_cache) {
|
||||||
dm_unregister_target(&cache_target);
|
dm_unregister_target(&cache_target);
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
r = dm_register_target(&cache_target);
|
||||||
|
if (r) {
|
||||||
|
DMERR("cache target registration failed: %d", r);
|
||||||
|
return r;
|
||||||
|
}
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -1965,13 +1965,6 @@ static int __init dm_multipath_init(void)
|
||||||
{
|
{
|
||||||
int r;
|
int r;
|
||||||
|
|
||||||
r = dm_register_target(&multipath_target);
|
|
||||||
if (r < 0) {
|
|
||||||
DMERR("request-based register failed %d", r);
|
|
||||||
r = -EINVAL;
|
|
||||||
goto bad_register_target;
|
|
||||||
}
|
|
||||||
|
|
||||||
kmultipathd = alloc_workqueue("kmpathd", WQ_MEM_RECLAIM, 0);
|
kmultipathd = alloc_workqueue("kmpathd", WQ_MEM_RECLAIM, 0);
|
||||||
if (!kmultipathd) {
|
if (!kmultipathd) {
|
||||||
DMERR("failed to create workqueue kmpathd");
|
DMERR("failed to create workqueue kmpathd");
|
||||||
|
@ -1993,13 +1986,20 @@ static int __init dm_multipath_init(void)
|
||||||
goto bad_alloc_kmpath_handlerd;
|
goto bad_alloc_kmpath_handlerd;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
r = dm_register_target(&multipath_target);
|
||||||
|
if (r < 0) {
|
||||||
|
DMERR("request-based register failed %d", r);
|
||||||
|
r = -EINVAL;
|
||||||
|
goto bad_register_target;
|
||||||
|
}
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
|
bad_register_target:
|
||||||
|
destroy_workqueue(kmpath_handlerd);
|
||||||
bad_alloc_kmpath_handlerd:
|
bad_alloc_kmpath_handlerd:
|
||||||
destroy_workqueue(kmultipathd);
|
destroy_workqueue(kmultipathd);
|
||||||
bad_alloc_kmultipathd:
|
bad_alloc_kmultipathd:
|
||||||
dm_unregister_target(&multipath_target);
|
|
||||||
bad_register_target:
|
|
||||||
return r;
|
return r;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -2411,24 +2411,6 @@ static int __init dm_snapshot_init(void)
|
||||||
return r;
|
return r;
|
||||||
}
|
}
|
||||||
|
|
||||||
r = dm_register_target(&snapshot_target);
|
|
||||||
if (r < 0) {
|
|
||||||
DMERR("snapshot target register failed %d", r);
|
|
||||||
goto bad_register_snapshot_target;
|
|
||||||
}
|
|
||||||
|
|
||||||
r = dm_register_target(&origin_target);
|
|
||||||
if (r < 0) {
|
|
||||||
DMERR("Origin target register failed %d", r);
|
|
||||||
goto bad_register_origin_target;
|
|
||||||
}
|
|
||||||
|
|
||||||
r = dm_register_target(&merge_target);
|
|
||||||
if (r < 0) {
|
|
||||||
DMERR("Merge target register failed %d", r);
|
|
||||||
goto bad_register_merge_target;
|
|
||||||
}
|
|
||||||
|
|
||||||
r = init_origin_hash();
|
r = init_origin_hash();
|
||||||
if (r) {
|
if (r) {
|
||||||
DMERR("init_origin_hash failed.");
|
DMERR("init_origin_hash failed.");
|
||||||
|
@ -2449,19 +2431,37 @@ static int __init dm_snapshot_init(void)
|
||||||
goto bad_pending_cache;
|
goto bad_pending_cache;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
r = dm_register_target(&snapshot_target);
|
||||||
|
if (r < 0) {
|
||||||
|
DMERR("snapshot target register failed %d", r);
|
||||||
|
goto bad_register_snapshot_target;
|
||||||
|
}
|
||||||
|
|
||||||
|
r = dm_register_target(&origin_target);
|
||||||
|
if (r < 0) {
|
||||||
|
DMERR("Origin target register failed %d", r);
|
||||||
|
goto bad_register_origin_target;
|
||||||
|
}
|
||||||
|
|
||||||
|
r = dm_register_target(&merge_target);
|
||||||
|
if (r < 0) {
|
||||||
|
DMERR("Merge target register failed %d", r);
|
||||||
|
goto bad_register_merge_target;
|
||||||
|
}
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
bad_pending_cache:
|
|
||||||
kmem_cache_destroy(exception_cache);
|
|
||||||
bad_exception_cache:
|
|
||||||
exit_origin_hash();
|
|
||||||
bad_origin_hash:
|
|
||||||
dm_unregister_target(&merge_target);
|
|
||||||
bad_register_merge_target:
|
bad_register_merge_target:
|
||||||
dm_unregister_target(&origin_target);
|
dm_unregister_target(&origin_target);
|
||||||
bad_register_origin_target:
|
bad_register_origin_target:
|
||||||
dm_unregister_target(&snapshot_target);
|
dm_unregister_target(&snapshot_target);
|
||||||
bad_register_snapshot_target:
|
bad_register_snapshot_target:
|
||||||
|
kmem_cache_destroy(pending_cache);
|
||||||
|
bad_pending_cache:
|
||||||
|
kmem_cache_destroy(exception_cache);
|
||||||
|
bad_exception_cache:
|
||||||
|
exit_origin_hash();
|
||||||
|
bad_origin_hash:
|
||||||
dm_exception_store_exit();
|
dm_exception_store_exit();
|
||||||
|
|
||||||
return r;
|
return r;
|
||||||
|
|
|
@ -4355,30 +4355,28 @@ static struct target_type thin_target = {
|
||||||
|
|
||||||
static int __init dm_thin_init(void)
|
static int __init dm_thin_init(void)
|
||||||
{
|
{
|
||||||
int r;
|
int r = -ENOMEM;
|
||||||
|
|
||||||
pool_table_init();
|
pool_table_init();
|
||||||
|
|
||||||
|
_new_mapping_cache = KMEM_CACHE(dm_thin_new_mapping, 0);
|
||||||
|
if (!_new_mapping_cache)
|
||||||
|
return r;
|
||||||
|
|
||||||
r = dm_register_target(&thin_target);
|
r = dm_register_target(&thin_target);
|
||||||
if (r)
|
if (r)
|
||||||
return r;
|
goto bad_new_mapping_cache;
|
||||||
|
|
||||||
r = dm_register_target(&pool_target);
|
r = dm_register_target(&pool_target);
|
||||||
if (r)
|
if (r)
|
||||||
goto bad_pool_target;
|
goto bad_thin_target;
|
||||||
|
|
||||||
r = -ENOMEM;
|
|
||||||
|
|
||||||
_new_mapping_cache = KMEM_CACHE(dm_thin_new_mapping, 0);
|
|
||||||
if (!_new_mapping_cache)
|
|
||||||
goto bad_new_mapping_cache;
|
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
bad_new_mapping_cache:
|
bad_thin_target:
|
||||||
dm_unregister_target(&pool_target);
|
|
||||||
bad_pool_target:
|
|
||||||
dm_unregister_target(&thin_target);
|
dm_unregister_target(&thin_target);
|
||||||
|
bad_new_mapping_cache:
|
||||||
|
kmem_cache_destroy(_new_mapping_cache);
|
||||||
|
|
||||||
return r;
|
return r;
|
||||||
}
|
}
|
||||||
|
|
|
@ -1309,9 +1309,9 @@ static void raid1_write_request(struct mddev *mddev, struct bio *bio,
|
||||||
sigset_t full, old;
|
sigset_t full, old;
|
||||||
prepare_to_wait(&conf->wait_barrier,
|
prepare_to_wait(&conf->wait_barrier,
|
||||||
&w, TASK_INTERRUPTIBLE);
|
&w, TASK_INTERRUPTIBLE);
|
||||||
if (bio_end_sector(bio) <= mddev->suspend_lo ||
|
if ((bio_end_sector(bio) <= mddev->suspend_lo ||
|
||||||
bio->bi_iter.bi_sector >= mddev->suspend_hi ||
|
bio->bi_iter.bi_sector >= mddev->suspend_hi) &&
|
||||||
(mddev_is_clustered(mddev) &&
|
(!mddev_is_clustered(mddev) ||
|
||||||
!md_cluster_ops->area_resyncing(mddev, WRITE,
|
!md_cluster_ops->area_resyncing(mddev, WRITE,
|
||||||
bio->bi_iter.bi_sector,
|
bio->bi_iter.bi_sector,
|
||||||
bio_end_sector(bio))))
|
bio_end_sector(bio))))
|
||||||
|
|
|
@ -758,7 +758,8 @@ static int ppl_recover_entry(struct ppl_log *log, struct ppl_header_entry *e,
|
||||||
(unsigned long long)sector);
|
(unsigned long long)sector);
|
||||||
|
|
||||||
rdev = conf->disks[dd_idx].rdev;
|
rdev = conf->disks[dd_idx].rdev;
|
||||||
if (!rdev) {
|
if (!rdev || (!test_bit(In_sync, &rdev->flags) &&
|
||||||
|
sector >= rdev->recovery_offset)) {
|
||||||
pr_debug("%s:%*s data member disk %d missing\n",
|
pr_debug("%s:%*s data member disk %d missing\n",
|
||||||
__func__, indent, "", dd_idx);
|
__func__, indent, "", dd_idx);
|
||||||
update_parity = false;
|
update_parity = false;
|
||||||
|
|
|
@ -1818,8 +1818,11 @@ static void ops_complete_reconstruct(void *stripe_head_ref)
|
||||||
struct r5dev *dev = &sh->dev[i];
|
struct r5dev *dev = &sh->dev[i];
|
||||||
|
|
||||||
if (dev->written || i == pd_idx || i == qd_idx) {
|
if (dev->written || i == pd_idx || i == qd_idx) {
|
||||||
if (!discard && !test_bit(R5_SkipCopy, &dev->flags))
|
if (!discard && !test_bit(R5_SkipCopy, &dev->flags)) {
|
||||||
set_bit(R5_UPTODATE, &dev->flags);
|
set_bit(R5_UPTODATE, &dev->flags);
|
||||||
|
if (test_bit(STRIPE_EXPAND_READY, &sh->state))
|
||||||
|
set_bit(R5_Expanded, &dev->flags);
|
||||||
|
}
|
||||||
if (fua)
|
if (fua)
|
||||||
set_bit(R5_WantFUA, &dev->flags);
|
set_bit(R5_WantFUA, &dev->flags);
|
||||||
if (sync)
|
if (sync)
|
||||||
|
|
|
@ -622,6 +622,9 @@ static void vfe_set_xbar_cfg(struct vfe_device *vfe, struct vfe_output *output,
|
||||||
reg = VFE_0_BUS_XBAR_CFG_x_M_PAIR_STREAM_EN;
|
reg = VFE_0_BUS_XBAR_CFG_x_M_PAIR_STREAM_EN;
|
||||||
if (p == V4L2_PIX_FMT_NV12 || p == V4L2_PIX_FMT_NV16)
|
if (p == V4L2_PIX_FMT_NV12 || p == V4L2_PIX_FMT_NV16)
|
||||||
reg |= VFE_0_BUS_XBAR_CFG_x_M_PAIR_STREAM_SWAP_INTER_INTRA;
|
reg |= VFE_0_BUS_XBAR_CFG_x_M_PAIR_STREAM_SWAP_INTER_INTRA;
|
||||||
|
} else {
|
||||||
|
/* On current devices output->wm_num is always <= 2 */
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (output->wm_idx[i] % 2 == 1)
|
if (output->wm_idx[i] % 2 == 1)
|
||||||
|
|
|
@ -718,8 +718,8 @@ static int usbtv_s_ctrl(struct v4l2_ctrl *ctrl)
|
||||||
*/
|
*/
|
||||||
if (ctrl->id == V4L2_CID_BRIGHTNESS || ctrl->id == V4L2_CID_CONTRAST) {
|
if (ctrl->id == V4L2_CID_BRIGHTNESS || ctrl->id == V4L2_CID_CONTRAST) {
|
||||||
ret = usb_control_msg(usbtv->udev,
|
ret = usb_control_msg(usbtv->udev,
|
||||||
usb_sndctrlpipe(usbtv->udev, 0), USBTV_CONTROL_REG,
|
usb_rcvctrlpipe(usbtv->udev, 0), USBTV_CONTROL_REG,
|
||||||
USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
|
USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
|
||||||
0, USBTV_BASE + 0x0244, (void *)data, 3, 0);
|
0, USBTV_BASE + 0x0244, (void *)data, 3, 0);
|
||||||
if (ret < 0)
|
if (ret < 0)
|
||||||
goto error;
|
goto error;
|
||||||
|
|
|
@ -180,6 +180,19 @@ static int mx25_tsadc_probe(struct platform_device *pdev)
|
||||||
return devm_of_platform_populate(dev);
|
return devm_of_platform_populate(dev);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static int mx25_tsadc_remove(struct platform_device *pdev)
|
||||||
|
{
|
||||||
|
struct mx25_tsadc *tsadc = platform_get_drvdata(pdev);
|
||||||
|
int irq = platform_get_irq(pdev, 0);
|
||||||
|
|
||||||
|
if (irq) {
|
||||||
|
irq_set_chained_handler_and_data(irq, NULL, NULL);
|
||||||
|
irq_domain_remove(tsadc->domain);
|
||||||
|
}
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
static const struct of_device_id mx25_tsadc_ids[] = {
|
static const struct of_device_id mx25_tsadc_ids[] = {
|
||||||
{ .compatible = "fsl,imx25-tsadc" },
|
{ .compatible = "fsl,imx25-tsadc" },
|
||||||
{ /* Sentinel */ }
|
{ /* Sentinel */ }
|
||||||
|
@ -192,6 +205,7 @@ static struct platform_driver mx25_tsadc_driver = {
|
||||||
.of_match_table = of_match_ptr(mx25_tsadc_ids),
|
.of_match_table = of_match_ptr(mx25_tsadc_ids),
|
||||||
},
|
},
|
||||||
.probe = mx25_tsadc_probe,
|
.probe = mx25_tsadc_probe,
|
||||||
|
.remove = mx25_tsadc_remove,
|
||||||
};
|
};
|
||||||
module_platform_driver(mx25_tsadc_driver);
|
module_platform_driver(mx25_tsadc_driver);
|
||||||
|
|
||||||
|
|
|
@ -196,8 +196,10 @@ static int mxs_lradc_probe(struct platform_device *pdev)
|
||||||
platform_set_drvdata(pdev, lradc);
|
platform_set_drvdata(pdev, lradc);
|
||||||
|
|
||||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||||
if (!res)
|
if (!res) {
|
||||||
return -ENOMEM;
|
ret = -ENOMEM;
|
||||||
|
goto err_clk;
|
||||||
|
}
|
||||||
|
|
||||||
switch (lradc->soc) {
|
switch (lradc->soc) {
|
||||||
case IMX23_LRADC:
|
case IMX23_LRADC:
|
||||||
|
|
|
@ -776,7 +776,7 @@ static int at24_probe(struct i2c_client *client, const struct i2c_device_id *id)
|
||||||
at24->nvmem_config.reg_read = at24_read;
|
at24->nvmem_config.reg_read = at24_read;
|
||||||
at24->nvmem_config.reg_write = at24_write;
|
at24->nvmem_config.reg_write = at24_write;
|
||||||
at24->nvmem_config.priv = at24;
|
at24->nvmem_config.priv = at24;
|
||||||
at24->nvmem_config.stride = 4;
|
at24->nvmem_config.stride = 1;
|
||||||
at24->nvmem_config.word_size = 1;
|
at24->nvmem_config.word_size = 1;
|
||||||
at24->nvmem_config.size = chip.byte_len;
|
at24->nvmem_config.size = chip.byte_len;
|
||||||
|
|
||||||
|
|
|
@ -533,6 +533,7 @@ static int pci_endpoint_test_probe(struct pci_dev *pdev,
|
||||||
|
|
||||||
test->base = test->bar[test_reg_bar];
|
test->base = test->bar[test_reg_bar];
|
||||||
if (!test->base) {
|
if (!test->base) {
|
||||||
|
err = -ENOMEM;
|
||||||
dev_err(dev, "Cannot perform PCI test without BAR%d\n",
|
dev_err(dev, "Cannot perform PCI test without BAR%d\n",
|
||||||
test_reg_bar);
|
test_reg_bar);
|
||||||
goto err_iounmap;
|
goto err_iounmap;
|
||||||
|
@ -542,6 +543,7 @@ static int pci_endpoint_test_probe(struct pci_dev *pdev,
|
||||||
|
|
||||||
id = ida_simple_get(&pci_endpoint_test_ida, 0, 0, GFP_KERNEL);
|
id = ida_simple_get(&pci_endpoint_test_ida, 0, 0, GFP_KERNEL);
|
||||||
if (id < 0) {
|
if (id < 0) {
|
||||||
|
err = id;
|
||||||
dev_err(dev, "unable to get id\n");
|
dev_err(dev, "unable to get id\n");
|
||||||
goto err_iounmap;
|
goto err_iounmap;
|
||||||
}
|
}
|
||||||
|
@ -588,6 +590,8 @@ static void pci_endpoint_test_remove(struct pci_dev *pdev)
|
||||||
|
|
||||||
if (sscanf(misc_device->name, DRV_MODULE_NAME ".%d", &id) != 1)
|
if (sscanf(misc_device->name, DRV_MODULE_NAME ".%d", &id) != 1)
|
||||||
return;
|
return;
|
||||||
|
if (id < 0)
|
||||||
|
return;
|
||||||
|
|
||||||
misc_deregister(&test->miscdev);
|
misc_deregister(&test->miscdev);
|
||||||
ida_simple_remove(&pci_endpoint_test_ida, id);
|
ida_simple_remove(&pci_endpoint_test_ida, id);
|
||||||
|
|
|
@ -75,9 +75,11 @@ struct mmc_fixup {
|
||||||
#define EXT_CSD_REV_ANY (-1u)
|
#define EXT_CSD_REV_ANY (-1u)
|
||||||
|
|
||||||
#define CID_MANFID_SANDISK 0x2
|
#define CID_MANFID_SANDISK 0x2
|
||||||
|
#define CID_MANFID_ATP 0x9
|
||||||
#define CID_MANFID_TOSHIBA 0x11
|
#define CID_MANFID_TOSHIBA 0x11
|
||||||
#define CID_MANFID_MICRON 0x13
|
#define CID_MANFID_MICRON 0x13
|
||||||
#define CID_MANFID_SAMSUNG 0x15
|
#define CID_MANFID_SAMSUNG 0x15
|
||||||
|
#define CID_MANFID_APACER 0x27
|
||||||
#define CID_MANFID_KINGSTON 0x70
|
#define CID_MANFID_KINGSTON 0x70
|
||||||
#define CID_MANFID_HYNIX 0x90
|
#define CID_MANFID_HYNIX 0x90
|
||||||
|
|
||||||
|
|
|
@ -52,6 +52,14 @@ static const struct mmc_fixup mmc_blk_fixups[] = {
|
||||||
MMC_FIXUP("MMC32G", CID_MANFID_TOSHIBA, CID_OEMID_ANY, add_quirk_mmc,
|
MMC_FIXUP("MMC32G", CID_MANFID_TOSHIBA, CID_OEMID_ANY, add_quirk_mmc,
|
||||||
MMC_QUIRK_BLK_NO_CMD23),
|
MMC_QUIRK_BLK_NO_CMD23),
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Some SD cards lockup while using CMD23 multiblock transfers.
|
||||||
|
*/
|
||||||
|
MMC_FIXUP("AF SD", CID_MANFID_ATP, CID_OEMID_ANY, add_quirk_sd,
|
||||||
|
MMC_QUIRK_BLK_NO_CMD23),
|
||||||
|
MMC_FIXUP("APUSD", CID_MANFID_APACER, 0x5048, add_quirk_sd,
|
||||||
|
MMC_QUIRK_BLK_NO_CMD23),
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Some MMC cards need longer data read timeout than indicated in CSD.
|
* Some MMC cards need longer data read timeout than indicated in CSD.
|
||||||
*/
|
*/
|
||||||
|
|
|
@ -240,12 +240,12 @@ static int stm32_qspi_tx_poll(struct stm32_qspi *qspi,
|
||||||
STM32_QSPI_FIFO_TIMEOUT_US);
|
STM32_QSPI_FIFO_TIMEOUT_US);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(qspi->dev, "fifo timeout (stat:%#x)\n", sr);
|
dev_err(qspi->dev, "fifo timeout (stat:%#x)\n", sr);
|
||||||
break;
|
return ret;
|
||||||
}
|
}
|
||||||
tx_fifo(buf++, qspi->io_base + QUADSPI_DR);
|
tx_fifo(buf++, qspi->io_base + QUADSPI_DR);
|
||||||
}
|
}
|
||||||
|
|
||||||
return ret;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int stm32_qspi_tx_mm(struct stm32_qspi *qspi,
|
static int stm32_qspi_tx_mm(struct stm32_qspi *qspi,
|
||||||
|
|
|
@ -569,7 +569,7 @@ static int lan9303_disable_processing(struct lan9303 *chip)
|
||||||
{
|
{
|
||||||
int p;
|
int p;
|
||||||
|
|
||||||
for (p = 0; p < LAN9303_NUM_PORTS; p++) {
|
for (p = 1; p < LAN9303_NUM_PORTS; p++) {
|
||||||
int ret = lan9303_disable_processing_port(chip, p);
|
int ret = lan9303_disable_processing_port(chip, p);
|
||||||
|
|
||||||
if (ret)
|
if (ret)
|
||||||
|
|
|
@ -1289,6 +1289,9 @@ static int liquidio_stop(struct net_device *netdev)
|
||||||
struct octeon_device *oct = lio->oct_dev;
|
struct octeon_device *oct = lio->oct_dev;
|
||||||
struct napi_struct *napi, *n;
|
struct napi_struct *napi, *n;
|
||||||
|
|
||||||
|
/* tell Octeon to stop forwarding packets to host */
|
||||||
|
send_rx_ctrl_cmd(lio, 0);
|
||||||
|
|
||||||
if (oct->props[lio->ifidx].napi_enabled) {
|
if (oct->props[lio->ifidx].napi_enabled) {
|
||||||
list_for_each_entry_safe(napi, n, &netdev->napi_list, dev_list)
|
list_for_each_entry_safe(napi, n, &netdev->napi_list, dev_list)
|
||||||
napi_disable(napi);
|
napi_disable(napi);
|
||||||
|
@ -1306,9 +1309,6 @@ static int liquidio_stop(struct net_device *netdev)
|
||||||
netif_carrier_off(netdev);
|
netif_carrier_off(netdev);
|
||||||
lio->link_changes++;
|
lio->link_changes++;
|
||||||
|
|
||||||
/* tell Octeon to stop forwarding packets to host */
|
|
||||||
send_rx_ctrl_cmd(lio, 0);
|
|
||||||
|
|
||||||
ifstate_reset(lio, LIO_IFSTATE_RUNNING);
|
ifstate_reset(lio, LIO_IFSTATE_RUNNING);
|
||||||
|
|
||||||
txqs_stop(netdev);
|
txqs_stop(netdev);
|
||||||
|
|
|
@ -3981,7 +3981,7 @@ static int hclge_init_client_instance(struct hnae3_client *client,
|
||||||
vport->roce.client = client;
|
vport->roce.client = client;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (hdev->roce_client) {
|
if (hdev->roce_client && hdev->nic_client) {
|
||||||
ret = hclge_init_roce_base_info(vport);
|
ret = hclge_init_roce_base_info(vport);
|
||||||
if (ret)
|
if (ret)
|
||||||
goto err;
|
goto err;
|
||||||
|
@ -4007,13 +4007,19 @@ static void hclge_uninit_client_instance(struct hnae3_client *client,
|
||||||
|
|
||||||
for (i = 0; i < hdev->num_vmdq_vport + 1; i++) {
|
for (i = 0; i < hdev->num_vmdq_vport + 1; i++) {
|
||||||
vport = &hdev->vport[i];
|
vport = &hdev->vport[i];
|
||||||
if (hdev->roce_client)
|
if (hdev->roce_client) {
|
||||||
hdev->roce_client->ops->uninit_instance(&vport->roce,
|
hdev->roce_client->ops->uninit_instance(&vport->roce,
|
||||||
0);
|
0);
|
||||||
|
hdev->roce_client = NULL;
|
||||||
|
vport->roce.client = NULL;
|
||||||
|
}
|
||||||
if (client->type == HNAE3_CLIENT_ROCE)
|
if (client->type == HNAE3_CLIENT_ROCE)
|
||||||
return;
|
return;
|
||||||
if (client->ops->uninit_instance)
|
if (client->ops->uninit_instance) {
|
||||||
client->ops->uninit_instance(&vport->nic, 0);
|
client->ops->uninit_instance(&vport->nic, 0);
|
||||||
|
hdev->nic_client = NULL;
|
||||||
|
vport->nic.client = NULL;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -721,7 +721,7 @@ static void hns3_set_txbd_baseinfo(u16 *bdtp_fe_sc_vld_ra_ri, int frag_end)
|
||||||
HNS3_TXD_BDTYPE_M, 0);
|
HNS3_TXD_BDTYPE_M, 0);
|
||||||
hnae_set_bit(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_FE_B, !!frag_end);
|
hnae_set_bit(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_FE_B, !!frag_end);
|
||||||
hnae_set_bit(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_VLD_B, 1);
|
hnae_set_bit(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_VLD_B, 1);
|
||||||
hnae_set_field(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_SC_M, HNS3_TXD_SC_S, 1);
|
hnae_set_field(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_SC_M, HNS3_TXD_SC_S, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
static int hns3_fill_desc(struct hns3_enet_ring *ring, void *priv,
|
static int hns3_fill_desc(struct hns3_enet_ring *ring, void *priv,
|
||||||
|
@ -1546,7 +1546,7 @@ static int hns3_reserve_buffer_map(struct hns3_enet_ring *ring,
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
out_with_buf:
|
out_with_buf:
|
||||||
hns3_free_buffers(ring);
|
hns3_free_buffer(ring, cb);
|
||||||
out:
|
out:
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
@ -1586,7 +1586,7 @@ out_buffer_fail:
|
||||||
static void hns3_replace_buffer(struct hns3_enet_ring *ring, int i,
|
static void hns3_replace_buffer(struct hns3_enet_ring *ring, int i,
|
||||||
struct hns3_desc_cb *res_cb)
|
struct hns3_desc_cb *res_cb)
|
||||||
{
|
{
|
||||||
hns3_map_buffer(ring, &ring->desc_cb[i]);
|
hns3_unmap_buffer(ring, &ring->desc_cb[i]);
|
||||||
ring->desc_cb[i] = *res_cb;
|
ring->desc_cb[i] = *res_cb;
|
||||||
ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
|
ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
|
||||||
}
|
}
|
||||||
|
@ -2460,8 +2460,7 @@ static int hns3_nic_uninit_vector_data(struct hns3_nic_priv *priv)
|
||||||
(void)irq_set_affinity_hint(
|
(void)irq_set_affinity_hint(
|
||||||
priv->tqp_vector[i].vector_irq,
|
priv->tqp_vector[i].vector_irq,
|
||||||
NULL);
|
NULL);
|
||||||
devm_free_irq(&pdev->dev,
|
free_irq(priv->tqp_vector[i].vector_irq,
|
||||||
priv->tqp_vector[i].vector_irq,
|
|
||||||
&priv->tqp_vector[i]);
|
&priv->tqp_vector[i]);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -2489,16 +2488,16 @@ static int hns3_ring_get_cfg(struct hnae3_queue *q, struct hns3_nic_priv *priv,
|
||||||
|
|
||||||
if (ring_type == HNAE3_RING_TYPE_TX) {
|
if (ring_type == HNAE3_RING_TYPE_TX) {
|
||||||
ring_data[q->tqp_index].ring = ring;
|
ring_data[q->tqp_index].ring = ring;
|
||||||
|
ring_data[q->tqp_index].queue_index = q->tqp_index;
|
||||||
ring->io_base = (u8 __iomem *)q->io_base + HNS3_TX_REG_OFFSET;
|
ring->io_base = (u8 __iomem *)q->io_base + HNS3_TX_REG_OFFSET;
|
||||||
} else {
|
} else {
|
||||||
ring_data[q->tqp_index + queue_num].ring = ring;
|
ring_data[q->tqp_index + queue_num].ring = ring;
|
||||||
|
ring_data[q->tqp_index + queue_num].queue_index = q->tqp_index;
|
||||||
ring->io_base = q->io_base;
|
ring->io_base = q->io_base;
|
||||||
}
|
}
|
||||||
|
|
||||||
hnae_set_bit(ring->flag, HNAE3_RING_TYPE_B, ring_type);
|
hnae_set_bit(ring->flag, HNAE3_RING_TYPE_B, ring_type);
|
||||||
|
|
||||||
ring_data[q->tqp_index].queue_index = q->tqp_index;
|
|
||||||
|
|
||||||
ring->tqp = q;
|
ring->tqp = q;
|
||||||
ring->desc = NULL;
|
ring->desc = NULL;
|
||||||
ring->desc_cb = NULL;
|
ring->desc_cb = NULL;
|
||||||
|
|
|
@ -375,6 +375,9 @@ static int hns3_get_link_ksettings(struct net_device *netdev,
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
if (!cmd->base.autoneg)
|
||||||
|
advertised_caps &= ~HNS3_LM_AUTONEG_BIT;
|
||||||
|
|
||||||
/* now, map driver link modes to ethtool link modes */
|
/* now, map driver link modes to ethtool link modes */
|
||||||
hns3_driv_to_eth_caps(supported_caps, cmd, false);
|
hns3_driv_to_eth_caps(supported_caps, cmd, false);
|
||||||
hns3_driv_to_eth_caps(advertised_caps, cmd, true);
|
hns3_driv_to_eth_caps(advertised_caps, cmd, true);
|
||||||
|
|
|
@ -2974,6 +2974,7 @@ static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
|
||||||
if (IS_ERR(mlxsw_sp_port_vlan)) {
|
if (IS_ERR(mlxsw_sp_port_vlan)) {
|
||||||
dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to create VID 1\n",
|
dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to create VID 1\n",
|
||||||
mlxsw_sp_port->local_port);
|
mlxsw_sp_port->local_port);
|
||||||
|
err = PTR_ERR(mlxsw_sp_port_vlan);
|
||||||
goto err_port_vlan_get;
|
goto err_port_vlan_get;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -5726,7 +5726,7 @@ static int efx_ef10_set_mac_address(struct efx_nic *efx)
|
||||||
* MCFW do not support VFs.
|
* MCFW do not support VFs.
|
||||||
*/
|
*/
|
||||||
rc = efx_ef10_vport_set_mac_address(efx);
|
rc = efx_ef10_vport_set_mac_address(efx);
|
||||||
} else {
|
} else if (rc) {
|
||||||
efx_mcdi_display_error(efx, MC_CMD_VADAPTOR_SET_MAC,
|
efx_mcdi_display_error(efx, MC_CMD_VADAPTOR_SET_MAC,
|
||||||
sizeof(inbuf), NULL, 0, rc);
|
sizeof(inbuf), NULL, 0, rc);
|
||||||
}
|
}
|
||||||
|
|
|
@ -480,7 +480,7 @@ static rx_handler_result_t macvlan_handle_frame(struct sk_buff **pskb)
|
||||||
struct macvlan_dev, list);
|
struct macvlan_dev, list);
|
||||||
else
|
else
|
||||||
vlan = macvlan_hash_lookup(port, eth->h_dest);
|
vlan = macvlan_hash_lookup(port, eth->h_dest);
|
||||||
if (vlan == NULL)
|
if (!vlan || vlan->mode == MACVLAN_MODE_SOURCE)
|
||||||
return RX_HANDLER_PASS;
|
return RX_HANDLER_PASS;
|
||||||
|
|
||||||
dev = vlan->dev;
|
dev = vlan->dev;
|
||||||
|
|
|
@ -959,6 +959,7 @@ static __net_exit void ppp_exit_net(struct net *net)
|
||||||
unregister_netdevice_many(&list);
|
unregister_netdevice_many(&list);
|
||||||
rtnl_unlock();
|
rtnl_unlock();
|
||||||
|
|
||||||
|
mutex_destroy(&pn->all_ppp_mutex);
|
||||||
idr_destroy(&pn->units_idr);
|
idr_destroy(&pn->units_idr);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -2577,9 +2577,13 @@ void ath10k_pci_hif_power_down(struct ath10k *ar)
|
||||||
*/
|
*/
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef CONFIG_PM
|
|
||||||
|
|
||||||
static int ath10k_pci_hif_suspend(struct ath10k *ar)
|
static int ath10k_pci_hif_suspend(struct ath10k *ar)
|
||||||
|
{
|
||||||
|
/* Nothing to do; the important stuff is in the driver suspend. */
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
static int ath10k_pci_suspend(struct ath10k *ar)
|
||||||
{
|
{
|
||||||
/* The grace timer can still be counting down and ar->ps_awake be true.
|
/* The grace timer can still be counting down and ar->ps_awake be true.
|
||||||
* It is known that the device may be asleep after resuming regardless
|
* It is known that the device may be asleep after resuming regardless
|
||||||
|
@ -2592,6 +2596,12 @@ static int ath10k_pci_hif_suspend(struct ath10k *ar)
|
||||||
}
|
}
|
||||||
|
|
||||||
static int ath10k_pci_hif_resume(struct ath10k *ar)
|
static int ath10k_pci_hif_resume(struct ath10k *ar)
|
||||||
|
{
|
||||||
|
/* Nothing to do; the important stuff is in the driver resume. */
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
static int ath10k_pci_resume(struct ath10k *ar)
|
||||||
{
|
{
|
||||||
struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
|
struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
|
||||||
struct pci_dev *pdev = ar_pci->pdev;
|
struct pci_dev *pdev = ar_pci->pdev;
|
||||||
|
@ -2615,7 +2625,6 @@ static int ath10k_pci_hif_resume(struct ath10k *ar)
|
||||||
|
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
#endif
|
|
||||||
|
|
||||||
static bool ath10k_pci_validate_cal(void *data, size_t size)
|
static bool ath10k_pci_validate_cal(void *data, size_t size)
|
||||||
{
|
{
|
||||||
|
@ -2770,10 +2779,8 @@ static const struct ath10k_hif_ops ath10k_pci_hif_ops = {
|
||||||
.power_down = ath10k_pci_hif_power_down,
|
.power_down = ath10k_pci_hif_power_down,
|
||||||
.read32 = ath10k_pci_read32,
|
.read32 = ath10k_pci_read32,
|
||||||
.write32 = ath10k_pci_write32,
|
.write32 = ath10k_pci_write32,
|
||||||
#ifdef CONFIG_PM
|
|
||||||
.suspend = ath10k_pci_hif_suspend,
|
.suspend = ath10k_pci_hif_suspend,
|
||||||
.resume = ath10k_pci_hif_resume,
|
.resume = ath10k_pci_hif_resume,
|
||||||
#endif
|
|
||||||
.fetch_cal_eeprom = ath10k_pci_hif_fetch_cal_eeprom,
|
.fetch_cal_eeprom = ath10k_pci_hif_fetch_cal_eeprom,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -3401,11 +3408,7 @@ static __maybe_unused int ath10k_pci_pm_suspend(struct device *dev)
|
||||||
struct ath10k *ar = dev_get_drvdata(dev);
|
struct ath10k *ar = dev_get_drvdata(dev);
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
if (test_bit(ATH10K_FW_FEATURE_WOWLAN_SUPPORT,
|
ret = ath10k_pci_suspend(ar);
|
||||||
ar->running_fw->fw_file.fw_features))
|
|
||||||
return 0;
|
|
||||||
|
|
||||||
ret = ath10k_hif_suspend(ar);
|
|
||||||
if (ret)
|
if (ret)
|
||||||
ath10k_warn(ar, "failed to suspend hif: %d\n", ret);
|
ath10k_warn(ar, "failed to suspend hif: %d\n", ret);
|
||||||
|
|
||||||
|
@ -3417,11 +3420,7 @@ static __maybe_unused int ath10k_pci_pm_resume(struct device *dev)
|
||||||
struct ath10k *ar = dev_get_drvdata(dev);
|
struct ath10k *ar = dev_get_drvdata(dev);
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
if (test_bit(ATH10K_FW_FEATURE_WOWLAN_SUPPORT,
|
ret = ath10k_pci_resume(ar);
|
||||||
ar->running_fw->fw_file.fw_features))
|
|
||||||
return 0;
|
|
||||||
|
|
||||||
ret = ath10k_hif_resume(ar);
|
|
||||||
if (ret)
|
if (ret)
|
||||||
ath10k_warn(ar, "failed to resume hif: %d\n", ret);
|
ath10k_warn(ar, "failed to resume hif: %d\n", ret);
|
||||||
|
|
||||||
|
|
|
@ -179,6 +179,9 @@ static ssize_t write_file_tx99(struct file *file, const char __user *user_buf,
|
||||||
ssize_t len;
|
ssize_t len;
|
||||||
int r;
|
int r;
|
||||||
|
|
||||||
|
if (count < 1)
|
||||||
|
return -EINVAL;
|
||||||
|
|
||||||
if (sc->cur_chan->nvifs > 1)
|
if (sc->cur_chan->nvifs > 1)
|
||||||
return -EOPNOTSUPP;
|
return -EOPNOTSUPP;
|
||||||
|
|
||||||
|
@ -186,6 +189,8 @@ static ssize_t write_file_tx99(struct file *file, const char __user *user_buf,
|
||||||
if (copy_from_user(buf, user_buf, len))
|
if (copy_from_user(buf, user_buf, len))
|
||||||
return -EFAULT;
|
return -EFAULT;
|
||||||
|
|
||||||
|
buf[len] = '\0';
|
||||||
|
|
||||||
if (strtobool(buf, &start))
|
if (strtobool(buf, &start))
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
||||||
|
|
|
@ -643,11 +643,11 @@ static int qtnf_tx_queue_ready(struct qtnf_pcie_bus_priv *priv)
|
||||||
{
|
{
|
||||||
if (!CIRC_SPACE(priv->tx_bd_w_index, priv->tx_bd_r_index,
|
if (!CIRC_SPACE(priv->tx_bd_w_index, priv->tx_bd_r_index,
|
||||||
priv->tx_bd_num)) {
|
priv->tx_bd_num)) {
|
||||||
pr_err_ratelimited("reclaim full Tx queue\n");
|
|
||||||
qtnf_pcie_data_tx_reclaim(priv);
|
qtnf_pcie_data_tx_reclaim(priv);
|
||||||
|
|
||||||
if (!CIRC_SPACE(priv->tx_bd_w_index, priv->tx_bd_r_index,
|
if (!CIRC_SPACE(priv->tx_bd_w_index, priv->tx_bd_r_index,
|
||||||
priv->tx_bd_num)) {
|
priv->tx_bd_num)) {
|
||||||
|
pr_warn_ratelimited("reclaim full Tx queue\n");
|
||||||
priv->tx_full_count++;
|
priv->tx_full_count++;
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
|
@ -2299,7 +2299,8 @@ static struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid)
|
||||||
mutex_lock(&ctrl->namespaces_mutex);
|
mutex_lock(&ctrl->namespaces_mutex);
|
||||||
list_for_each_entry(ns, &ctrl->namespaces, list) {
|
list_for_each_entry(ns, &ctrl->namespaces, list) {
|
||||||
if (ns->ns_id == nsid) {
|
if (ns->ns_id == nsid) {
|
||||||
kref_get(&ns->kref);
|
if (!kref_get_unless_zero(&ns->kref))
|
||||||
|
continue;
|
||||||
ret = ns;
|
ret = ns;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
|
@ -226,6 +226,9 @@ static void pcie_pme_work_fn(struct work_struct *work)
|
||||||
break;
|
break;
|
||||||
|
|
||||||
pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta);
|
pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta);
|
||||||
|
if (rtsta == (u32) ~0)
|
||||||
|
break;
|
||||||
|
|
||||||
if (rtsta & PCI_EXP_RTSTA_PME) {
|
if (rtsta & PCI_EXP_RTSTA_PME) {
|
||||||
/*
|
/*
|
||||||
* Clear PME status of the port. If there are other
|
* Clear PME status of the port. If there are other
|
||||||
|
@ -273,7 +276,7 @@ static irqreturn_t pcie_pme_irq(int irq, void *context)
|
||||||
spin_lock_irqsave(&data->lock, flags);
|
spin_lock_irqsave(&data->lock, flags);
|
||||||
pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta);
|
pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta);
|
||||||
|
|
||||||
if (!(rtsta & PCI_EXP_RTSTA_PME)) {
|
if (rtsta == (u32) ~0 || !(rtsta & PCI_EXP_RTSTA_PME)) {
|
||||||
spin_unlock_irqrestore(&data->lock, flags);
|
spin_unlock_irqrestore(&data->lock, flags);
|
||||||
return IRQ_NONE;
|
return IRQ_NONE;
|
||||||
}
|
}
|
||||||
|
|
|
@ -1076,7 +1076,8 @@ int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max, int pass)
|
||||||
child = pci_add_new_bus(bus, dev, max+1);
|
child = pci_add_new_bus(bus, dev, max+1);
|
||||||
if (!child)
|
if (!child)
|
||||||
goto out;
|
goto out;
|
||||||
pci_bus_insert_busn_res(child, max+1, 0xff);
|
pci_bus_insert_busn_res(child, max+1,
|
||||||
|
bus->busn_res.end);
|
||||||
}
|
}
|
||||||
max++;
|
max++;
|
||||||
buses = (buses & 0xff000000)
|
buses = (buses & 0xff000000)
|
||||||
|
@ -2433,6 +2434,10 @@ unsigned int pci_scan_child_bus(struct pci_bus *bus)
|
||||||
if (bus->self && bus->self->is_hotplug_bridge && pci_hotplug_bus_size) {
|
if (bus->self && bus->self->is_hotplug_bridge && pci_hotplug_bus_size) {
|
||||||
if (max - bus->busn_res.start < pci_hotplug_bus_size - 1)
|
if (max - bus->busn_res.start < pci_hotplug_bus_size - 1)
|
||||||
max = bus->busn_res.start + pci_hotplug_bus_size - 1;
|
max = bus->busn_res.start + pci_hotplug_bus_size - 1;
|
||||||
|
|
||||||
|
/* Do not allocate more buses than we have room left */
|
||||||
|
if (max > bus->busn_res.end)
|
||||||
|
max = bus->busn_res.end;
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
|
@ -19,9 +19,9 @@ static void pci_stop_dev(struct pci_dev *dev)
|
||||||
pci_pme_active(dev, false);
|
pci_pme_active(dev, false);
|
||||||
|
|
||||||
if (dev->is_added) {
|
if (dev->is_added) {
|
||||||
|
device_release_driver(&dev->dev);
|
||||||
pci_proc_detach_device(dev);
|
pci_proc_detach_device(dev);
|
||||||
pci_remove_sysfs_dev_files(dev);
|
pci_remove_sysfs_dev_files(dev);
|
||||||
device_release_driver(&dev->dev);
|
|
||||||
dev->is_added = 0;
|
dev->is_added = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue