update ipts patches for 4.16
This commit is contained in:
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eaf9a9d806
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edabac9839
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@ -13,7 +13,7 @@ index 091aef2..bb1a328 100644
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i915-$(CONFIG_DRM_I915_CAPTURE_ERROR) += i915_gpu_error.o
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i915-$(CONFIG_DRM_I915_SELFTEST) += \
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diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
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index 2f5209d..6aee305 100644
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index 2f5209d..d7801c7 100644
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--- a/drivers/gpu/drm/i915/i915_drv.c
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+++ b/drivers/gpu/drm/i915/i915_drv.c
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@@ -52,6 +52,7 @@
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@ -140,7 +140,7 @@ index c963603..f8f63f0 100644
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param(char *, guc_firmware_path, NULL) \
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param(char *, huc_firmware_path, NULL) \
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diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
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index 52856a9..bc29b1a 100644
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index 52856a9..dbc05a2 100644
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--- a/drivers/gpu/drm/i915/intel_guc.h
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+++ b/drivers/gpu/drm/i915/intel_guc.h
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@@ -64,6 +64,7 @@ struct intel_guc {
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@ -151,49 +151,25 @@ index 52856a9..bc29b1a 100644
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struct guc_preempt_work preempt_work[I915_NUM_ENGINES];
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struct workqueue_struct *preempt_wq;
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@@ -131,5 +132,9 @@ int intel_guc_suspend(struct drm_i915_private *dev_priv);
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int intel_guc_resume(struct drm_i915_private *dev_priv);
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struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size);
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u32 intel_guc_wopcm_size(struct drm_i915_private *dev_priv);
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+int i915_guc_ipts_submission_enable(struct drm_i915_private *dev_priv,
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+ struct i915_gem_context *ctx);
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+void i915_guc_ipts_submission_disable(struct drm_i915_private *dev_priv);
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+void i915_guc_ipts_reacquire_doorbell(struct drm_i915_private *dev_priv);
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#endif
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diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c b/drivers/gpu/drm/i915/intel_guc_submission.c
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index 4d24094..e96205e 100644
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index 4d24094..e1e83d5 100644
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--- a/drivers/gpu/drm/i915/intel_guc_submission.c
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+++ b/drivers/gpu/drm/i915/intel_guc_submission.c
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@@ -90,6 +90,7 @@ static inline bool is_high_priority(struct intel_guc_client *client)
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static int reserve_doorbell(struct intel_guc_client *client)
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{
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+ struct drm_i915_private *dev_priv = guc_to_i915(client->guc);
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unsigned long offset;
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unsigned long end;
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u16 id;
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@@ -102,10 +103,15 @@ static int reserve_doorbell(struct intel_guc_client *client)
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@@ -102,11 +102,11 @@ static int reserve_doorbell(struct intel_guc_client *client)
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* priority contexts, the second half for high-priority ones.
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*/
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offset = 0;
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- end = GUC_NUM_DOORBELLS / 2;
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- if (is_high_priority(client)) {
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- offset = end;
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- end += offset;
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+ if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) {
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+ end = GUC_NUM_DOORBELLS;
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+ }
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+ else {
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+ end = GUC_NUM_DOORBELLS/2;
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+ if (is_high_priority(client)) {
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+ offset = end;
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+ end += offset;
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+ }
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}
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+ end = GUC_NUM_DOORBELLS/2;
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if (is_high_priority(client)) {
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offset = end;
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end += offset;
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- }
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+ }
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id = find_next_zero_bit(client->guc->doorbell_bitmap, end, offset);
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@@ -349,8 +355,14 @@ static void guc_stage_desc_init(struct intel_guc *guc,
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if (id == end)
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@@ -349,8 +349,14 @@ static void guc_stage_desc_init(struct intel_guc *guc,
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desc = __get_stage_desc(client);
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memset(desc, 0, sizeof(*desc));
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@ -210,7 +186,7 @@ index 4d24094..e96205e 100644
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if (is_high_priority(client))
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desc->attribute |= GUC_STAGE_DESC_ATTR_PREEMPT;
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desc->stage_id = client->stage_id;
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@@ -1206,7 +1218,8 @@ static void guc_interrupts_capture(struct drm_i915_private *dev_priv)
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@@ -1206,7 +1212,8 @@ static void guc_interrupts_capture(struct drm_i915_private *dev_priv)
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I915_WRITE(RING_MODE_GEN7(engine), irqs);
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/* route USER_INTERRUPT to Host, all others are sent to GuC. */
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@ -220,7 +196,7 @@ index 4d24094..e96205e 100644
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GT_RENDER_USER_INTERRUPT << GEN8_BCS_IRQ_SHIFT;
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/* These three registers have the same bit definitions */
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I915_WRITE(GUC_BCS_RCS_IER, ~irqs);
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@@ -1334,6 +1347,50 @@ void intel_guc_submission_disable(struct intel_guc *guc)
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@@ -1334,6 +1341,58 @@ void intel_guc_submission_disable(struct intel_guc *guc)
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intel_engines_reset_default_submission(dev_priv);
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}
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@ -229,20 +205,28 @@ index 4d24094..e96205e 100644
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+{
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+ struct intel_guc *guc = &dev_priv->guc;
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+ struct intel_guc_client *client;
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+ int err;
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+ int ret;
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+
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+ /* client for execbuf submission */
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+ client = guc_client_alloc(dev_priv,
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+ INTEL_INFO(dev_priv)->ring_mask,
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+ IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv) ? GUC_CLIENT_PRIORITY_HIGH : GUC_CLIENT_PRIORITY_NORMAL,
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+ GUC_CLIENT_PRIORITY_NORMAL,
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+ ctx);
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+ if (!client) {
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+ if (IS_ERR(client)) {
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+ DRM_ERROR("Failed to create normal GuC client!\n");
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+ return -ENOMEM;
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+ }
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+
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+ guc->ipts_client = client;
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+ intel_guc_sample_forcewake(guc);
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+ guc_clients_doorbell_init(guc);
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+
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+ err = intel_guc_sample_forcewake(guc);
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+ if (err)
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+ return err;
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+
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+ ret = create_doorbell(guc->ipts_client);
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+ if (ret)
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+ return ret;
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+
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+ return 0;
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+}
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@ -270,10 +254,24 @@ index 4d24094..e96205e 100644
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+
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#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
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#include "selftests/intel_guc.c"
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#endif
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diff --git a/drivers/gpu/drm/i915/intel_guc_submission.h b/drivers/gpu/drm/i915/intel_guc_submission.h
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index fb081ce..71fc798 100644
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--- a/drivers/gpu/drm/i915/intel_guc_submission.h
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+++ b/drivers/gpu/drm/i915/intel_guc_submission.h
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@@ -79,5 +79,9 @@ void intel_guc_submission_disable(struct intel_guc *guc);
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void intel_guc_submission_fini(struct intel_guc *guc);
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int intel_guc_preempt_work_create(struct intel_guc *guc);
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void intel_guc_preempt_work_destroy(struct intel_guc *guc);
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+int i915_guc_ipts_submission_enable(struct drm_i915_private *dev_priv,
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+ struct i915_gem_context *ctx);
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+void i915_guc_ipts_submission_disable(struct drm_i915_private *dev_priv);
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+void i915_guc_ipts_reacquire_doorbell(struct drm_i915_private *dev_priv);
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#endif
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diff --git a/drivers/gpu/drm/i915/intel_ipts.c b/drivers/gpu/drm/i915/intel_ipts.c
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new file mode 100644
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index 0000000..be9fa6f
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index 0000000..f8cc5ea
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--- /dev/null
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+++ b/drivers/gpu/drm/i915/intel_ipts.c
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@@ -0,0 +1,627 @@
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@ -945,7 +943,7 @@ index 0000000..a6965d1
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+
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+#endif //_INTEL_IPTS_H_
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diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
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index 7ece2f0..ad004df 100644
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index e0fca03..bf37b1f 100644
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--- a/drivers/gpu/drm/i915/intel_lrc.c
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+++ b/drivers/gpu/drm/i915/intel_lrc.c
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@@ -211,8 +211,6 @@
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@ -957,7 +955,7 @@ index 7ece2f0..ad004df 100644
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static void execlists_init_reg_state(u32 *reg_state,
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struct i915_gem_context *ctx,
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struct intel_engine_cs *engine,
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@@ -1111,7 +1109,7 @@ static int __context_pin(struct i915_gem_context *ctx, struct i915_vma *vma)
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@@ -1116,7 +1114,7 @@ static int __context_pin(struct i915_gem_context *ctx, struct i915_vma *vma)
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return i915_vma_pin(vma, 0, GEN8_LR_CONTEXT_ALIGN, flags);
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}
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@ -966,7 +964,7 @@ index 7ece2f0..ad004df 100644
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execlists_context_pin(struct intel_engine_cs *engine,
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struct i915_gem_context *ctx)
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{
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@@ -1166,7 +1164,7 @@ execlists_context_pin(struct intel_engine_cs *engine,
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@@ -1171,7 +1169,7 @@ execlists_context_pin(struct intel_engine_cs *engine,
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return ERR_PTR(ret);
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}
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@ -975,7 +973,7 @@ index 7ece2f0..ad004df 100644
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struct i915_gem_context *ctx)
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{
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struct intel_context *ce = &ctx->engine[engine->id];
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@@ -2015,6 +2013,9 @@ int logical_render_ring_init(struct intel_engine_cs *engine)
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@@ -2020,6 +2018,9 @@ int logical_render_ring_init(struct intel_engine_cs *engine)
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logical_ring_setup(engine);
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@ -985,7 +983,7 @@ index 7ece2f0..ad004df 100644
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if (HAS_L3_DPF(dev_priv))
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engine->irq_keep_mask |= GT_RENDER_L3_PARITY_ERROR_INTERRUPT;
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@@ -2267,7 +2268,7 @@ populate_lr_context(struct i915_gem_context *ctx,
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@@ -2272,7 +2273,7 @@ populate_lr_context(struct i915_gem_context *ctx,
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return 0;
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}
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@ -1012,7 +1010,7 @@ index 6d4f9b9..dd7c3a1 100644
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+
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#endif /* _INTEL_LRC_H_ */
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diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
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index fa6831f..9e381c6 100644
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index fa6831f..f3e97dc 100644
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--- a/drivers/gpu/drm/i915/intel_panel.c
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+++ b/drivers/gpu/drm/i915/intel_panel.c
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@@ -34,6 +34,7 @@
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@ -1044,7 +1042,7 @@ index fa6831f..9e381c6 100644
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static void pch_enable_backlight(const struct intel_crtc_state *crtc_state,
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diff --git a/drivers/hid/hid-multitouch.c b/drivers/hid/hid-multitouch.c
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index 82cee6c..8df88f5 100644
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index 3b4739bd..9203c4c 100644
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--- a/drivers/hid/hid-multitouch.c
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+++ b/drivers/hid/hid-multitouch.c
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@@ -150,6 +150,7 @@ struct mt_device {
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