From 37d7a5ded8c52b838679db164adf1797b31f0eac Mon Sep 17 00:00:00 2001 From: Maximilian Luz Date: Wed, 15 Sep 2021 15:36:37 +0200 Subject: [PATCH] Add patches for v5.14 --- configs/surface-5.14.config | 60 + patches/5.14/0001-surface3-oemb.patch | 101 + patches/5.14/0002-mwifiex.patch | 2472 +++++++++++++ patches/5.14/0003-ath10k.patch | 121 + patches/5.14/0004-ipts.patch | 1503 ++++++++ patches/5.14/0005-surface-sam-over-hid.patch | 335 ++ patches/5.14/0006-surface-hotplug.patch | 50 + patches/5.14/0007-surface-typecover.patch | 233 ++ patches/5.14/0008-cameras.patch | 3288 ++++++++++++++++++ patches/5.14/0009-amd-gpio.patch | 109 + patches/5.14/0010-amd-s0ix.patch | 33 + 11 files changed, 8305 insertions(+) create mode 100644 configs/surface-5.14.config create mode 100644 patches/5.14/0001-surface3-oemb.patch create mode 100644 patches/5.14/0002-mwifiex.patch create mode 100644 patches/5.14/0003-ath10k.patch create mode 100644 patches/5.14/0004-ipts.patch create mode 100644 patches/5.14/0005-surface-sam-over-hid.patch create mode 100644 patches/5.14/0006-surface-hotplug.patch create mode 100644 patches/5.14/0007-surface-typecover.patch create mode 100644 patches/5.14/0008-cameras.patch create mode 100644 patches/5.14/0009-amd-gpio.patch create mode 100644 patches/5.14/0010-amd-s0ix.patch diff --git a/configs/surface-5.14.config b/configs/surface-5.14.config new file mode 100644 index 000000000..cb2b3c9c4 --- /dev/null +++ b/configs/surface-5.14.config @@ -0,0 +1,60 @@ +# +# Surface Aggregator Module +# +CONFIG_SURFACE_AGGREGATOR=m +CONFIG_SURFACE_AGGREGATOR_ERROR_INJECTION=n +CONFIG_SURFACE_AGGREGATOR_BUS=y +CONFIG_SURFACE_AGGREGATOR_CDEV=m +CONFIG_SURFACE_AGGREGATOR_REGISTRY=m + +CONFIG_SURFACE_ACPI_NOTIFY=m +CONFIG_SURFACE_DTX=m +CONFIG_SURFACE_PLATFORM_PROFILE=m + +CONFIG_SURFACE_HID=m +CONFIG_SURFACE_KBD=m + +CONFIG_BATTERY_SURFACE=m +CONFIG_CHARGER_SURFACE=m + +# +# Surface Hotplug +# +CONFIG_SURFACE_HOTPLUG=m + +# +# IPTS touchscreen +# +# This only enables the user interface for IPTS data. +# For the touchscreen to work, you need to install iptsd. +# +CONFIG_MISC_IPTS=m + +# +# Cameras: IPU3 +# +CONFIG_VIDEO_IPU3_IMGU=m +CONFIG_VIDEO_IPU3_CIO2=m +CONFIG_CIO2_BRIDGE=y +CONFIG_INTEL_SKL_INT3472=m + +# +# Cameras: Sensor drivers +# +CONFIG_VIDEO_OV5693=m +CONFIG_VIDEO_OV8865=m + +# +# ALS Sensor for Surface Book 3, Surface Laptop 3, Surface Pro 7 +# +CONFIG_APDS9960=m + +# +# Other Drivers +# +CONFIG_INPUT_SOC_BUTTON_ARRAY=m +CONFIG_SURFACE_3_BUTTON=m +CONFIG_SURFACE_3_POWER_OPREGION=m +CONFIG_SURFACE_PRO3_BUTTON=m +CONFIG_SURFACE_GPE=m +CONFIG_SURFACE_BOOK1_DGPU_SWITCH=m diff --git a/patches/5.14/0001-surface3-oemb.patch b/patches/5.14/0001-surface3-oemb.patch new file mode 100644 index 000000000..b126b05d6 --- /dev/null +++ b/patches/5.14/0001-surface3-oemb.patch @@ -0,0 +1,101 @@ +From f24f1aec7ef199d87ba3153c05ac1f84ea2bf147 Mon Sep 17 00:00:00 2001 +From: Tsuchiya Yuto +Date: Sun, 18 Oct 2020 16:42:44 +0900 +Subject: [PATCH] (surface3-oemb) add DMI matches for Surface 3 with broken DMI + table + +On some Surface 3, the DMI table gets corrupted for unknown reasons +and breaks existing DMI matching used for device-specific quirks. + +This commit adds the (broken) DMI data into dmi_system_id tables used +for quirks so that each driver can enable quirks even on the affected +systems. + +On affected systems, DMI data will look like this: + $ grep . /sys/devices/virtual/dmi/id/{bios_vendor,board_name,board_vendor,\ + chassis_vendor,product_name,sys_vendor} + /sys/devices/virtual/dmi/id/bios_vendor:American Megatrends Inc. + /sys/devices/virtual/dmi/id/board_name:OEMB + /sys/devices/virtual/dmi/id/board_vendor:OEMB + /sys/devices/virtual/dmi/id/chassis_vendor:OEMB + /sys/devices/virtual/dmi/id/product_name:OEMB + /sys/devices/virtual/dmi/id/sys_vendor:OEMB + +Expected: + $ grep . /sys/devices/virtual/dmi/id/{bios_vendor,board_name,board_vendor,\ + chassis_vendor,product_name,sys_vendor} + /sys/devices/virtual/dmi/id/bios_vendor:American Megatrends Inc. + /sys/devices/virtual/dmi/id/board_name:Surface 3 + /sys/devices/virtual/dmi/id/board_vendor:Microsoft Corporation + /sys/devices/virtual/dmi/id/chassis_vendor:Microsoft Corporation + /sys/devices/virtual/dmi/id/product_name:Surface 3 + /sys/devices/virtual/dmi/id/sys_vendor:Microsoft Corporation + +Signed-off-by: Tsuchiya Yuto +Patchset: surface3-oemb +--- + drivers/platform/surface/surface3-wmi.c | 7 +++++++ + sound/soc/codecs/rt5645.c | 9 +++++++++ + sound/soc/intel/common/soc-acpi-intel-cht-match.c | 8 ++++++++ + 3 files changed, 24 insertions(+) + +diff --git a/drivers/platform/surface/surface3-wmi.c b/drivers/platform/surface/surface3-wmi.c +index fcd1d4fb94d5..ee26a5998b07 100644 +--- a/drivers/platform/surface/surface3-wmi.c ++++ b/drivers/platform/surface/surface3-wmi.c +@@ -37,6 +37,13 @@ static const struct dmi_system_id surface3_dmi_table[] = { + DMI_MATCH(DMI_PRODUCT_NAME, "Surface 3"), + }, + }, ++ { ++ .matches = { ++ DMI_MATCH(DMI_BIOS_VENDOR, "American Megatrends Inc."), ++ DMI_MATCH(DMI_SYS_VENDOR, "OEMB"), ++ DMI_MATCH(DMI_PRODUCT_NAME, "OEMB"), ++ }, ++ }, + #endif + { } + }; +diff --git a/sound/soc/codecs/rt5645.c b/sound/soc/codecs/rt5645.c +index 9408ee63cb26..5cac83953901 100644 +--- a/sound/soc/codecs/rt5645.c ++++ b/sound/soc/codecs/rt5645.c +@@ -3718,6 +3718,15 @@ static const struct dmi_system_id dmi_platform_data[] = { + }, + .driver_data = (void *)&intel_braswell_platform_data, + }, ++ { ++ .ident = "Microsoft Surface 3", ++ .matches = { ++ DMI_MATCH(DMI_BIOS_VENDOR, "American Megatrends Inc."), ++ DMI_MATCH(DMI_SYS_VENDOR, "OEMB"), ++ DMI_MATCH(DMI_PRODUCT_NAME, "OEMB"), ++ }, ++ .driver_data = (void *)&intel_braswell_platform_data, ++ }, + { + /* + * Match for the GPDwin which unfortunately uses somewhat +diff --git a/sound/soc/intel/common/soc-acpi-intel-cht-match.c b/sound/soc/intel/common/soc-acpi-intel-cht-match.c +index 227424236fd5..1013a57be89a 100644 +--- a/sound/soc/intel/common/soc-acpi-intel-cht-match.c ++++ b/sound/soc/intel/common/soc-acpi-intel-cht-match.c +@@ -27,6 +27,14 @@ static const struct dmi_system_id cht_table[] = { + DMI_MATCH(DMI_PRODUCT_NAME, "Surface 3"), + }, + }, ++ { ++ .callback = cht_surface_quirk_cb, ++ .matches = { ++ DMI_MATCH(DMI_BIOS_VENDOR, "American Megatrends Inc."), ++ DMI_MATCH(DMI_SYS_VENDOR, "OEMB"), ++ DMI_MATCH(DMI_PRODUCT_NAME, "OEMB"), ++ }, ++ }, + { } + }; + +-- +2.33.0 + diff --git a/patches/5.14/0002-mwifiex.patch b/patches/5.14/0002-mwifiex.patch new file mode 100644 index 000000000..a66b90760 --- /dev/null +++ b/patches/5.14/0002-mwifiex.patch @@ -0,0 +1,2472 @@ +From cfb04a9f42b80602947c5221d4130a3548b36481 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= +Date: Fri, 20 Aug 2021 16:20:49 +0200 +Subject: [PATCH] mwifiex: pcie: add DMI-based quirk implementation for Surface + devices +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This commit adds the ability to apply device-specific quirks to the +mwifiex driver. It uses DMI matching similar to the quirks brcmfmac uses +with dmi.c. We'll add identifiers to match various MS Surface devices, +which this is primarily meant for, later. + +This commit is a slightly modified version of a previous patch sent in +by Tsuchiya Yuto. + +Co-developed-by: Tsuchiya Yuto +Signed-off-by: Tsuchiya Yuto +Signed-off-by: Jonas Dreßler +Patchset: mwifiex +--- + drivers/net/wireless/marvell/mwifiex/Makefile | 1 + + drivers/net/wireless/marvell/mwifiex/pcie.c | 4 ++ + drivers/net/wireless/marvell/mwifiex/pcie.h | 1 + + .../wireless/marvell/mwifiex/pcie_quirks.c | 38 +++++++++++++++++++ + .../wireless/marvell/mwifiex/pcie_quirks.h | 20 ++++++++++ + 5 files changed, 64 insertions(+) + create mode 100644 drivers/net/wireless/marvell/mwifiex/pcie_quirks.c + create mode 100644 drivers/net/wireless/marvell/mwifiex/pcie_quirks.h + +diff --git a/drivers/net/wireless/marvell/mwifiex/Makefile b/drivers/net/wireless/marvell/mwifiex/Makefile +index 162d557b78af..2bd00f40958e 100644 +--- a/drivers/net/wireless/marvell/mwifiex/Makefile ++++ b/drivers/net/wireless/marvell/mwifiex/Makefile +@@ -49,6 +49,7 @@ mwifiex_sdio-y += sdio.o + obj-$(CONFIG_MWIFIEX_SDIO) += mwifiex_sdio.o + + mwifiex_pcie-y += pcie.o ++mwifiex_pcie-y += pcie_quirks.o + obj-$(CONFIG_MWIFIEX_PCIE) += mwifiex_pcie.o + + mwifiex_usb-y += usb.o +diff --git a/drivers/net/wireless/marvell/mwifiex/pcie.c b/drivers/net/wireless/marvell/mwifiex/pcie.c +index 46517515ba72..a530832c9421 100644 +--- a/drivers/net/wireless/marvell/mwifiex/pcie.c ++++ b/drivers/net/wireless/marvell/mwifiex/pcie.c +@@ -27,6 +27,7 @@ + #include "wmm.h" + #include "11n.h" + #include "pcie.h" ++#include "pcie_quirks.h" + + #define PCIE_VERSION "1.0" + #define DRV_NAME "Marvell mwifiex PCIe" +@@ -410,6 +411,9 @@ static int mwifiex_pcie_probe(struct pci_dev *pdev, + return ret; + } + ++ /* check quirks */ ++ mwifiex_initialize_quirks(card); ++ + if (mwifiex_add_card(card, &card->fw_done, &pcie_ops, + MWIFIEX_PCIE, &pdev->dev)) { + pr_err("%s failed\n", __func__); +diff --git a/drivers/net/wireless/marvell/mwifiex/pcie.h b/drivers/net/wireless/marvell/mwifiex/pcie.h +index 5ed613d65709..981e330c77d7 100644 +--- a/drivers/net/wireless/marvell/mwifiex/pcie.h ++++ b/drivers/net/wireless/marvell/mwifiex/pcie.h +@@ -244,6 +244,7 @@ struct pcie_service_card { + unsigned long work_flags; + + bool pci_reset_ongoing; ++ unsigned long quirks; + }; + + static inline int +diff --git a/drivers/net/wireless/marvell/mwifiex/pcie_quirks.c b/drivers/net/wireless/marvell/mwifiex/pcie_quirks.c +new file mode 100644 +index 000000000000..c1665ac5c5d9 +--- /dev/null ++++ b/drivers/net/wireless/marvell/mwifiex/pcie_quirks.c +@@ -0,0 +1,38 @@ ++/* ++ * NXP Wireless LAN device driver: PCIE and platform specific quirks ++ * ++ * This software file (the "File") is distributed by NXP ++ * under the terms of the GNU General Public License Version 2, June 1991 ++ * (the "License"). You may use, redistribute and/or modify this File in ++ * accordance with the terms and conditions of the License, a copy of which ++ * is available by writing to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the ++ * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt. ++ * ++ * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE ++ * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ++ * ARE EXPRESSLY DISCLAIMED. The License provides additional details about ++ * this warranty disclaimer. ++ */ ++ ++#include ++ ++#include "pcie_quirks.h" ++ ++/* quirk table based on DMI matching */ ++static const struct dmi_system_id mwifiex_quirk_table[] = { ++ {} ++}; ++ ++void mwifiex_initialize_quirks(struct pcie_service_card *card) ++{ ++ struct pci_dev *pdev = card->dev; ++ const struct dmi_system_id *dmi_id; ++ ++ dmi_id = dmi_first_match(mwifiex_quirk_table); ++ if (dmi_id) ++ card->quirks = (uintptr_t)dmi_id->driver_data; ++ ++ if (!card->quirks) ++ dev_info(&pdev->dev, "no quirks enabled\n"); ++} +diff --git a/drivers/net/wireless/marvell/mwifiex/pcie_quirks.h b/drivers/net/wireless/marvell/mwifiex/pcie_quirks.h +new file mode 100644 +index 000000000000..18eacc8c2d3a +--- /dev/null ++++ b/drivers/net/wireless/marvell/mwifiex/pcie_quirks.h +@@ -0,0 +1,20 @@ ++/* ++ * NXP Wireless LAN device driver: PCIE and platform specific quirks ++ * ++ * This software file (the "File") is distributed by NXP ++ * under the terms of the GNU General Public License Version 2, June 1991 ++ * (the "License"). You may use, redistribute and/or modify this File in ++ * accordance with the terms and conditions of the License, a copy of which ++ * is available by writing to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the ++ * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt. ++ * ++ * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE ++ * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ++ * ARE EXPRESSLY DISCLAIMED. The License provides additional details about ++ * this warranty disclaimer. ++ */ ++ ++#include "pcie.h" ++ ++void mwifiex_initialize_quirks(struct pcie_service_card *card); +-- +2.33.0 + +From f00fed8765c42f5f52b7f90b6756dd4c71bf7819 Mon Sep 17 00:00:00 2001 +From: Tsuchiya Yuto +Date: Fri, 20 Aug 2021 16:20:50 +0200 +Subject: [PATCH] mwifiex: pcie: add reset_d3cold quirk for Surface gen4+ + devices +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +To reset mwifiex on Surface gen4+ (Pro 4 or later gen) devices, it +seems that putting the wifi device into D3cold is required according +to errata.inf file on Windows installation (Windows/INF/errata.inf). + +This patch adds a function that performs power-cycle (put into D3cold +then D0) and call the function at the end of reset_prepare(). + +Note: Need to also reset the parent device (bridge) of wifi on SB1; +it might be because the bridge of wifi always reports it's in D3hot. +When I tried to reset only the wifi device (not touching parent), it gave +the following error and the reset failed: + + acpi device:4b: Cannot transition to power state D0 for parent in D3hot + mwifiex_pcie 0000:03:00.0: can't change power state from D3cold to D0 (config space inaccessible) + +Signed-off-by: Tsuchiya Yuto +Signed-off-by: Jonas Dreßler +Patchset: mwifiex +--- + drivers/net/wireless/marvell/mwifiex/pcie.c | 7 + + .../wireless/marvell/mwifiex/pcie_quirks.c | 123 ++++++++++++++++++ + .../wireless/marvell/mwifiex/pcie_quirks.h | 3 + + 3 files changed, 133 insertions(+) + +diff --git a/drivers/net/wireless/marvell/mwifiex/pcie.c b/drivers/net/wireless/marvell/mwifiex/pcie.c +index a530832c9421..c6ccce426b49 100644 +--- a/drivers/net/wireless/marvell/mwifiex/pcie.c ++++ b/drivers/net/wireless/marvell/mwifiex/pcie.c +@@ -528,6 +528,13 @@ static void mwifiex_pcie_reset_prepare(struct pci_dev *pdev) + mwifiex_shutdown_sw(adapter); + clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &card->work_flags); + clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags); ++ ++ /* On MS Surface gen4+ devices FLR isn't effective to recover from ++ * hangups, so we power-cycle the card instead. ++ */ ++ if (card->quirks & QUIRK_FW_RST_D3COLD) ++ mwifiex_pcie_reset_d3cold_quirk(pdev); ++ + mwifiex_dbg(adapter, INFO, "%s, successful\n", __func__); + + card->pci_reset_ongoing = true; +diff --git a/drivers/net/wireless/marvell/mwifiex/pcie_quirks.c b/drivers/net/wireless/marvell/mwifiex/pcie_quirks.c +index c1665ac5c5d9..0234cf3c2974 100644 +--- a/drivers/net/wireless/marvell/mwifiex/pcie_quirks.c ++++ b/drivers/net/wireless/marvell/mwifiex/pcie_quirks.c +@@ -21,6 +21,72 @@ + + /* quirk table based on DMI matching */ + static const struct dmi_system_id mwifiex_quirk_table[] = { ++ { ++ .ident = "Surface Pro 4", ++ .matches = { ++ DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"), ++ DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Pro 4"), ++ }, ++ .driver_data = (void *)QUIRK_FW_RST_D3COLD, ++ }, ++ { ++ .ident = "Surface Pro 5", ++ .matches = { ++ /* match for SKU here due to generic product name "Surface Pro" */ ++ DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"), ++ DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "Surface_Pro_1796"), ++ }, ++ .driver_data = (void *)QUIRK_FW_RST_D3COLD, ++ }, ++ { ++ .ident = "Surface Pro 5 (LTE)", ++ .matches = { ++ /* match for SKU here due to generic product name "Surface Pro" */ ++ DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"), ++ DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "Surface_Pro_1807"), ++ }, ++ .driver_data = (void *)QUIRK_FW_RST_D3COLD, ++ }, ++ { ++ .ident = "Surface Pro 6", ++ .matches = { ++ DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"), ++ DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Pro 6"), ++ }, ++ .driver_data = (void *)QUIRK_FW_RST_D3COLD, ++ }, ++ { ++ .ident = "Surface Book 1", ++ .matches = { ++ DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"), ++ DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Book"), ++ }, ++ .driver_data = (void *)QUIRK_FW_RST_D3COLD, ++ }, ++ { ++ .ident = "Surface Book 2", ++ .matches = { ++ DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"), ++ DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Book 2"), ++ }, ++ .driver_data = (void *)QUIRK_FW_RST_D3COLD, ++ }, ++ { ++ .ident = "Surface Laptop 1", ++ .matches = { ++ DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"), ++ DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Laptop"), ++ }, ++ .driver_data = (void *)QUIRK_FW_RST_D3COLD, ++ }, ++ { ++ .ident = "Surface Laptop 2", ++ .matches = { ++ DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"), ++ DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Laptop 2"), ++ }, ++ .driver_data = (void *)QUIRK_FW_RST_D3COLD, ++ }, + {} + }; + +@@ -35,4 +101,61 @@ void mwifiex_initialize_quirks(struct pcie_service_card *card) + + if (!card->quirks) + dev_info(&pdev->dev, "no quirks enabled\n"); ++ if (card->quirks & QUIRK_FW_RST_D3COLD) ++ dev_info(&pdev->dev, "quirk reset_d3cold enabled\n"); ++} ++ ++static void mwifiex_pcie_set_power_d3cold(struct pci_dev *pdev) ++{ ++ dev_info(&pdev->dev, "putting into D3cold...\n"); ++ ++ pci_save_state(pdev); ++ if (pci_is_enabled(pdev)) ++ pci_disable_device(pdev); ++ pci_set_power_state(pdev, PCI_D3cold); ++} ++ ++static int mwifiex_pcie_set_power_d0(struct pci_dev *pdev) ++{ ++ int ret; ++ ++ dev_info(&pdev->dev, "putting into D0...\n"); ++ ++ pci_set_power_state(pdev, PCI_D0); ++ ret = pci_enable_device(pdev); ++ if (ret) { ++ dev_err(&pdev->dev, "pci_enable_device failed\n"); ++ return ret; ++ } ++ pci_restore_state(pdev); ++ ++ return 0; ++} ++ ++int mwifiex_pcie_reset_d3cold_quirk(struct pci_dev *pdev) ++{ ++ struct pci_dev *parent_pdev = pci_upstream_bridge(pdev); ++ int ret; ++ ++ /* Power-cycle (put into D3cold then D0) */ ++ dev_info(&pdev->dev, "Using reset_d3cold quirk to perform FW reset\n"); ++ ++ /* We need to perform power-cycle also for bridge of wifi because ++ * on some devices (e.g. Surface Book 1), the OS for some reasons ++ * can't know the real power state of the bridge. ++ * When tried to power-cycle only wifi, the reset failed with the ++ * following dmesg log: ++ * "Cannot transition to power state D0 for parent in D3hot". ++ */ ++ mwifiex_pcie_set_power_d3cold(pdev); ++ mwifiex_pcie_set_power_d3cold(parent_pdev); ++ ++ ret = mwifiex_pcie_set_power_d0(parent_pdev); ++ if (ret) ++ return ret; ++ ret = mwifiex_pcie_set_power_d0(pdev); ++ if (ret) ++ return ret; ++ ++ return 0; + } +diff --git a/drivers/net/wireless/marvell/mwifiex/pcie_quirks.h b/drivers/net/wireless/marvell/mwifiex/pcie_quirks.h +index 18eacc8c2d3a..8ec4176d698f 100644 +--- a/drivers/net/wireless/marvell/mwifiex/pcie_quirks.h ++++ b/drivers/net/wireless/marvell/mwifiex/pcie_quirks.h +@@ -17,4 +17,7 @@ + + #include "pcie.h" + ++#define QUIRK_FW_RST_D3COLD BIT(0) ++ + void mwifiex_initialize_quirks(struct pcie_service_card *card); ++int mwifiex_pcie_reset_d3cold_quirk(struct pci_dev *pdev); +-- +2.33.0 + +From bdb337db2f66f76c0f4052d333612cca0c9f1ef5 Mon Sep 17 00:00:00 2001 +From: Tsuchiya Yuto +Date: Tue, 29 Sep 2020 17:32:22 +0900 +Subject: [PATCH] mwifiex: pcie: add reset_wsid quirk for Surface 3 + +This commit adds reset_wsid quirk and uses this quirk for Surface 3 on +card reset. + +To reset mwifiex on Surface 3, it seems that calling the _DSM method +exists in \_SB.WSID [1] device is required. + +On Surface 3, calling the _DSM method removes/re-probes the card by +itself. So, need to place the reset function before performing FLR and +skip performing any other reset-related works. + +Note that Surface Pro 3 also has the WSID device [2], but it seems to need +more work. This commit only supports Surface 3 yet. + +[1] https://github.com/linux-surface/acpidumps/blob/05cba925f3a515f222acb5b3551a032ddde958fe/surface_3/dsdt.dsl#L11947-L12011 +[2] https://github.com/linux-surface/acpidumps/blob/05cba925f3a515f222acb5b3551a032ddde958fe/surface_pro_3/dsdt.dsl#L12164-L12216 + +Signed-off-by: Tsuchiya Yuto +Patchset: mwifiex +--- + drivers/net/wireless/marvell/mwifiex/pcie.c | 10 +++ + .../wireless/marvell/mwifiex/pcie_quirks.c | 83 +++++++++++++++++++ + .../wireless/marvell/mwifiex/pcie_quirks.h | 6 ++ + 3 files changed, 99 insertions(+) + +diff --git a/drivers/net/wireless/marvell/mwifiex/pcie.c b/drivers/net/wireless/marvell/mwifiex/pcie.c +index c6ccce426b49..a9d704e8c008 100644 +--- a/drivers/net/wireless/marvell/mwifiex/pcie.c ++++ b/drivers/net/wireless/marvell/mwifiex/pcie.c +@@ -2967,6 +2967,16 @@ static void mwifiex_pcie_card_reset_work(struct mwifiex_adapter *adapter) + { + struct pcie_service_card *card = adapter->card; + ++ /* On Surface 3, reset_wsid method removes then re-probes card by ++ * itself. So, need to place it here and skip performing any other ++ * reset-related works. ++ */ ++ if (card->quirks & QUIRK_FW_RST_WSID_S3) { ++ mwifiex_pcie_reset_wsid_quirk(card->dev); ++ /* skip performing any other reset-related works */ ++ return; ++ } ++ + /* We can't afford to wait here; remove() might be waiting on us. If we + * can't grab the device lock, maybe we'll get another chance later. + */ +diff --git a/drivers/net/wireless/marvell/mwifiex/pcie_quirks.c b/drivers/net/wireless/marvell/mwifiex/pcie_quirks.c +index 0234cf3c2974..563dd0d5ac79 100644 +--- a/drivers/net/wireless/marvell/mwifiex/pcie_quirks.c ++++ b/drivers/net/wireless/marvell/mwifiex/pcie_quirks.c +@@ -15,10 +15,21 @@ + * this warranty disclaimer. + */ + ++#include + #include + + #include "pcie_quirks.h" + ++/* For reset_wsid quirk */ ++#define ACPI_WSID_PATH "\\_SB.WSID" ++#define WSID_REV 0x0 ++#define WSID_FUNC_WIFI_PWR_OFF 0x1 ++#define WSID_FUNC_WIFI_PWR_ON 0x2 ++/* WSID _DSM UUID: "534ea3bf-fcc2-4e7a-908f-a13978f0c7ef" */ ++static const guid_t wsid_dsm_guid = ++ GUID_INIT(0x534ea3bf, 0xfcc2, 0x4e7a, ++ 0x90, 0x8f, 0xa1, 0x39, 0x78, 0xf0, 0xc7, 0xef); ++ + /* quirk table based on DMI matching */ + static const struct dmi_system_id mwifiex_quirk_table[] = { + { +@@ -87,6 +98,14 @@ static const struct dmi_system_id mwifiex_quirk_table[] = { + }, + .driver_data = (void *)QUIRK_FW_RST_D3COLD, + }, ++ { ++ .ident = "Surface 3", ++ .matches = { ++ DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"), ++ DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface 3"), ++ }, ++ .driver_data = (void *)QUIRK_FW_RST_WSID_S3, ++ }, + {} + }; + +@@ -103,6 +122,9 @@ void mwifiex_initialize_quirks(struct pcie_service_card *card) + dev_info(&pdev->dev, "no quirks enabled\n"); + if (card->quirks & QUIRK_FW_RST_D3COLD) + dev_info(&pdev->dev, "quirk reset_d3cold enabled\n"); ++ if (card->quirks & QUIRK_FW_RST_WSID_S3) ++ dev_info(&pdev->dev, ++ "quirk reset_wsid for Surface 3 enabled\n"); + } + + static void mwifiex_pcie_set_power_d3cold(struct pci_dev *pdev) +@@ -159,3 +181,64 @@ int mwifiex_pcie_reset_d3cold_quirk(struct pci_dev *pdev) + + return 0; + } ++ ++int mwifiex_pcie_reset_wsid_quirk(struct pci_dev *pdev) ++{ ++ acpi_handle handle; ++ union acpi_object *obj; ++ acpi_status status; ++ ++ dev_info(&pdev->dev, "Using reset_wsid quirk to perform FW reset\n"); ++ ++ status = acpi_get_handle(NULL, ACPI_WSID_PATH, &handle); ++ if (ACPI_FAILURE(status)) { ++ dev_err(&pdev->dev, "No ACPI handle for path %s\n", ++ ACPI_WSID_PATH); ++ return -ENODEV; ++ } ++ ++ if (!acpi_has_method(handle, "_DSM")) { ++ dev_err(&pdev->dev, "_DSM method not found\n"); ++ return -ENODEV; ++ } ++ ++ if (!acpi_check_dsm(handle, &wsid_dsm_guid, ++ WSID_REV, WSID_FUNC_WIFI_PWR_OFF)) { ++ dev_err(&pdev->dev, ++ "_DSM method doesn't support wifi power off func\n"); ++ return -ENODEV; ++ } ++ ++ if (!acpi_check_dsm(handle, &wsid_dsm_guid, ++ WSID_REV, WSID_FUNC_WIFI_PWR_ON)) { ++ dev_err(&pdev->dev, ++ "_DSM method doesn't support wifi power on func\n"); ++ return -ENODEV; ++ } ++ ++ /* card will be removed immediately after this call on Surface 3 */ ++ dev_info(&pdev->dev, "turning wifi off...\n"); ++ obj = acpi_evaluate_dsm(handle, &wsid_dsm_guid, ++ WSID_REV, WSID_FUNC_WIFI_PWR_OFF, ++ NULL); ++ if (!obj) { ++ dev_err(&pdev->dev, ++ "device _DSM execution failed for turning wifi off\n"); ++ return -EIO; ++ } ++ ACPI_FREE(obj); ++ ++ /* card will be re-probed immediately after this call on Surface 3 */ ++ dev_info(&pdev->dev, "turning wifi on...\n"); ++ obj = acpi_evaluate_dsm(handle, &wsid_dsm_guid, ++ WSID_REV, WSID_FUNC_WIFI_PWR_ON, ++ NULL); ++ if (!obj) { ++ dev_err(&pdev->dev, ++ "device _DSM execution failed for turning wifi on\n"); ++ return -EIO; ++ } ++ ACPI_FREE(obj); ++ ++ return 0; ++} +diff --git a/drivers/net/wireless/marvell/mwifiex/pcie_quirks.h b/drivers/net/wireless/marvell/mwifiex/pcie_quirks.h +index 8ec4176d698f..25370c5a4f59 100644 +--- a/drivers/net/wireless/marvell/mwifiex/pcie_quirks.h ++++ b/drivers/net/wireless/marvell/mwifiex/pcie_quirks.h +@@ -19,5 +19,11 @@ + + #define QUIRK_FW_RST_D3COLD BIT(0) + ++/* Surface 3 and Surface Pro 3 have the same _DSM method but need to ++ * be handled differently. Currently, only S3 is supported. ++ */ ++#define QUIRK_FW_RST_WSID_S3 BIT(1) ++ + void mwifiex_initialize_quirks(struct pcie_service_card *card); + int mwifiex_pcie_reset_d3cold_quirk(struct pci_dev *pdev); ++int mwifiex_pcie_reset_wsid_quirk(struct pci_dev *pdev); +-- +2.33.0 + +From e13bb6ef88c4a9148403259f391a9644f49df4a5 Mon Sep 17 00:00:00 2001 +From: Tsuchiya Yuto +Date: Wed, 30 Sep 2020 18:08:24 +0900 +Subject: [PATCH] mwifiex: pcie: (OEMB) add quirk for Surface 3 with broken DMI + table + +(made referring to http://git.osdn.net/view?p=android-x86/kernel.git;a=commitdiff;h=18e2e857c57633b25b3b4120f212224a108cd883) + +On some Surface 3, the DMI table gets corrupted for unknown reasons +and breaks existing DMI matching used for device-specific quirks. + +This commit adds the (broken) DMI info for the affected Surface 3. + +On affected systems, DMI info will look like this: + $ grep . /sys/devices/virtual/dmi/id/{bios_vendor,board_name,board_vendor,\ + chassis_vendor,product_name,sys_vendor} + /sys/devices/virtual/dmi/id/bios_vendor:American Megatrends Inc. + /sys/devices/virtual/dmi/id/board_name:OEMB + /sys/devices/virtual/dmi/id/board_vendor:OEMB + /sys/devices/virtual/dmi/id/chassis_vendor:OEMB + /sys/devices/virtual/dmi/id/product_name:OEMB + /sys/devices/virtual/dmi/id/sys_vendor:OEMB + +Expected: + $ grep . /sys/devices/virtual/dmi/id/{bios_vendor,board_name,board_vendor,\ + chassis_vendor,product_name,sys_vendor} + /sys/devices/virtual/dmi/id/bios_vendor:American Megatrends Inc. + /sys/devices/virtual/dmi/id/board_name:Surface 3 + /sys/devices/virtual/dmi/id/board_vendor:Microsoft Corporation + /sys/devices/virtual/dmi/id/chassis_vendor:Microsoft Corporation + /sys/devices/virtual/dmi/id/product_name:Surface 3 + /sys/devices/virtual/dmi/id/sys_vendor:Microsoft Corporation + +Signed-off-by: Tsuchiya Yuto +Patchset: mwifiex +--- + drivers/net/wireless/marvell/mwifiex/pcie_quirks.c | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/drivers/net/wireless/marvell/mwifiex/pcie_quirks.c b/drivers/net/wireless/marvell/mwifiex/pcie_quirks.c +index 563dd0d5ac79..32e2f000e57b 100644 +--- a/drivers/net/wireless/marvell/mwifiex/pcie_quirks.c ++++ b/drivers/net/wireless/marvell/mwifiex/pcie_quirks.c +@@ -106,6 +106,15 @@ static const struct dmi_system_id mwifiex_quirk_table[] = { + }, + .driver_data = (void *)QUIRK_FW_RST_WSID_S3, + }, ++ { ++ .ident = "Surface 3", ++ .matches = { ++ DMI_EXACT_MATCH(DMI_BIOS_VENDOR, "American Megatrends Inc."), ++ DMI_EXACT_MATCH(DMI_SYS_VENDOR, "OEMB"), ++ DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "OEMB"), ++ }, ++ .driver_data = (void *)QUIRK_FW_RST_WSID_S3, ++ }, + {} + }; + +-- +2.33.0 + +From 9d79a85ab91f2d81bd058574a9b3801492db2b70 Mon Sep 17 00:00:00 2001 +From: Tsuchiya Yuto +Date: Sun, 4 Oct 2020 00:11:49 +0900 +Subject: [PATCH] mwifiex: pcie: disable bridge_d3 for Surface gen4+ + +Currently, mwifiex fw will crash after suspend on recent kernel series. +On Windows, it seems that the root port of wifi will never enter D3 state +(stay on D0 state). And on Linux, disabling the D3 state for the +bridge fixes fw crashing after suspend. + +This commit disables the D3 state of root port on driver initialization +and fixes fw crashing after suspend. + +Signed-off-by: Tsuchiya Yuto +Patchset: mwifiex +--- + drivers/net/wireless/marvell/mwifiex/pcie.c | 7 +++++ + .../wireless/marvell/mwifiex/pcie_quirks.c | 27 +++++++++++++------ + .../wireless/marvell/mwifiex/pcie_quirks.h | 1 + + 3 files changed, 27 insertions(+), 8 deletions(-) + +diff --git a/drivers/net/wireless/marvell/mwifiex/pcie.c b/drivers/net/wireless/marvell/mwifiex/pcie.c +index a9d704e8c008..76e34eeba3af 100644 +--- a/drivers/net/wireless/marvell/mwifiex/pcie.c ++++ b/drivers/net/wireless/marvell/mwifiex/pcie.c +@@ -379,6 +379,7 @@ static int mwifiex_pcie_probe(struct pci_dev *pdev, + const struct pci_device_id *ent) + { + struct pcie_service_card *card; ++ struct pci_dev *parent_pdev = pci_upstream_bridge(pdev); + int ret; + + pr_debug("info: vendor=0x%4.04X device=0x%4.04X rev=%d\n", +@@ -420,6 +421,12 @@ static int mwifiex_pcie_probe(struct pci_dev *pdev, + return -1; + } + ++ /* disable bridge_d3 for Surface gen4+ devices to fix fw crashing ++ * after suspend ++ */ ++ if (card->quirks & QUIRK_NO_BRIDGE_D3) ++ parent_pdev->bridge_d3 = false; ++ + return 0; + } + +diff --git a/drivers/net/wireless/marvell/mwifiex/pcie_quirks.c b/drivers/net/wireless/marvell/mwifiex/pcie_quirks.c +index 32e2f000e57b..356401bab59c 100644 +--- a/drivers/net/wireless/marvell/mwifiex/pcie_quirks.c ++++ b/drivers/net/wireless/marvell/mwifiex/pcie_quirks.c +@@ -38,7 +38,8 @@ static const struct dmi_system_id mwifiex_quirk_table[] = { + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"), + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Pro 4"), + }, +- .driver_data = (void *)QUIRK_FW_RST_D3COLD, ++ .driver_data = (void *)(QUIRK_FW_RST_D3COLD | ++ QUIRK_NO_BRIDGE_D3), + }, + { + .ident = "Surface Pro 5", +@@ -47,7 +48,8 @@ static const struct dmi_system_id mwifiex_quirk_table[] = { + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"), + DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "Surface_Pro_1796"), + }, +- .driver_data = (void *)QUIRK_FW_RST_D3COLD, ++ .driver_data = (void *)(QUIRK_FW_RST_D3COLD | ++ QUIRK_NO_BRIDGE_D3), + }, + { + .ident = "Surface Pro 5 (LTE)", +@@ -56,7 +58,8 @@ static const struct dmi_system_id mwifiex_quirk_table[] = { + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"), + DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "Surface_Pro_1807"), + }, +- .driver_data = (void *)QUIRK_FW_RST_D3COLD, ++ .driver_data = (void *)(QUIRK_FW_RST_D3COLD | ++ QUIRK_NO_BRIDGE_D3), + }, + { + .ident = "Surface Pro 6", +@@ -64,7 +67,8 @@ static const struct dmi_system_id mwifiex_quirk_table[] = { + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"), + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Pro 6"), + }, +- .driver_data = (void *)QUIRK_FW_RST_D3COLD, ++ .driver_data = (void *)(QUIRK_FW_RST_D3COLD | ++ QUIRK_NO_BRIDGE_D3), + }, + { + .ident = "Surface Book 1", +@@ -72,7 +76,8 @@ static const struct dmi_system_id mwifiex_quirk_table[] = { + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"), + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Book"), + }, +- .driver_data = (void *)QUIRK_FW_RST_D3COLD, ++ .driver_data = (void *)(QUIRK_FW_RST_D3COLD | ++ QUIRK_NO_BRIDGE_D3), + }, + { + .ident = "Surface Book 2", +@@ -80,7 +85,8 @@ static const struct dmi_system_id mwifiex_quirk_table[] = { + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"), + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Book 2"), + }, +- .driver_data = (void *)QUIRK_FW_RST_D3COLD, ++ .driver_data = (void *)(QUIRK_FW_RST_D3COLD | ++ QUIRK_NO_BRIDGE_D3), + }, + { + .ident = "Surface Laptop 1", +@@ -88,7 +94,8 @@ static const struct dmi_system_id mwifiex_quirk_table[] = { + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"), + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Laptop"), + }, +- .driver_data = (void *)QUIRK_FW_RST_D3COLD, ++ .driver_data = (void *)(QUIRK_FW_RST_D3COLD | ++ QUIRK_NO_BRIDGE_D3), + }, + { + .ident = "Surface Laptop 2", +@@ -96,7 +103,8 @@ static const struct dmi_system_id mwifiex_quirk_table[] = { + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"), + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Laptop 2"), + }, +- .driver_data = (void *)QUIRK_FW_RST_D3COLD, ++ .driver_data = (void *)(QUIRK_FW_RST_D3COLD | ++ QUIRK_NO_BRIDGE_D3), + }, + { + .ident = "Surface 3", +@@ -134,6 +142,9 @@ void mwifiex_initialize_quirks(struct pcie_service_card *card) + if (card->quirks & QUIRK_FW_RST_WSID_S3) + dev_info(&pdev->dev, + "quirk reset_wsid for Surface 3 enabled\n"); ++ if (card->quirks & QUIRK_NO_BRIDGE_D3) ++ dev_info(&pdev->dev, ++ "quirk no_brigde_d3 enabled\n"); + } + + static void mwifiex_pcie_set_power_d3cold(struct pci_dev *pdev) +diff --git a/drivers/net/wireless/marvell/mwifiex/pcie_quirks.h b/drivers/net/wireless/marvell/mwifiex/pcie_quirks.h +index 25370c5a4f59..a1de111ad1db 100644 +--- a/drivers/net/wireless/marvell/mwifiex/pcie_quirks.h ++++ b/drivers/net/wireless/marvell/mwifiex/pcie_quirks.h +@@ -23,6 +23,7 @@ + * be handled differently. Currently, only S3 is supported. + */ + #define QUIRK_FW_RST_WSID_S3 BIT(1) ++#define QUIRK_NO_BRIDGE_D3 BIT(2) + + void mwifiex_initialize_quirks(struct pcie_service_card *card); + int mwifiex_pcie_reset_d3cold_quirk(struct pci_dev *pdev); +-- +2.33.0 + +From b7ff7923010663cdb79ecebb8f4a6558b7ae9cf2 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= +Date: Tue, 3 Nov 2020 13:28:04 +0100 +Subject: [PATCH] mwifiex: Add quirk resetting the PCI bridge on MS Surface + devices + +The most recent firmware of the 88W8897 card reports a hardcoded LTR +value to the system during initialization, probably as an (unsuccessful) +attempt of the developers to fix firmware crashes. This LTR value +prevents most of the Microsoft Surface devices from entering deep +powersaving states (either platform C-State 10 or S0ix state), because +the exit latency of that state would be higher than what the card can +tolerate. + +Turns out the card works just the same (including the firmware crashes) +no matter if that hardcoded LTR value is reported or not, so it's kind +of useless and only prevents us from saving power. + +To get rid of those hardcoded LTR reports, it's possible to reset the +PCI bridge device after initializing the cards firmware. I'm not exactly +sure why that works, maybe the power management subsystem of the PCH +resets its stored LTR values when doing a function level reset of the +bridge device. Doing the reset once after starting the wifi firmware +works very well, probably because the firmware only reports that LTR +value a single time during firmware startup. + +Patchset: mwifiex +--- + drivers/net/wireless/marvell/mwifiex/pcie.c | 12 +++++++++ + .../wireless/marvell/mwifiex/pcie_quirks.c | 26 +++++++++++++------ + .../wireless/marvell/mwifiex/pcie_quirks.h | 1 + + 3 files changed, 31 insertions(+), 8 deletions(-) + +diff --git a/drivers/net/wireless/marvell/mwifiex/pcie.c b/drivers/net/wireless/marvell/mwifiex/pcie.c +index 76e34eeba3af..ca06eb7ac4aa 100644 +--- a/drivers/net/wireless/marvell/mwifiex/pcie.c ++++ b/drivers/net/wireless/marvell/mwifiex/pcie.c +@@ -1755,9 +1755,21 @@ mwifiex_pcie_send_boot_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb) + static int mwifiex_pcie_init_fw_port(struct mwifiex_adapter *adapter) + { + struct pcie_service_card *card = adapter->card; ++ struct pci_dev *pdev = card->dev; ++ struct pci_dev *parent_pdev = pci_upstream_bridge(pdev); + const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; + int tx_wrap = card->txbd_wrptr & reg->tx_wrap_mask; + ++ /* Trigger a function level reset of the PCI bridge device, this makes ++ * the firmware of PCIe 88W8897 cards stop reporting a fixed LTR value ++ * that prevents the system from entering package C10 and S0ix powersaving ++ * states. ++ * We need to do it here because it must happen after firmware ++ * initialization and this function is called after that is done. ++ */ ++ if (card->quirks & QUIRK_DO_FLR_ON_BRIDGE) ++ pci_reset_function(parent_pdev); ++ + /* Write the RX ring read pointer in to reg->rx_rdptr */ + if (mwifiex_write_reg(adapter, reg->rx_rdptr, card->rxbd_rdptr | + tx_wrap)) { +diff --git a/drivers/net/wireless/marvell/mwifiex/pcie_quirks.c b/drivers/net/wireless/marvell/mwifiex/pcie_quirks.c +index 356401bab59c..6437f067d07a 100644 +--- a/drivers/net/wireless/marvell/mwifiex/pcie_quirks.c ++++ b/drivers/net/wireless/marvell/mwifiex/pcie_quirks.c +@@ -39,7 +39,8 @@ static const struct dmi_system_id mwifiex_quirk_table[] = { + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Pro 4"), + }, + .driver_data = (void *)(QUIRK_FW_RST_D3COLD | +- QUIRK_NO_BRIDGE_D3), ++ QUIRK_NO_BRIDGE_D3 | ++ QUIRK_DO_FLR_ON_BRIDGE), + }, + { + .ident = "Surface Pro 5", +@@ -49,7 +50,8 @@ static const struct dmi_system_id mwifiex_quirk_table[] = { + DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "Surface_Pro_1796"), + }, + .driver_data = (void *)(QUIRK_FW_RST_D3COLD | +- QUIRK_NO_BRIDGE_D3), ++ QUIRK_NO_BRIDGE_D3 | ++ QUIRK_DO_FLR_ON_BRIDGE), + }, + { + .ident = "Surface Pro 5 (LTE)", +@@ -59,7 +61,8 @@ static const struct dmi_system_id mwifiex_quirk_table[] = { + DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "Surface_Pro_1807"), + }, + .driver_data = (void *)(QUIRK_FW_RST_D3COLD | +- QUIRK_NO_BRIDGE_D3), ++ QUIRK_NO_BRIDGE_D3 | ++ QUIRK_DO_FLR_ON_BRIDGE), + }, + { + .ident = "Surface Pro 6", +@@ -68,7 +71,8 @@ static const struct dmi_system_id mwifiex_quirk_table[] = { + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Pro 6"), + }, + .driver_data = (void *)(QUIRK_FW_RST_D3COLD | +- QUIRK_NO_BRIDGE_D3), ++ QUIRK_NO_BRIDGE_D3 | ++ QUIRK_DO_FLR_ON_BRIDGE), + }, + { + .ident = "Surface Book 1", +@@ -77,7 +81,8 @@ static const struct dmi_system_id mwifiex_quirk_table[] = { + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Book"), + }, + .driver_data = (void *)(QUIRK_FW_RST_D3COLD | +- QUIRK_NO_BRIDGE_D3), ++ QUIRK_NO_BRIDGE_D3 | ++ QUIRK_DO_FLR_ON_BRIDGE), + }, + { + .ident = "Surface Book 2", +@@ -86,7 +91,8 @@ static const struct dmi_system_id mwifiex_quirk_table[] = { + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Book 2"), + }, + .driver_data = (void *)(QUIRK_FW_RST_D3COLD | +- QUIRK_NO_BRIDGE_D3), ++ QUIRK_NO_BRIDGE_D3 | ++ QUIRK_DO_FLR_ON_BRIDGE), + }, + { + .ident = "Surface Laptop 1", +@@ -95,7 +101,8 @@ static const struct dmi_system_id mwifiex_quirk_table[] = { + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Laptop"), + }, + .driver_data = (void *)(QUIRK_FW_RST_D3COLD | +- QUIRK_NO_BRIDGE_D3), ++ QUIRK_NO_BRIDGE_D3 | ++ QUIRK_DO_FLR_ON_BRIDGE), + }, + { + .ident = "Surface Laptop 2", +@@ -104,7 +111,8 @@ static const struct dmi_system_id mwifiex_quirk_table[] = { + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Laptop 2"), + }, + .driver_data = (void *)(QUIRK_FW_RST_D3COLD | +- QUIRK_NO_BRIDGE_D3), ++ QUIRK_NO_BRIDGE_D3 | ++ QUIRK_DO_FLR_ON_BRIDGE), + }, + { + .ident = "Surface 3", +@@ -145,6 +153,8 @@ void mwifiex_initialize_quirks(struct pcie_service_card *card) + if (card->quirks & QUIRK_NO_BRIDGE_D3) + dev_info(&pdev->dev, + "quirk no_brigde_d3 enabled\n"); ++ if (card->quirks & QUIRK_DO_FLR_ON_BRIDGE) ++ dev_info(&pdev->dev, "quirk do_flr_on_bridge enabled\n"); + } + + static void mwifiex_pcie_set_power_d3cold(struct pci_dev *pdev) +diff --git a/drivers/net/wireless/marvell/mwifiex/pcie_quirks.h b/drivers/net/wireless/marvell/mwifiex/pcie_quirks.h +index a1de111ad1db..0e429779bb04 100644 +--- a/drivers/net/wireless/marvell/mwifiex/pcie_quirks.h ++++ b/drivers/net/wireless/marvell/mwifiex/pcie_quirks.h +@@ -24,6 +24,7 @@ + */ + #define QUIRK_FW_RST_WSID_S3 BIT(1) + #define QUIRK_NO_BRIDGE_D3 BIT(2) ++#define QUIRK_DO_FLR_ON_BRIDGE BIT(3) + + void mwifiex_initialize_quirks(struct pcie_service_card *card); + int mwifiex_pcie_reset_d3cold_quirk(struct pci_dev *pdev); +-- +2.33.0 + +From 54fa84a462377ba2d93c13f220ce2b02a85aa3ee Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= +Date: Thu, 25 Mar 2021 11:33:02 +0100 +Subject: [PATCH] Bluetooth: btusb: Lower passive lescan interval on Marvell + 88W8897 + +The Marvell 88W8897 combined wifi and bluetooth card (pcie+usb version) +is used in a lot of Microsoft Surface devices, and all those devices +suffer from very low 2.4GHz wifi connection speeds while bluetooth is +enabled. The reason for that is that the default passive scanning +interval for Bluetooth Low Energy devices is quite high in Linux +(interval of 60 msec and scan window of 30 msec, see hci_core.c), and +the Marvell chip is known for its bad bt+wifi coexisting performance. + +So decrease that passive scan interval and make the scan window shorter +on this particular device to allow for spending more time transmitting +wifi signals: The new scan interval is 250 msec (0x190 * 0.625 msec) and +the new scan window is 6.25 msec (0xa * 0,625 msec). + +This change has a very large impact on the 2.4GHz wifi speeds and gets +it up to performance comparable with the Windows driver, which seems to +apply a similar quirk. + +The interval and window length were tested and found to work very well +with a lot of Bluetooth Low Energy devices, including the Surface Pen, a +Bluetooth Speaker and two modern Bluetooth headphones. All devices were +discovered immediately after turning them on. Even lower values were +also tested, but they introduced longer delays until devices get +discovered. + +Patchset: mwifiex +--- + drivers/bluetooth/btusb.c | 15 +++++++++++++++ + 1 file changed, 15 insertions(+) + +diff --git a/drivers/bluetooth/btusb.c b/drivers/bluetooth/btusb.c +index bd37d6fb88c2..d12fb2034d46 100644 +--- a/drivers/bluetooth/btusb.c ++++ b/drivers/bluetooth/btusb.c +@@ -61,6 +61,7 @@ static struct usb_driver btusb_driver; + #define BTUSB_VALID_LE_STATES 0x800000 + #define BTUSB_QCA_WCN6855 0x1000000 + #define BTUSB_INTEL_NEWGEN 0x2000000 ++#define BTUSB_LOWER_LESCAN_INTERVAL BIT(26) + + static const struct usb_device_id btusb_table[] = { + /* Generic Bluetooth USB device */ +@@ -359,6 +360,7 @@ static const struct usb_device_id blacklist_table[] = { + { USB_DEVICE(0x1286, 0x2044), .driver_info = BTUSB_MARVELL }, + { USB_DEVICE(0x1286, 0x2046), .driver_info = BTUSB_MARVELL }, + { USB_DEVICE(0x1286, 0x204e), .driver_info = BTUSB_MARVELL }, ++ { USB_DEVICE(0x1286, 0x204c), .driver_info = BTUSB_LOWER_LESCAN_INTERVAL }, + + /* Intel Bluetooth devices */ + { USB_DEVICE(0x8087, 0x0025), .driver_info = BTUSB_INTEL_NEW | +@@ -4697,6 +4699,19 @@ static int btusb_probe(struct usb_interface *intf, + if (id->driver_info & BTUSB_MARVELL) + hdev->set_bdaddr = btusb_set_bdaddr_marvell; + ++ /* The Marvell 88W8897 combined wifi and bluetooth card is known for ++ * very bad bt+wifi coexisting performance. ++ * ++ * Decrease the passive BT Low Energy scan interval a bit ++ * (0x0190 * 0.625 msec = 250 msec) and make the scan window shorter ++ * (0x000a * 0,625 msec = 6.25 msec). This allows for significantly ++ * higher wifi throughput while passively scanning for BT LE devices. ++ */ ++ if (id->driver_info & BTUSB_LOWER_LESCAN_INTERVAL) { ++ hdev->le_scan_interval = 0x0190; ++ hdev->le_scan_window = 0x000a; ++ } ++ + if (IS_ENABLED(CONFIG_BT_HCIBTUSB_MTK) && + (id->driver_info & BTUSB_MEDIATEK)) { + hdev->setup = btusb_mtk_setup; +-- +2.33.0 + +From 63b360eb0951f4276070ec1975312e28c035c0c5 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= +Date: Wed, 11 Nov 2020 12:31:26 +0100 +Subject: [PATCH] mwifiex: Small cleanup for handling virtual interface type + changes + +Handle the obvious invalid virtual interface type changes with a general +check instead of looking at the individual change. + +For type changes from P2P_CLIENT to P2P_GO and the other way round, this +changes the behavior slightly: We now still do nothing, but return +-EOPNOTSUPP instead of 0. Now that behavior was incorrect before and +still is, because type changes between these two types are actually +possible and supported, which we'll fix in a following commit. + +Patchset: mwifiex +--- + .../net/wireless/marvell/mwifiex/cfg80211.c | 39 +++++++------------ + 1 file changed, 14 insertions(+), 25 deletions(-) + +diff --git a/drivers/net/wireless/marvell/mwifiex/cfg80211.c b/drivers/net/wireless/marvell/mwifiex/cfg80211.c +index 0961f4a5e415..e8deba119ff1 100644 +--- a/drivers/net/wireless/marvell/mwifiex/cfg80211.c ++++ b/drivers/net/wireless/marvell/mwifiex/cfg80211.c +@@ -1141,6 +1141,20 @@ mwifiex_cfg80211_change_virtual_intf(struct wiphy *wiphy, + return -EBUSY; + } + ++ if (type == NL80211_IFTYPE_UNSPECIFIED) { ++ mwifiex_dbg(priv->adapter, INFO, ++ "%s: no new type specified, keeping old type %d\n", ++ dev->name, curr_iftype); ++ return 0; ++ } ++ ++ if (curr_iftype == type) { ++ mwifiex_dbg(priv->adapter, INFO, ++ "%s: interface already is of type %d\n", ++ dev->name, curr_iftype); ++ return 0; ++ } ++ + switch (curr_iftype) { + case NL80211_IFTYPE_ADHOC: + switch (type) { +@@ -1160,12 +1174,6 @@ mwifiex_cfg80211_change_virtual_intf(struct wiphy *wiphy, + case NL80211_IFTYPE_AP: + return mwifiex_change_vif_to_ap(dev, curr_iftype, type, + params); +- case NL80211_IFTYPE_UNSPECIFIED: +- mwifiex_dbg(priv->adapter, INFO, +- "%s: kept type as IBSS\n", dev->name); +- fallthrough; +- case NL80211_IFTYPE_ADHOC: /* This shouldn't happen */ +- return 0; + default: + mwifiex_dbg(priv->adapter, ERROR, + "%s: changing to %d not supported\n", +@@ -1191,12 +1199,6 @@ mwifiex_cfg80211_change_virtual_intf(struct wiphy *wiphy, + case NL80211_IFTYPE_AP: + return mwifiex_change_vif_to_ap(dev, curr_iftype, type, + params); +- case NL80211_IFTYPE_UNSPECIFIED: +- mwifiex_dbg(priv->adapter, INFO, +- "%s: kept type as STA\n", dev->name); +- fallthrough; +- case NL80211_IFTYPE_STATION: /* This shouldn't happen */ +- return 0; + default: + mwifiex_dbg(priv->adapter, ERROR, + "%s: changing to %d not supported\n", +@@ -1214,12 +1216,6 @@ mwifiex_cfg80211_change_virtual_intf(struct wiphy *wiphy, + case NL80211_IFTYPE_P2P_GO: + return mwifiex_change_vif_to_p2p(dev, curr_iftype, + type, params); +- case NL80211_IFTYPE_UNSPECIFIED: +- mwifiex_dbg(priv->adapter, INFO, +- "%s: kept type as AP\n", dev->name); +- fallthrough; +- case NL80211_IFTYPE_AP: /* This shouldn't happen */ +- return 0; + default: + mwifiex_dbg(priv->adapter, ERROR, + "%s: changing to %d not supported\n", +@@ -1254,13 +1250,6 @@ mwifiex_cfg80211_change_virtual_intf(struct wiphy *wiphy, + return -EFAULT; + return mwifiex_change_vif_to_ap(dev, curr_iftype, type, + params); +- case NL80211_IFTYPE_UNSPECIFIED: +- mwifiex_dbg(priv->adapter, INFO, +- "%s: kept type as P2P\n", dev->name); +- fallthrough; +- case NL80211_IFTYPE_P2P_CLIENT: +- case NL80211_IFTYPE_P2P_GO: +- return 0; + default: + mwifiex_dbg(priv->adapter, ERROR, + "%s: changing to %d not supported\n", +-- +2.33.0 + +From fe69c4fdcbe3552b2ccd9265ed83053d073fc80f Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= +Date: Tue, 10 Nov 2020 12:49:56 +0100 +Subject: [PATCH] mwifiex: Use non-posted PCI register writes + +On the 88W8897 card it's very important the TX ring write pointer is +updated correctly to its new value before setting the TX ready +interrupt, otherwise the firmware appears to crash (probably because +it's trying to DMA-read from the wrong place). + +Since PCI uses "posted writes" when writing to a register, it's not +guaranteed that a write will happen immediately. That means the pointer +might be outdated when setting the TX ready interrupt, leading to +firmware crashes especially when ASPM L1 and L1 substates are enabled +(because of the higher link latency, the write will probably take +longer). + +So fix those firmware crashes by always forcing non-posted writes. We do +that by simply reading back the register after writing it, just as a lot +of other drivers do. + +There are two reproducers that are fixed with this patch: + +1) During rx/tx traffic and with ASPM L1 substates enabled (the enabled +substates are platform dependent), the firmware crashes and eventually a +command timeout appears in the logs. That crash is fixed by using a +non-posted write in mwifiex_pcie_send_data(). + +2) When sending lots of commands to the card, waking it up from sleep in +very quick intervals, the firmware eventually crashes. That crash +appears to be fixed by some other non-posted write included here. + +Patchset: mwifiex +--- + drivers/net/wireless/marvell/mwifiex/pcie.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/drivers/net/wireless/marvell/mwifiex/pcie.c b/drivers/net/wireless/marvell/mwifiex/pcie.c +index ca06eb7ac4aa..95e5851d2d0a 100644 +--- a/drivers/net/wireless/marvell/mwifiex/pcie.c ++++ b/drivers/net/wireless/marvell/mwifiex/pcie.c +@@ -237,6 +237,12 @@ static int mwifiex_write_reg(struct mwifiex_adapter *adapter, int reg, u32 data) + + iowrite32(data, card->pci_mmap1 + reg); + ++ /* Do a read-back, which makes the write non-posted, ensuring the ++ * completion before returning. ++ * The firmware of the 88W8897 card is buggy and this avoids crashes. ++ */ ++ ioread32(card->pci_mmap1 + reg); ++ + return 0; + } + +-- +2.33.0 + +From fca8f26546b67570a839ae4d7e0db0b7bac5759b Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= +Date: Wed, 11 Nov 2020 12:44:39 +0100 +Subject: [PATCH] mwifiex: Use function to check whether interface type change + is allowed + +Instead of bailing out in the function which is supposed to do the type +change, detect invalid changes beforehand using a generic function and +return an error if the change is not allowed. + +Patchset: mwifiex +--- + .../net/wireless/marvell/mwifiex/cfg80211.c | 139 ++++++++++++------ + 1 file changed, 92 insertions(+), 47 deletions(-) + +diff --git a/drivers/net/wireless/marvell/mwifiex/cfg80211.c b/drivers/net/wireless/marvell/mwifiex/cfg80211.c +index e8deba119ff1..dabc59c47de3 100644 +--- a/drivers/net/wireless/marvell/mwifiex/cfg80211.c ++++ b/drivers/net/wireless/marvell/mwifiex/cfg80211.c +@@ -939,6 +939,76 @@ mwifiex_init_new_priv_params(struct mwifiex_private *priv, + return 0; + } + ++static bool ++is_vif_type_change_allowed(struct mwifiex_adapter *adapter, ++ enum nl80211_iftype old_iftype, ++ enum nl80211_iftype new_iftype) ++{ ++ switch (old_iftype) { ++ case NL80211_IFTYPE_ADHOC: ++ switch (new_iftype) { ++ case NL80211_IFTYPE_STATION: ++ return true; ++ case NL80211_IFTYPE_P2P_CLIENT: ++ case NL80211_IFTYPE_P2P_GO: ++ return adapter->curr_iface_comb.p2p_intf != ++ adapter->iface_limit.p2p_intf; ++ case NL80211_IFTYPE_AP: ++ return adapter->curr_iface_comb.uap_intf != ++ adapter->iface_limit.uap_intf; ++ default: ++ return false; ++ } ++ ++ case NL80211_IFTYPE_STATION: ++ switch (new_iftype) { ++ case NL80211_IFTYPE_ADHOC: ++ return true; ++ case NL80211_IFTYPE_P2P_CLIENT: ++ case NL80211_IFTYPE_P2P_GO: ++ return adapter->curr_iface_comb.p2p_intf != ++ adapter->iface_limit.p2p_intf; ++ case NL80211_IFTYPE_AP: ++ return adapter->curr_iface_comb.uap_intf != ++ adapter->iface_limit.uap_intf; ++ default: ++ return false; ++ } ++ ++ case NL80211_IFTYPE_AP: ++ switch (new_iftype) { ++ case NL80211_IFTYPE_ADHOC: ++ case NL80211_IFTYPE_STATION: ++ return adapter->curr_iface_comb.sta_intf != ++ adapter->iface_limit.sta_intf; ++ case NL80211_IFTYPE_P2P_CLIENT: ++ case NL80211_IFTYPE_P2P_GO: ++ return adapter->curr_iface_comb.p2p_intf != ++ adapter->iface_limit.p2p_intf; ++ default: ++ return false; ++ } ++ ++ case NL80211_IFTYPE_P2P_CLIENT: ++ case NL80211_IFTYPE_P2P_GO: ++ switch (new_iftype) { ++ case NL80211_IFTYPE_ADHOC: ++ case NL80211_IFTYPE_STATION: ++ return true; ++ case NL80211_IFTYPE_AP: ++ return adapter->curr_iface_comb.uap_intf != ++ adapter->iface_limit.uap_intf; ++ default: ++ return false; ++ } ++ ++ default: ++ break; ++ } ++ ++ return false; ++} ++ + static int + mwifiex_change_vif_to_p2p(struct net_device *dev, + enum nl80211_iftype curr_iftype, +@@ -955,13 +1025,6 @@ mwifiex_change_vif_to_p2p(struct net_device *dev, + + adapter = priv->adapter; + +- if (adapter->curr_iface_comb.p2p_intf == +- adapter->iface_limit.p2p_intf) { +- mwifiex_dbg(adapter, ERROR, +- "cannot create multiple P2P ifaces\n"); +- return -1; +- } +- + mwifiex_dbg(adapter, INFO, + "%s: changing role to p2p\n", dev->name); + +@@ -1027,15 +1090,6 @@ mwifiex_change_vif_to_sta_adhoc(struct net_device *dev, + + adapter = priv->adapter; + +- if ((curr_iftype != NL80211_IFTYPE_P2P_CLIENT && +- curr_iftype != NL80211_IFTYPE_P2P_GO) && +- (adapter->curr_iface_comb.sta_intf == +- adapter->iface_limit.sta_intf)) { +- mwifiex_dbg(adapter, ERROR, +- "cannot create multiple station/adhoc ifaces\n"); +- return -1; +- } +- + if (type == NL80211_IFTYPE_STATION) + mwifiex_dbg(adapter, INFO, + "%s: changing role to station\n", dev->name); +@@ -1086,13 +1140,6 @@ mwifiex_change_vif_to_ap(struct net_device *dev, + + adapter = priv->adapter; + +- if (adapter->curr_iface_comb.uap_intf == +- adapter->iface_limit.uap_intf) { +- mwifiex_dbg(adapter, ERROR, +- "cannot create multiple AP ifaces\n"); +- return -1; +- } +- + mwifiex_dbg(adapter, INFO, + "%s: changing role to AP\n", dev->name); + +@@ -1155,6 +1202,13 @@ mwifiex_cfg80211_change_virtual_intf(struct wiphy *wiphy, + return 0; + } + ++ if (!is_vif_type_change_allowed(priv->adapter, curr_iftype, type)) { ++ mwifiex_dbg(priv->adapter, ERROR, ++ "%s: change from type %d to %d is not allowed\n", ++ dev->name, curr_iftype, type); ++ return -EOPNOTSUPP; ++ } ++ + switch (curr_iftype) { + case NL80211_IFTYPE_ADHOC: + switch (type) { +@@ -1175,12 +1229,9 @@ mwifiex_cfg80211_change_virtual_intf(struct wiphy *wiphy, + return mwifiex_change_vif_to_ap(dev, curr_iftype, type, + params); + default: +- mwifiex_dbg(priv->adapter, ERROR, +- "%s: changing to %d not supported\n", +- dev->name, type); +- return -EOPNOTSUPP; ++ goto errnotsupp; + } +- break; ++ + case NL80211_IFTYPE_STATION: + switch (type) { + case NL80211_IFTYPE_ADHOC: +@@ -1200,12 +1251,9 @@ mwifiex_cfg80211_change_virtual_intf(struct wiphy *wiphy, + return mwifiex_change_vif_to_ap(dev, curr_iftype, type, + params); + default: +- mwifiex_dbg(priv->adapter, ERROR, +- "%s: changing to %d not supported\n", +- dev->name, type); +- return -EOPNOTSUPP; ++ goto errnotsupp; + } +- break; ++ + case NL80211_IFTYPE_AP: + switch (type) { + case NL80211_IFTYPE_ADHOC: +@@ -1217,12 +1265,9 @@ mwifiex_cfg80211_change_virtual_intf(struct wiphy *wiphy, + return mwifiex_change_vif_to_p2p(dev, curr_iftype, + type, params); + default: +- mwifiex_dbg(priv->adapter, ERROR, +- "%s: changing to %d not supported\n", +- dev->name, type); +- return -EOPNOTSUPP; ++ goto errnotsupp; + } +- break; ++ + case NL80211_IFTYPE_P2P_CLIENT: + case NL80211_IFTYPE_P2P_GO: + switch (type) { +@@ -1251,21 +1296,21 @@ mwifiex_cfg80211_change_virtual_intf(struct wiphy *wiphy, + return mwifiex_change_vif_to_ap(dev, curr_iftype, type, + params); + default: +- mwifiex_dbg(priv->adapter, ERROR, +- "%s: changing to %d not supported\n", +- dev->name, type); +- return -EOPNOTSUPP; ++ goto errnotsupp; + } +- break; ++ + default: +- mwifiex_dbg(priv->adapter, ERROR, +- "%s: unknown iftype: %d\n", +- dev->name, dev->ieee80211_ptr->iftype); +- return -EOPNOTSUPP; ++ goto errnotsupp; + } + + + return 0; ++ ++errnotsupp: ++ mwifiex_dbg(priv->adapter, ERROR, ++ "unsupported interface type transition: %d to %d\n", ++ curr_iftype, type); ++ return -EOPNOTSUPP; + } + + static void +-- +2.33.0 + +From ec0d651436798ce2ddbb055fc1a268cae26ff954 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= +Date: Wed, 11 Nov 2020 13:33:04 +0100 +Subject: [PATCH] mwifiex: Run SET_BSS_MODE when changing from P2P to STATION + vif-type + +We currently handle changing from the P2P to the STATION virtual +interface type slightly different than changing from P2P to ADHOC: When +changing to STATION, we don't send the SET_BSS_MODE command. We do send +that command on all other type-changes though, and it probably makes +sense to send the command since after all we just changed our BSS_MODE. +Looking at prior changes to this part of the code, it seems that this is +simply a leftover from old refactorings. + +Since sending the SET_BSS_MODE command is the only difference between +mwifiex_change_vif_to_sta_adhoc() and the current code, we can now use +mwifiex_change_vif_to_sta_adhoc() for both switching to ADHOC and +STATION interface type. + +This does not fix any particular bug and just "looked right", so there's +a small chance it might be a regression. + +Patchset: mwifiex +--- + .../net/wireless/marvell/mwifiex/cfg80211.c | 22 ++++--------------- + 1 file changed, 4 insertions(+), 18 deletions(-) + +diff --git a/drivers/net/wireless/marvell/mwifiex/cfg80211.c b/drivers/net/wireless/marvell/mwifiex/cfg80211.c +index dabc59c47de3..146aabe14753 100644 +--- a/drivers/net/wireless/marvell/mwifiex/cfg80211.c ++++ b/drivers/net/wireless/marvell/mwifiex/cfg80211.c +@@ -1270,29 +1270,15 @@ mwifiex_cfg80211_change_virtual_intf(struct wiphy *wiphy, + + case NL80211_IFTYPE_P2P_CLIENT: + case NL80211_IFTYPE_P2P_GO: ++ if (mwifiex_cfg80211_deinit_p2p(priv)) ++ return -EFAULT; ++ + switch (type) { +- case NL80211_IFTYPE_STATION: +- if (mwifiex_cfg80211_deinit_p2p(priv)) +- return -EFAULT; +- priv->adapter->curr_iface_comb.p2p_intf--; +- priv->adapter->curr_iface_comb.sta_intf++; +- dev->ieee80211_ptr->iftype = type; +- if (mwifiex_deinit_priv_params(priv)) +- return -1; +- if (mwifiex_init_new_priv_params(priv, dev, type)) +- return -1; +- if (mwifiex_sta_init_cmd(priv, false, false)) +- return -1; +- break; + case NL80211_IFTYPE_ADHOC: +- if (mwifiex_cfg80211_deinit_p2p(priv)) +- return -EFAULT; ++ case NL80211_IFTYPE_STATION: + return mwifiex_change_vif_to_sta_adhoc(dev, curr_iftype, + type, params); +- break; + case NL80211_IFTYPE_AP: +- if (mwifiex_cfg80211_deinit_p2p(priv)) +- return -EFAULT; + return mwifiex_change_vif_to_ap(dev, curr_iftype, type, + params); + default: +-- +2.33.0 + +From 14298c35e52be277d32d4d045e16d9bc049db3ac Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= +Date: Wed, 11 Nov 2020 14:42:54 +0100 +Subject: [PATCH] mwifiex: Use helper function for counting interface types + +Use a small helper function to increment and decrement the counter of +the interface types we currently manage. This makes the code that +actually changes and sets up the interface type a bit less messy and +also helps avoiding mistakes in case someone increments/decrements a +counter wrongly. + +Patchset: mwifiex +--- + .../net/wireless/marvell/mwifiex/cfg80211.c | 110 ++++++------------ + 1 file changed, 35 insertions(+), 75 deletions(-) + +diff --git a/drivers/net/wireless/marvell/mwifiex/cfg80211.c b/drivers/net/wireless/marvell/mwifiex/cfg80211.c +index 146aabe14753..8b9517c243c8 100644 +--- a/drivers/net/wireless/marvell/mwifiex/cfg80211.c ++++ b/drivers/net/wireless/marvell/mwifiex/cfg80211.c +@@ -1009,6 +1009,32 @@ is_vif_type_change_allowed(struct mwifiex_adapter *adapter, + return false; + } + ++static void ++update_vif_type_counter(struct mwifiex_adapter *adapter, ++ enum nl80211_iftype iftype, ++ int change) ++{ ++ switch (iftype) { ++ case NL80211_IFTYPE_UNSPECIFIED: ++ case NL80211_IFTYPE_ADHOC: ++ case NL80211_IFTYPE_STATION: ++ adapter->curr_iface_comb.sta_intf += change; ++ break; ++ case NL80211_IFTYPE_AP: ++ adapter->curr_iface_comb.uap_intf += change; ++ break; ++ case NL80211_IFTYPE_P2P_CLIENT: ++ case NL80211_IFTYPE_P2P_GO: ++ adapter->curr_iface_comb.p2p_intf += change; ++ break; ++ default: ++ mwifiex_dbg(adapter, ERROR, ++ "%s: Unsupported iftype passed: %d\n", ++ __func__, iftype); ++ break; ++ } ++} ++ + static int + mwifiex_change_vif_to_p2p(struct net_device *dev, + enum nl80211_iftype curr_iftype, +@@ -1056,19 +1082,8 @@ mwifiex_change_vif_to_p2p(struct net_device *dev, + if (mwifiex_sta_init_cmd(priv, false, false)) + return -1; + +- switch (curr_iftype) { +- case NL80211_IFTYPE_STATION: +- case NL80211_IFTYPE_ADHOC: +- adapter->curr_iface_comb.sta_intf--; +- break; +- case NL80211_IFTYPE_AP: +- adapter->curr_iface_comb.uap_intf--; +- break; +- default: +- break; +- } +- +- adapter->curr_iface_comb.p2p_intf++; ++ update_vif_type_counter(adapter, curr_iftype, -1); ++ update_vif_type_counter(adapter, type, +1); + dev->ieee80211_ptr->iftype = type; + + return 0; +@@ -1107,20 +1122,10 @@ mwifiex_change_vif_to_sta_adhoc(struct net_device *dev, + if (mwifiex_sta_init_cmd(priv, false, false)) + return -1; + +- switch (curr_iftype) { +- case NL80211_IFTYPE_P2P_CLIENT: +- case NL80211_IFTYPE_P2P_GO: +- adapter->curr_iface_comb.p2p_intf--; +- break; +- case NL80211_IFTYPE_AP: +- adapter->curr_iface_comb.uap_intf--; +- break; +- default: +- break; +- } +- +- adapter->curr_iface_comb.sta_intf++; ++ update_vif_type_counter(adapter, curr_iftype, -1); ++ update_vif_type_counter(adapter, type, +1); + dev->ieee80211_ptr->iftype = type; ++ + return 0; + } + +@@ -1153,20 +1158,8 @@ mwifiex_change_vif_to_ap(struct net_device *dev, + if (mwifiex_sta_init_cmd(priv, false, false)) + return -1; + +- switch (curr_iftype) { +- case NL80211_IFTYPE_P2P_CLIENT: +- case NL80211_IFTYPE_P2P_GO: +- adapter->curr_iface_comb.p2p_intf--; +- break; +- case NL80211_IFTYPE_STATION: +- case NL80211_IFTYPE_ADHOC: +- adapter->curr_iface_comb.sta_intf--; +- break; +- default: +- break; +- } +- +- adapter->curr_iface_comb.uap_intf++; ++ update_vif_type_counter(adapter, curr_iftype, -1); ++ update_vif_type_counter(adapter, type, +1); + dev->ieee80211_ptr->iftype = type; + return 0; + } +@@ -3128,23 +3121,7 @@ struct wireless_dev *mwifiex_add_virtual_intf(struct wiphy *wiphy, + mwifiex_dev_debugfs_init(priv); + #endif + +- switch (type) { +- case NL80211_IFTYPE_UNSPECIFIED: +- case NL80211_IFTYPE_STATION: +- case NL80211_IFTYPE_ADHOC: +- adapter->curr_iface_comb.sta_intf++; +- break; +- case NL80211_IFTYPE_AP: +- adapter->curr_iface_comb.uap_intf++; +- break; +- case NL80211_IFTYPE_P2P_CLIENT: +- adapter->curr_iface_comb.p2p_intf++; +- break; +- default: +- /* This should be dead code; checked above */ +- mwifiex_dbg(adapter, ERROR, "type not supported\n"); +- return ERR_PTR(-EINVAL); +- } ++ update_vif_type_counter(adapter, type, +1); + + return &priv->wdev; + +@@ -3210,24 +3187,7 @@ int mwifiex_del_virtual_intf(struct wiphy *wiphy, struct wireless_dev *wdev) + /* Clear the priv in adapter */ + priv->netdev = NULL; + +- switch (priv->bss_mode) { +- case NL80211_IFTYPE_UNSPECIFIED: +- case NL80211_IFTYPE_STATION: +- case NL80211_IFTYPE_ADHOC: +- adapter->curr_iface_comb.sta_intf--; +- break; +- case NL80211_IFTYPE_AP: +- adapter->curr_iface_comb.uap_intf--; +- break; +- case NL80211_IFTYPE_P2P_CLIENT: +- case NL80211_IFTYPE_P2P_GO: +- adapter->curr_iface_comb.p2p_intf--; +- break; +- default: +- mwifiex_dbg(adapter, ERROR, +- "del_virtual_intf: type not supported\n"); +- break; +- } ++ update_vif_type_counter(adapter, priv->bss_mode, -1); + + priv->bss_mode = NL80211_IFTYPE_UNSPECIFIED; + +-- +2.33.0 + +From a99b92605f3cc65522cf1c452cf72f6fa43b5a63 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= +Date: Fri, 26 Mar 2021 15:56:58 +0100 +Subject: [PATCH] mwifiex: Update virtual interface counters right after + setting bss_type + +In mwifiex_init_new_priv_params() we update our private driver state to +reflect the currently selected virtual interface type. Most notably we +set the bss_mode to the mode we're going to put the firmware in. + +Now after we updated the driver state we actually start talking to the +firmware and instruct it to set up the new mode. Those commands can and +will sometimes fail, in which case we return with an error from +mwifiex_change_vif_to_*. We currently update our virtual interface type +counters after this return, which means the code is never reached when a +firmware error happens and we never update the counters. Since we have +updated our bss_mode earlier though, the counters now no longer reflect +the actual state of the driver. + +This will break things on the next virtual interface change, because the +virtual interface type we're switching away from didn't get its counter +incremented, and we end up decrementing a 0-counter. + +To fix this, simply update the virtual interface type counters right +after updating our driver structures, so that they are always in sync. + +Patchset: mwifiex +--- + .../net/wireless/marvell/mwifiex/cfg80211.c | 25 +++++++++++-------- + 1 file changed, 14 insertions(+), 11 deletions(-) + +diff --git a/drivers/net/wireless/marvell/mwifiex/cfg80211.c b/drivers/net/wireless/marvell/mwifiex/cfg80211.c +index 8b9517c243c8..f2797102c5a2 100644 +--- a/drivers/net/wireless/marvell/mwifiex/cfg80211.c ++++ b/drivers/net/wireless/marvell/mwifiex/cfg80211.c +@@ -1059,6 +1059,10 @@ mwifiex_change_vif_to_p2p(struct net_device *dev, + if (mwifiex_init_new_priv_params(priv, dev, type)) + return -1; + ++ update_vif_type_counter(adapter, curr_iftype, -1); ++ update_vif_type_counter(adapter, type, +1); ++ dev->ieee80211_ptr->iftype = type; ++ + switch (type) { + case NL80211_IFTYPE_P2P_CLIENT: + if (mwifiex_cfg80211_init_p2p_client(priv)) +@@ -1082,10 +1086,6 @@ mwifiex_change_vif_to_p2p(struct net_device *dev, + if (mwifiex_sta_init_cmd(priv, false, false)) + return -1; + +- update_vif_type_counter(adapter, curr_iftype, -1); +- update_vif_type_counter(adapter, type, +1); +- dev->ieee80211_ptr->iftype = type; +- + return 0; + } + +@@ -1116,16 +1116,17 @@ mwifiex_change_vif_to_sta_adhoc(struct net_device *dev, + return -1; + if (mwifiex_init_new_priv_params(priv, dev, type)) + return -1; ++ ++ update_vif_type_counter(adapter, curr_iftype, -1); ++ update_vif_type_counter(adapter, type, +1); ++ dev->ieee80211_ptr->iftype = type; ++ + if (mwifiex_send_cmd(priv, HostCmd_CMD_SET_BSS_MODE, + HostCmd_ACT_GEN_SET, 0, NULL, true)) + return -1; + if (mwifiex_sta_init_cmd(priv, false, false)) + return -1; + +- update_vif_type_counter(adapter, curr_iftype, -1); +- update_vif_type_counter(adapter, type, +1); +- dev->ieee80211_ptr->iftype = type; +- + return 0; + } + +@@ -1152,15 +1153,17 @@ mwifiex_change_vif_to_ap(struct net_device *dev, + return -1; + if (mwifiex_init_new_priv_params(priv, dev, type)) + return -1; ++ ++ update_vif_type_counter(adapter, curr_iftype, -1); ++ update_vif_type_counter(adapter, type, +1); ++ dev->ieee80211_ptr->iftype = type; ++ + if (mwifiex_send_cmd(priv, HostCmd_CMD_SET_BSS_MODE, + HostCmd_ACT_GEN_SET, 0, NULL, true)) + return -1; + if (mwifiex_sta_init_cmd(priv, false, false)) + return -1; + +- update_vif_type_counter(adapter, curr_iftype, -1); +- update_vif_type_counter(adapter, type, +1); +- dev->ieee80211_ptr->iftype = type; + return 0; + } + /* +-- +2.33.0 + +From 7bc5f5f28bdab6a48bb82c4b2e24bf14d62ecd32 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= +Date: Wed, 11 Nov 2020 13:42:40 +0100 +Subject: [PATCH] mwifiex: Allow switching interface type from P2P_CLIENT to + P2P_GO + +It's possible to change virtual interface type between P2P_CLIENT and +P2P_GO, the card supports that just fine, and it happens for example +when using miracast with the miraclecast software. + +So allow type changes between P2P_CLIENT and P2P_GO and simply call into +mwifiex_change_vif_to_p2p(), which handles this just fine. We have to +call mwifiex_cfg80211_deinit_p2p() before though to make sure the old +p2p mode is properly uninitialized. + +Patchset: mwifiex +--- + .../net/wireless/marvell/mwifiex/cfg80211.c | 36 +++++++++++++++++++ + 1 file changed, 36 insertions(+) + +diff --git a/drivers/net/wireless/marvell/mwifiex/cfg80211.c b/drivers/net/wireless/marvell/mwifiex/cfg80211.c +index f2797102c5a2..ed4041ff9c89 100644 +--- a/drivers/net/wireless/marvell/mwifiex/cfg80211.c ++++ b/drivers/net/wireless/marvell/mwifiex/cfg80211.c +@@ -990,11 +990,26 @@ is_vif_type_change_allowed(struct mwifiex_adapter *adapter, + } + + case NL80211_IFTYPE_P2P_CLIENT: ++ switch (new_iftype) { ++ case NL80211_IFTYPE_ADHOC: ++ case NL80211_IFTYPE_STATION: ++ return true; ++ case NL80211_IFTYPE_P2P_GO: ++ return true; ++ case NL80211_IFTYPE_AP: ++ return adapter->curr_iface_comb.uap_intf != ++ adapter->iface_limit.uap_intf; ++ default: ++ return false; ++ } ++ + case NL80211_IFTYPE_P2P_GO: + switch (new_iftype) { + case NL80211_IFTYPE_ADHOC: + case NL80211_IFTYPE_STATION: + return true; ++ case NL80211_IFTYPE_P2P_CLIENT: ++ return true; + case NL80211_IFTYPE_AP: + return adapter->curr_iface_comb.uap_intf != + adapter->iface_limit.uap_intf; +@@ -1265,6 +1280,24 @@ mwifiex_cfg80211_change_virtual_intf(struct wiphy *wiphy, + } + + case NL80211_IFTYPE_P2P_CLIENT: ++ if (mwifiex_cfg80211_deinit_p2p(priv)) ++ return -EFAULT; ++ ++ switch (type) { ++ case NL80211_IFTYPE_ADHOC: ++ case NL80211_IFTYPE_STATION: ++ return mwifiex_change_vif_to_sta_adhoc(dev, curr_iftype, ++ type, params); ++ case NL80211_IFTYPE_P2P_GO: ++ return mwifiex_change_vif_to_p2p(dev, curr_iftype, ++ type, params); ++ case NL80211_IFTYPE_AP: ++ return mwifiex_change_vif_to_ap(dev, curr_iftype, type, ++ params); ++ default: ++ goto errnotsupp; ++ } ++ + case NL80211_IFTYPE_P2P_GO: + if (mwifiex_cfg80211_deinit_p2p(priv)) + return -EFAULT; +@@ -1274,6 +1307,9 @@ mwifiex_cfg80211_change_virtual_intf(struct wiphy *wiphy, + case NL80211_IFTYPE_STATION: + return mwifiex_change_vif_to_sta_adhoc(dev, curr_iftype, + type, params); ++ case NL80211_IFTYPE_P2P_CLIENT: ++ return mwifiex_change_vif_to_p2p(dev, curr_iftype, ++ type, params); + case NL80211_IFTYPE_AP: + return mwifiex_change_vif_to_ap(dev, curr_iftype, type, + params); +-- +2.33.0 + +From 99dd302ac8c67319244cd8966366aacd5265ab0c Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= +Date: Fri, 26 Mar 2021 15:31:08 +0100 +Subject: [PATCH] mwifiex: Handle interface type changes from AP to STATION + +Looks like this case was simply overseen, so handle it, too. + +Patchset: mwifiex +--- + drivers/net/wireless/marvell/mwifiex/cfg80211.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/net/wireless/marvell/mwifiex/cfg80211.c b/drivers/net/wireless/marvell/mwifiex/cfg80211.c +index ed4041ff9c89..64caa5c4350d 100644 +--- a/drivers/net/wireless/marvell/mwifiex/cfg80211.c ++++ b/drivers/net/wireless/marvell/mwifiex/cfg80211.c +@@ -1268,6 +1268,7 @@ mwifiex_cfg80211_change_virtual_intf(struct wiphy *wiphy, + case NL80211_IFTYPE_AP: + switch (type) { + case NL80211_IFTYPE_ADHOC: ++ case NL80211_IFTYPE_STATION: + return mwifiex_change_vif_to_sta_adhoc(dev, curr_iftype, + type, params); + break; +-- +2.33.0 + +From 6a1d6ec2b410ff0177cb79cbcf43888615f89420 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= +Date: Fri, 26 Mar 2021 15:32:16 +0100 +Subject: [PATCH] mwifiex: Properly initialize private structure on interface + type changes + +When creating a new virtual interface in mwifiex_add_virtual_intf(), we +update our internal driver states like bss_type, bss_priority, bss_role +and bss_mode to reflect the mode the firmware will be set to. + +When switching virtual interface mode using +mwifiex_init_new_priv_params() though, we currently only update bss_mode +and bss_role. In order for the interface mode switch to actually work, +we also need to update bss_type to its proper value, so do that. + +This fixes a crash of the firmware (because the driver tries to execute +commands that are invalid in AP mode) when switching from station mode +to AP mode. + +Patchset: mwifiex +--- + drivers/net/wireless/marvell/mwifiex/cfg80211.c | 10 +++++++--- + 1 file changed, 7 insertions(+), 3 deletions(-) + +diff --git a/drivers/net/wireless/marvell/mwifiex/cfg80211.c b/drivers/net/wireless/marvell/mwifiex/cfg80211.c +index 64caa5c4350d..0eb31201a82b 100644 +--- a/drivers/net/wireless/marvell/mwifiex/cfg80211.c ++++ b/drivers/net/wireless/marvell/mwifiex/cfg80211.c +@@ -908,16 +908,20 @@ mwifiex_init_new_priv_params(struct mwifiex_private *priv, + switch (type) { + case NL80211_IFTYPE_STATION: + case NL80211_IFTYPE_ADHOC: +- priv->bss_role = MWIFIEX_BSS_ROLE_STA; ++ priv->bss_role = MWIFIEX_BSS_ROLE_STA; ++ priv->bss_type = MWIFIEX_BSS_TYPE_STA; + break; + case NL80211_IFTYPE_P2P_CLIENT: +- priv->bss_role = MWIFIEX_BSS_ROLE_STA; ++ priv->bss_role = MWIFIEX_BSS_ROLE_STA; ++ priv->bss_type = MWIFIEX_BSS_TYPE_P2P; + break; + case NL80211_IFTYPE_P2P_GO: +- priv->bss_role = MWIFIEX_BSS_ROLE_UAP; ++ priv->bss_role = MWIFIEX_BSS_ROLE_UAP; ++ priv->bss_type = MWIFIEX_BSS_TYPE_P2P; + break; + case NL80211_IFTYPE_AP: + priv->bss_role = MWIFIEX_BSS_ROLE_UAP; ++ priv->bss_type = MWIFIEX_BSS_TYPE_UAP; + break; + default: + mwifiex_dbg(adapter, ERROR, +-- +2.33.0 + +From 0ce37545b853fb51312578d2028f3663157e67e4 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= +Date: Sat, 27 Mar 2021 12:19:14 +0100 +Subject: [PATCH] mwifiex: Fix copy-paste mistake when creating virtual + interface + +The BSS priority here for a new P2P_CLIENT device was accidentally set +to an enum that's certainly not meant for this. Since +MWIFIEX_BSS_ROLE_STA is 0 anyway, we can just set the bss_priority to 0 +instead here. + +Patchset: mwifiex +--- + drivers/net/wireless/marvell/mwifiex/cfg80211.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/net/wireless/marvell/mwifiex/cfg80211.c b/drivers/net/wireless/marvell/mwifiex/cfg80211.c +index 0eb31201a82b..d62a20de3ada 100644 +--- a/drivers/net/wireless/marvell/mwifiex/cfg80211.c ++++ b/drivers/net/wireless/marvell/mwifiex/cfg80211.c +@@ -3054,7 +3054,7 @@ struct wireless_dev *mwifiex_add_virtual_intf(struct wiphy *wiphy, + priv->bss_type = MWIFIEX_BSS_TYPE_P2P; + + priv->frame_type = MWIFIEX_DATA_FRAME_TYPE_ETH_II; +- priv->bss_priority = MWIFIEX_BSS_ROLE_STA; ++ priv->bss_priority = 0; + priv->bss_role = MWIFIEX_BSS_ROLE_STA; + priv->bss_started = 0; + +-- +2.33.0 + +From 2d4a76e4e1214cacc8454804927c009a3265fb2c Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= +Date: Sun, 28 Mar 2021 21:10:06 +0200 +Subject: [PATCH] mwifiex: Try waking the firmware until we get an interrupt + +It seems that the firmware of the 88W8897 card sometimes ignores or +misses when we try to wake it up by reading the firmware status +register. This leads to the firmware wakeup timeout expiring and the +driver resetting the card because we assume the firmware has hung up or +crashed (unfortunately that's not unlikely with this card). + +Turns out that most of the time the firmware actually didn't hang up, +but simply "missed" our wakeup request and doesn't send us an AWAKE +event. + +Trying again to read the firmware status register after a short timeout +usually makes the firmware wake we up as expected, so add a small retry +loop to mwifiex_pm_wakeup_card() that looks at the interrupt status to +check whether the card woke up. + +The number of tries and timeout lengths for this were determined +experimentally: The firmware usually takes about 500 us to wake up +after we attempt to read the status register. In some cases where the +firmware is very busy (for example while doing a bluetooth scan) it +might even miss our requests for multiple milliseconds, which is why +after 15 tries the waiting time gets increased to 10 ms. The maximum +number of tries it took to wake the firmware when testing this was +around 20, so a maximum number of 50 tries should give us plenty of +safety margin. + +A good reproducer for this issue is letting the firmware sleep and wake +up in very short intervals, for example by pinging an device on the +network every 0.1 seconds. + +Patchset: mwifiex +--- + drivers/net/wireless/marvell/mwifiex/pcie.c | 29 ++++++++++++++++----- + 1 file changed, 23 insertions(+), 6 deletions(-) + +diff --git a/drivers/net/wireless/marvell/mwifiex/pcie.c b/drivers/net/wireless/marvell/mwifiex/pcie.c +index 95e5851d2d0a..ccae1532a580 100644 +--- a/drivers/net/wireless/marvell/mwifiex/pcie.c ++++ b/drivers/net/wireless/marvell/mwifiex/pcie.c +@@ -665,6 +665,7 @@ static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter) + { + struct pcie_service_card *card = adapter->card; + const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; ++ int n_tries = 0; + + mwifiex_dbg(adapter, EVENT, + "event: Wakeup device...\n"); +@@ -672,12 +673,28 @@ static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter) + if (reg->sleep_cookie) + mwifiex_pcie_dev_wakeup_delay(adapter); + +- /* Accessing fw_status register will wakeup device */ +- if (mwifiex_write_reg(adapter, reg->fw_status, FIRMWARE_READY_PCIE)) { +- mwifiex_dbg(adapter, ERROR, +- "Writing fw_status register failed\n"); +- return -1; +- } ++ /* Access the fw_status register to wake up the device. ++ * Since the 88W8897 firmware sometimes appears to ignore or miss ++ * that wakeup request, we continue trying until we receive an ++ * interrupt from the card. ++ */ ++ do { ++ if (mwifiex_write_reg(adapter, reg->fw_status, FIRMWARE_READY_PCIE)) { ++ mwifiex_dbg(adapter, ERROR, ++ "Writing fw_status register failed\n"); ++ return -1; ++ } ++ ++ n_tries++; ++ ++ if (n_tries <= 15) ++ usleep_range(400, 700); ++ else ++ msleep(10); ++ } while (n_tries <= 50 && READ_ONCE(adapter->int_status) == 0); ++ ++ mwifiex_dbg(adapter, EVENT, ++ "event: Tried %d times until firmware woke up\n", n_tries); + + if (reg->sleep_cookie) { + mwifiex_pcie_dev_wakeup_delay(adapter); +-- +2.33.0 + +From 7b64fb32920e267a64790fb1b5a5be8721ffb2fe Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= +Date: Tue, 13 Apr 2021 14:30:28 +0200 +Subject: [PATCH] mwifiex: Deactive host sleep using HSCFG after it was + activated manually + +When powersaving (so either wifi powersaving or deep sleep, depending on +which state the firmware is in) is disabled, the way the firmware goes +into host sleep is different: Usually the firmware implicitely enters +host sleep on the next SLEEP event we get when we configured host sleep +via HSCFG before. When powersaving is disabled though, there are no +SLEEP events, the way we enter host sleep in that case is different: The +firmware will send us a HS_ACT_REQ event and after that we "manually" +make the firmware enter host sleep by sending it another HSCFG command +with the action HS_ACTIVATE. + +Now waking up from host sleep appears to be different depending on +whether powersaving is enabled again: When powersaving is enabled, the +firmware implicitely leaves host sleep as soon as it wakes up and sends +us an AWAKE event. When powersaving is disabled though, it apparently +doesn't implicitely leave host sleep, but instead we need to send it a +HSCFG command with the HS_CONFIGURE action and the HS_CFG_CANCEL +condition. We didn't do that so far, which is why waking up from host +sleep was broken when powersaving is disabled. + +So add some additional state to mwifiex_adapter where we keep track of +whether host sleep was activated manually via HS_ACTIVATE, and if that +was the case, deactivate it manually again via HS_CFG_CANCEL. + +Patchset: mwifiex +--- + drivers/net/wireless/marvell/mwifiex/cmdevt.c | 21 +++++++++++++++++++ + drivers/net/wireless/marvell/mwifiex/main.c | 18 ++++++++++++++++ + drivers/net/wireless/marvell/mwifiex/main.h | 1 + + .../net/wireless/marvell/mwifiex/sta_cmd.c | 4 ++++ + 4 files changed, 44 insertions(+) + +diff --git a/drivers/net/wireless/marvell/mwifiex/cmdevt.c b/drivers/net/wireless/marvell/mwifiex/cmdevt.c +index 3a11342a6bde..5487df8f994d 100644 +--- a/drivers/net/wireless/marvell/mwifiex/cmdevt.c ++++ b/drivers/net/wireless/marvell/mwifiex/cmdevt.c +@@ -608,6 +608,11 @@ int mwifiex_send_cmd(struct mwifiex_private *priv, u16 cmd_no, + return -1; + } + ++ if (priv->adapter->hs_activated_manually && ++ cmd_no != HostCmd_CMD_802_11_HS_CFG_ENH) { ++ mwifiex_cancel_hs(priv, MWIFIEX_ASYNC_CMD); ++ priv->adapter->hs_activated_manually = false; ++ } + + /* Get a new command node */ + cmd_node = mwifiex_get_cmd_node(adapter); +@@ -714,6 +719,15 @@ mwifiex_insert_cmd_to_pending_q(struct mwifiex_adapter *adapter, + } + } + ++ /* Same with exit host sleep cmd, luckily that can't happen at the same time as EXIT_PS */ ++ if (command == HostCmd_CMD_802_11_HS_CFG_ENH) { ++ struct host_cmd_ds_802_11_hs_cfg_enh *hs_cfg = ++ &host_cmd->params.opt_hs_cfg; ++ ++ if (le16_to_cpu(hs_cfg->action) == HS_ACTIVATE) ++ add_tail = false; ++ } ++ + spin_lock_bh(&adapter->cmd_pending_q_lock); + if (add_tail) + list_add_tail(&cmd_node->list, &adapter->cmd_pending_q); +@@ -1216,6 +1230,13 @@ mwifiex_process_hs_config(struct mwifiex_adapter *adapter) + __func__); + + adapter->if_ops.wakeup(adapter); ++ ++ if (adapter->hs_activated_manually) { ++ mwifiex_cancel_hs(mwifiex_get_priv (adapter, MWIFIEX_BSS_ROLE_ANY), ++ MWIFIEX_ASYNC_CMD); ++ adapter->hs_activated_manually = false; ++ } ++ + adapter->hs_activated = false; + clear_bit(MWIFIEX_IS_HS_CONFIGURED, &adapter->work_flags); + clear_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags); +diff --git a/drivers/net/wireless/marvell/mwifiex/main.c b/drivers/net/wireless/marvell/mwifiex/main.c +index 17399d4aa129..1fbf5ba1042b 100644 +--- a/drivers/net/wireless/marvell/mwifiex/main.c ++++ b/drivers/net/wireless/marvell/mwifiex/main.c +@@ -401,6 +401,12 @@ int mwifiex_main_process(struct mwifiex_adapter *adapter) + !adapter->scan_processing) && + !adapter->data_sent && + !skb_queue_empty(&adapter->tx_data_q)) { ++ if (adapter->hs_activated_manually) { ++ mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY), ++ MWIFIEX_ASYNC_CMD); ++ adapter->hs_activated_manually = false; ++ } ++ + mwifiex_process_tx_queue(adapter); + if (adapter->hs_activated) { + clear_bit(MWIFIEX_IS_HS_CONFIGURED, +@@ -418,6 +424,12 @@ int mwifiex_main_process(struct mwifiex_adapter *adapter) + !mwifiex_bypass_txlist_empty(adapter) && + !mwifiex_is_tdls_chan_switching + (mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA))) { ++ if (adapter->hs_activated_manually) { ++ mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY), ++ MWIFIEX_ASYNC_CMD); ++ adapter->hs_activated_manually = false; ++ } ++ + mwifiex_process_bypass_tx(adapter); + if (adapter->hs_activated) { + clear_bit(MWIFIEX_IS_HS_CONFIGURED, +@@ -434,6 +446,12 @@ int mwifiex_main_process(struct mwifiex_adapter *adapter) + !adapter->data_sent && !mwifiex_wmm_lists_empty(adapter) && + !mwifiex_is_tdls_chan_switching + (mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA))) { ++ if (adapter->hs_activated_manually) { ++ mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY), ++ MWIFIEX_ASYNC_CMD); ++ adapter->hs_activated_manually = false; ++ } ++ + mwifiex_wmm_process_tx(adapter); + if (adapter->hs_activated) { + clear_bit(MWIFIEX_IS_HS_CONFIGURED, +diff --git a/drivers/net/wireless/marvell/mwifiex/main.h b/drivers/net/wireless/marvell/mwifiex/main.h +index 5923c5c14c8d..90012cbcfd15 100644 +--- a/drivers/net/wireless/marvell/mwifiex/main.h ++++ b/drivers/net/wireless/marvell/mwifiex/main.h +@@ -986,6 +986,7 @@ struct mwifiex_adapter { + struct timer_list wakeup_timer; + struct mwifiex_hs_config_param hs_cfg; + u8 hs_activated; ++ u8 hs_activated_manually; + u16 hs_activate_wait_q_woken; + wait_queue_head_t hs_activate_wait_q; + u8 event_body[MAX_EVENT_SIZE]; +diff --git a/drivers/net/wireless/marvell/mwifiex/sta_cmd.c b/drivers/net/wireless/marvell/mwifiex/sta_cmd.c +index 48ea00da1fc9..1e2798dce18f 100644 +--- a/drivers/net/wireless/marvell/mwifiex/sta_cmd.c ++++ b/drivers/net/wireless/marvell/mwifiex/sta_cmd.c +@@ -396,6 +396,10 @@ mwifiex_cmd_802_11_hs_cfg(struct mwifiex_private *priv, + if (hs_activate) { + hs_cfg->action = cpu_to_le16(HS_ACTIVATE); + hs_cfg->params.hs_activate.resp_ctrl = cpu_to_le16(RESP_NEEDED); ++ ++ adapter->hs_activated_manually = true; ++ mwifiex_dbg(priv->adapter, CMD, ++ "cmd: Activating host sleep manually\n"); + } else { + hs_cfg->action = cpu_to_le16(HS_CONFIGURE); + hs_cfg->params.hs_config.conditions = hscfg_param->conditions; +-- +2.33.0 + +From c0f329b98b10c7ade44b01df816a9490ec26f7a8 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= +Date: Tue, 13 Apr 2021 14:23:05 +0200 +Subject: [PATCH] mwifiex: Add quirk to disable deep sleep with certain + hardware revision + +The 88W8897 pcie card with the hardware revision 20 apparently has a +hardware issue where the card wakes up from deep sleep randomly and very +often, somewhat depending on the card activity, maybe the hardware has a +floating wakeup pin or something. + +Those continuous wakeups prevent the card from entering host sleep when +the computer suspends. And because the host won't answer to events from +the card anymore while it's suspended, the firmwares internal +powersaving state machine seems to get confused and the card can't sleep +anymore at all after that. + +Since we can't work around that hardware bug in the firmware, let's +get the hardware revision string from the firmware and match it with +known bad revisions. Then disable auto deep sleep for those revisions, +which makes sure we no longer get those spurious wakeups. + +Patchset: mwifiex +--- + drivers/net/wireless/marvell/mwifiex/main.c | 14 ++++++++++++++ + drivers/net/wireless/marvell/mwifiex/main.h | 1 + + .../net/wireless/marvell/mwifiex/sta_cmdresp.c | 16 ++++++++++++++++ + 3 files changed, 31 insertions(+) + +diff --git a/drivers/net/wireless/marvell/mwifiex/main.c b/drivers/net/wireless/marvell/mwifiex/main.c +index 1fbf5ba1042b..be40813ffa5c 100644 +--- a/drivers/net/wireless/marvell/mwifiex/main.c ++++ b/drivers/net/wireless/marvell/mwifiex/main.c +@@ -226,6 +226,19 @@ static int mwifiex_process_rx(struct mwifiex_adapter *adapter) + return 0; + } + ++static void maybe_quirk_fw_disable_ds(struct mwifiex_adapter *adapter) ++{ ++ struct mwifiex_private *priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA); ++ struct mwifiex_ver_ext ver_ext; ++ ++ set_bit(MWIFIEX_IS_REQUESTING_FW_VEREXT, &adapter->work_flags); ++ ++ memset(&ver_ext, 0, sizeof(ver_ext)); ++ ver_ext.version_str_sel = 1; ++ mwifiex_send_cmd(priv, HostCmd_CMD_VERSION_EXT, ++ HostCmd_ACT_GEN_GET, 0, &ver_ext, false); ++} ++ + /* + * The main process. + * +@@ -356,6 +369,7 @@ int mwifiex_main_process(struct mwifiex_adapter *adapter) + if (adapter->hw_status == MWIFIEX_HW_STATUS_INIT_DONE) { + adapter->hw_status = MWIFIEX_HW_STATUS_READY; + mwifiex_init_fw_complete(adapter); ++ maybe_quirk_fw_disable_ds(adapter); + } + } + +diff --git a/drivers/net/wireless/marvell/mwifiex/main.h b/drivers/net/wireless/marvell/mwifiex/main.h +index 90012cbcfd15..1e829d84b1f6 100644 +--- a/drivers/net/wireless/marvell/mwifiex/main.h ++++ b/drivers/net/wireless/marvell/mwifiex/main.h +@@ -524,6 +524,7 @@ enum mwifiex_adapter_work_flags { + MWIFIEX_IS_SUSPENDED, + MWIFIEX_IS_HS_CONFIGURED, + MWIFIEX_IS_HS_ENABLING, ++ MWIFIEX_IS_REQUESTING_FW_VEREXT, + }; + + struct mwifiex_band_config { +diff --git a/drivers/net/wireless/marvell/mwifiex/sta_cmdresp.c b/drivers/net/wireless/marvell/mwifiex/sta_cmdresp.c +index 6b5d35d9e69f..8e49ebca1847 100644 +--- a/drivers/net/wireless/marvell/mwifiex/sta_cmdresp.c ++++ b/drivers/net/wireless/marvell/mwifiex/sta_cmdresp.c +@@ -708,6 +708,22 @@ static int mwifiex_ret_ver_ext(struct mwifiex_private *priv, + { + struct host_cmd_ds_version_ext *ver_ext = &resp->params.verext; + ++ if (test_and_clear_bit(MWIFIEX_IS_REQUESTING_FW_VEREXT, &priv->adapter->work_flags)) { ++ if (strncmp(ver_ext->version_str, "ChipRev:20, BB:9b(10.00), RF:40(21)", 128) == 0) { ++ struct mwifiex_ds_auto_ds auto_ds = { ++ .auto_ds = DEEP_SLEEP_OFF, ++ }; ++ ++ mwifiex_dbg(priv->adapter, MSG, ++ "Bad HW revision detected, disabling deep sleep\n"); ++ ++ mwifiex_send_cmd(priv, HostCmd_CMD_802_11_PS_MODE_ENH, ++ DIS_AUTO_PS, BITMAP_AUTO_DS, &auto_ds, false); ++ } ++ ++ return 0; ++ } ++ + if (version_ext) { + version_ext->version_str_sel = ver_ext->version_str_sel; + memcpy(version_ext->version_str, ver_ext->version_str, +-- +2.33.0 + +From 5e23491580ec9bb5b58373580af5dadeafcbd104 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= +Date: Wed, 11 Nov 2020 15:17:07 +0100 +Subject: [PATCH] mwifiex: Don't log error on suspend if wake-on-wlan is + disabled + +It's not an error if someone chooses to put their computer to sleep, not +wanting it to wake up because the person next door has just discovered +what a magic packet is. So change the loglevel of this annoying message +from ERROR to INFO. + +Patchset: mwifiex +--- + drivers/net/wireless/marvell/mwifiex/cfg80211.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/net/wireless/marvell/mwifiex/cfg80211.c b/drivers/net/wireless/marvell/mwifiex/cfg80211.c +index d62a20de3ada..18b1a6d54bc8 100644 +--- a/drivers/net/wireless/marvell/mwifiex/cfg80211.c ++++ b/drivers/net/wireless/marvell/mwifiex/cfg80211.c +@@ -3494,7 +3494,7 @@ static int mwifiex_cfg80211_suspend(struct wiphy *wiphy, + } + + if (!wowlan) { +- mwifiex_dbg(adapter, ERROR, ++ mwifiex_dbg(adapter, INFO, + "None of the WOWLAN triggers enabled\n"); + ret = 0; + goto done; +-- +2.33.0 + +From 4734b6c4caba0a1ea297e69cd7f8d52ab71d1b8f Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= +Date: Sun, 28 Mar 2021 21:42:54 +0200 +Subject: [PATCH] mwifiex: Log an error on command failure during key-material + upload + +Sometimes the KEY_MATERIAL command can fail with the 88W8897 firmware +(when this happens exactly seems pretty random). This appears to prevent +the access point from starting, so it seems like a good idea to log an +error in that case. + +Patchset: mwifiex +--- + drivers/net/wireless/marvell/mwifiex/cfg80211.c | 10 ++++++++-- + 1 file changed, 8 insertions(+), 2 deletions(-) + +diff --git a/drivers/net/wireless/marvell/mwifiex/cfg80211.c b/drivers/net/wireless/marvell/mwifiex/cfg80211.c +index 18b1a6d54bc8..c00791701d78 100644 +--- a/drivers/net/wireless/marvell/mwifiex/cfg80211.c ++++ b/drivers/net/wireless/marvell/mwifiex/cfg80211.c +@@ -519,8 +519,14 @@ mwifiex_cfg80211_set_default_mgmt_key(struct wiphy *wiphy, + encrypt_key.is_igtk_def_key = true; + eth_broadcast_addr(encrypt_key.mac_addr); + +- return mwifiex_send_cmd(priv, HostCmd_CMD_802_11_KEY_MATERIAL, +- HostCmd_ACT_GEN_SET, true, &encrypt_key, true); ++ if (mwifiex_send_cmd(priv, HostCmd_CMD_802_11_KEY_MATERIAL, ++ HostCmd_ACT_GEN_SET, true, &encrypt_key, true)) { ++ mwifiex_dbg(priv->adapter, ERROR, ++ "Sending KEY_MATERIAL command failed\n"); ++ return -1; ++ } ++ ++ return 0; + } + + /* +-- +2.33.0 + +From b207e0b947437011754cb39dbe4757c8ec32b19a Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= +Date: Tue, 13 Apr 2021 12:44:03 +0200 +Subject: [PATCH] mwifiex: Fix an incorrect comment + +We're sending DELBA requests here, not ADDBA requests. + +Patchset: mwifiex +--- + drivers/net/wireless/marvell/mwifiex/11n.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/net/wireless/marvell/mwifiex/11n.c b/drivers/net/wireless/marvell/mwifiex/11n.c +index 6696bce56178..b0695432b26a 100644 +--- a/drivers/net/wireless/marvell/mwifiex/11n.c ++++ b/drivers/net/wireless/marvell/mwifiex/11n.c +@@ -125,7 +125,7 @@ int mwifiex_ret_11n_delba(struct mwifiex_private *priv, + tx_ba_tbl->ra); + } else { /* + * In case of failure, recreate the deleted stream in case +- * we initiated the ADDBA ++ * we initiated the DELBA + */ + if (!INITIATOR_BIT(del_ba_param_set)) + return 0; +-- +2.33.0 + +From e335e21244258f2294a04f81089fccefef1b6f10 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= +Date: Tue, 13 Apr 2021 12:45:59 +0200 +Subject: [PATCH] mwifiex: Send DELBA requests according to spec + +We're currently failing to set the initiator bit for DELBA requests: +While we set the bit on our del_ba_param_set bitmask, we forget to +actually copy that bitmask over to the command struct, which means we +never actually set the initiator bit. + +Fix that and copy the bitmask over to the host_cmd_ds_11n_delba command +struct. + +Patchset: mwifiex +--- + drivers/net/wireless/marvell/mwifiex/11n.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +diff --git a/drivers/net/wireless/marvell/mwifiex/11n.c b/drivers/net/wireless/marvell/mwifiex/11n.c +index b0695432b26a..9ff2058bcd7e 100644 +--- a/drivers/net/wireless/marvell/mwifiex/11n.c ++++ b/drivers/net/wireless/marvell/mwifiex/11n.c +@@ -657,14 +657,15 @@ int mwifiex_send_delba(struct mwifiex_private *priv, int tid, u8 *peer_mac, + uint16_t del_ba_param_set; + + memset(&delba, 0, sizeof(delba)); +- delba.del_ba_param_set = cpu_to_le16(tid << DELBA_TID_POS); + +- del_ba_param_set = le16_to_cpu(delba.del_ba_param_set); ++ del_ba_param_set = tid << DELBA_TID_POS; ++ + if (initiator) + del_ba_param_set |= IEEE80211_DELBA_PARAM_INITIATOR_MASK; + else + del_ba_param_set &= ~IEEE80211_DELBA_PARAM_INITIATOR_MASK; + ++ delba.del_ba_param_set = cpu_to_le16(del_ba_param_set); + memcpy(&delba.peer_mac_addr, peer_mac, ETH_ALEN); + + /* We don't wait for the response of this command */ +-- +2.33.0 + +From f3db61c1a29493d5805a5be807e779ec3153a4c1 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= +Date: Tue, 13 Apr 2021 12:57:41 +0200 +Subject: [PATCH] mwifiex: Ignore BTCOEX events from the firmware + +The firmware of the pcie 88W8897 chip sends those events very +unreliably, which means we sometimes end up actually capping the window +size while bluetooth is disabled, artifically limiting wifi speeds even +though it's not needed. + +Since we can't fix the firmware, let's just ignore those events, it +seems that the Windows driver also doesn't change the rx/tx block ack +buffer sizes when bluetooth gets enabled or disabled, so this is +consistent with the Windows driver. + +Patchset: mwifiex +--- + drivers/net/wireless/marvell/mwifiex/sta_event.c | 4 +--- + 1 file changed, 1 insertion(+), 3 deletions(-) + +diff --git a/drivers/net/wireless/marvell/mwifiex/sta_event.c b/drivers/net/wireless/marvell/mwifiex/sta_event.c +index 68c63268e2e6..933111a3511c 100644 +--- a/drivers/net/wireless/marvell/mwifiex/sta_event.c ++++ b/drivers/net/wireless/marvell/mwifiex/sta_event.c +@@ -1057,9 +1057,7 @@ int mwifiex_process_sta_event(struct mwifiex_private *priv) + adapter->event_skb); + break; + case EVENT_BT_COEX_WLAN_PARA_CHANGE: +- dev_dbg(adapter->dev, "EVENT: BT coex wlan param update\n"); +- mwifiex_bt_coex_wlan_param_update_event(priv, +- adapter->event_skb); ++ dev_dbg(adapter->dev, "EVENT: ignoring BT coex wlan param update\n"); + break; + case EVENT_RXBA_SYNC: + dev_dbg(adapter->dev, "EVENT: RXBA_SYNC\n"); +-- +2.33.0 + diff --git a/patches/5.14/0003-ath10k.patch b/patches/5.14/0003-ath10k.patch new file mode 100644 index 000000000..5aa0089fc --- /dev/null +++ b/patches/5.14/0003-ath10k.patch @@ -0,0 +1,121 @@ +From bdf0dd48728975c0697bb6e9b5242457abc7874f Mon Sep 17 00:00:00 2001 +From: Maximilian Luz +Date: Sat, 27 Feb 2021 00:45:52 +0100 +Subject: [PATCH] ath10k: Add module parameters to override board files + +Some Surface devices, specifically the Surface Go and AMD version of the +Surface Laptop 3 (wich both come with QCA6174 WiFi chips), work better +with a different board file, as it seems that the firmeware included +upstream is buggy. + +As it is generally not a good idea to randomly overwrite files, let +alone doing so via packages, we add module parameters to override those +file names in the driver. This allows us to package/deploy the override +via a modprobe.d config. + +Signed-off-by: Maximilian Luz +Patchset: ath10k +--- + drivers/net/wireless/ath/ath10k/core.c | 58 ++++++++++++++++++++++++++ + 1 file changed, 58 insertions(+) + +diff --git a/drivers/net/wireless/ath/ath10k/core.c b/drivers/net/wireless/ath/ath10k/core.c +index 2f9be182fbfb..84ae17af3f98 100644 +--- a/drivers/net/wireless/ath/ath10k/core.c ++++ b/drivers/net/wireless/ath/ath10k/core.c +@@ -35,6 +35,9 @@ static bool skip_otp; + static bool rawmode; + static bool fw_diag_log; + ++static char *override_board = ""; ++static char *override_board2 = ""; ++ + unsigned long ath10k_coredump_mask = BIT(ATH10K_FW_CRASH_DUMP_REGISTERS) | + BIT(ATH10K_FW_CRASH_DUMP_CE_DATA); + +@@ -47,6 +50,9 @@ module_param(rawmode, bool, 0644); + module_param(fw_diag_log, bool, 0644); + module_param_named(coredump_mask, ath10k_coredump_mask, ulong, 0444); + ++module_param(override_board, charp, 0644); ++module_param(override_board2, charp, 0644); ++ + MODULE_PARM_DESC(debug_mask, "Debugging mask"); + MODULE_PARM_DESC(uart_print, "Uart target debugging"); + MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode"); +@@ -55,6 +61,9 @@ MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath"); + MODULE_PARM_DESC(coredump_mask, "Bitfield of what to include in firmware crash file"); + MODULE_PARM_DESC(fw_diag_log, "Diag based fw log debugging"); + ++MODULE_PARM_DESC(override_board, "Override for board.bin file"); ++MODULE_PARM_DESC(override_board2, "Override for board-2.bin file"); ++ + static const struct ath10k_hw_params ath10k_hw_params_list[] = { + { + .id = QCA988X_HW_2_0_VERSION, +@@ -826,6 +835,42 @@ static int ath10k_init_configure_target(struct ath10k *ar) + return 0; + } + ++static const char *ath10k_override_board_fw_file(struct ath10k *ar, ++ const char *file) ++{ ++ if (strcmp(file, "board.bin") == 0) { ++ if (strcmp(override_board, "") == 0) ++ return file; ++ ++ if (strcmp(override_board, "none") == 0) { ++ dev_info(ar->dev, "firmware override: pretending 'board.bin' does not exist\n"); ++ return NULL; ++ } ++ ++ dev_info(ar->dev, "firmware override: replacing 'board.bin' with '%s'\n", ++ override_board); ++ ++ return override_board; ++ } ++ ++ if (strcmp(file, "board-2.bin") == 0) { ++ if (strcmp(override_board2, "") == 0) ++ return file; ++ ++ if (strcmp(override_board2, "none") == 0) { ++ dev_info(ar->dev, "firmware override: pretending 'board-2.bin' does not exist\n"); ++ return NULL; ++ } ++ ++ dev_info(ar->dev, "firmware override: replacing 'board-2.bin' with '%s'\n", ++ override_board2); ++ ++ return override_board2; ++ } ++ ++ return file; ++} ++ + static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, + const char *dir, + const char *file) +@@ -840,6 +885,19 @@ static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, + if (dir == NULL) + dir = "."; + ++ /* HACK: Override board.bin and board-2.bin files if specified. ++ * ++ * Some Surface devices perform better with a different board ++ * configuration. To this end, one would need to replace the board.bin ++ * file with the modified config and remove the board-2.bin file. ++ * Unfortunately, that's not a solution that we can easily package. So ++ * we add module options to perform these overrides here. ++ */ ++ ++ file = ath10k_override_board_fw_file(ar, file); ++ if (!file) ++ return ERR_PTR(-ENOENT); ++ + snprintf(filename, sizeof(filename), "%s/%s", dir, file); + ret = firmware_request_nowarn(&fw, filename, ar->dev); + ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n", +-- +2.33.0 + diff --git a/patches/5.14/0004-ipts.patch b/patches/5.14/0004-ipts.patch new file mode 100644 index 000000000..370fe0817 --- /dev/null +++ b/patches/5.14/0004-ipts.patch @@ -0,0 +1,1503 @@ +From 020e40ca9aac0c3923ff37a4bea8a5506d296f4d Mon Sep 17 00:00:00 2001 +From: Dorian Stoll +Date: Thu, 30 Jul 2020 13:21:53 +0200 +Subject: [PATCH] misc: mei: Add missing IPTS device IDs + +Patchset: ipts +--- + drivers/misc/mei/hw-me-regs.h | 1 + + drivers/misc/mei/pci-me.c | 1 + + 2 files changed, 2 insertions(+) + +diff --git a/drivers/misc/mei/hw-me-regs.h b/drivers/misc/mei/hw-me-regs.h +index cb34925e10f1..2b3f8073a3ec 100644 +--- a/drivers/misc/mei/hw-me-regs.h ++++ b/drivers/misc/mei/hw-me-regs.h +@@ -92,6 +92,7 @@ + #define MEI_DEV_ID_CDF 0x18D3 /* Cedar Fork */ + + #define MEI_DEV_ID_ICP_LP 0x34E0 /* Ice Lake Point LP */ ++#define MEI_DEV_ID_ICP_LP_3 0x34E4 /* Ice Lake Point LP 3 (iTouch) */ + + #define MEI_DEV_ID_JSP_N 0x4DE0 /* Jasper Lake Point N */ + +diff --git a/drivers/misc/mei/pci-me.c b/drivers/misc/mei/pci-me.c +index c3393b383e59..0098f98426c1 100644 +--- a/drivers/misc/mei/pci-me.c ++++ b/drivers/misc/mei/pci-me.c +@@ -96,6 +96,7 @@ static const struct pci_device_id mei_me_pci_tbl[] = { + {MEI_PCI_DEVICE(MEI_DEV_ID_CMP_H_3, MEI_ME_PCH8_ITOUCH_CFG)}, + + {MEI_PCI_DEVICE(MEI_DEV_ID_ICP_LP, MEI_ME_PCH12_CFG)}, ++ {MEI_PCI_DEVICE(MEI_DEV_ID_ICP_LP_3, MEI_ME_PCH12_CFG)}, + + {MEI_PCI_DEVICE(MEI_DEV_ID_TGP_LP, MEI_ME_PCH15_CFG)}, + {MEI_PCI_DEVICE(MEI_DEV_ID_TGP_H, MEI_ME_PCH15_SPS_CFG)}, +-- +2.33.0 + +From 78d300eefba7b4c9c67b5e94ec075b5abdd0d184 Mon Sep 17 00:00:00 2001 +From: Dorian Stoll +Date: Thu, 6 Aug 2020 11:20:41 +0200 +Subject: [PATCH] misc: Add support for Intel Precise Touch & Stylus + +Based on linux-surface/intel-precise-touch@3f362c + +Signed-off-by: Dorian Stoll +Patchset: ipts +--- + drivers/misc/Kconfig | 1 + + drivers/misc/Makefile | 1 + + drivers/misc/ipts/Kconfig | 17 ++ + drivers/misc/ipts/Makefile | 12 ++ + drivers/misc/ipts/context.h | 47 +++++ + drivers/misc/ipts/control.c | 113 +++++++++++ + drivers/misc/ipts/control.h | 24 +++ + drivers/misc/ipts/mei.c | 125 ++++++++++++ + drivers/misc/ipts/protocol.h | 347 ++++++++++++++++++++++++++++++++++ + drivers/misc/ipts/receiver.c | 224 ++++++++++++++++++++++ + drivers/misc/ipts/receiver.h | 16 ++ + drivers/misc/ipts/resources.c | 128 +++++++++++++ + drivers/misc/ipts/resources.h | 17 ++ + drivers/misc/ipts/uapi.c | 208 ++++++++++++++++++++ + drivers/misc/ipts/uapi.h | 47 +++++ + 15 files changed, 1327 insertions(+) + create mode 100644 drivers/misc/ipts/Kconfig + create mode 100644 drivers/misc/ipts/Makefile + create mode 100644 drivers/misc/ipts/context.h + create mode 100644 drivers/misc/ipts/control.c + create mode 100644 drivers/misc/ipts/control.h + create mode 100644 drivers/misc/ipts/mei.c + create mode 100644 drivers/misc/ipts/protocol.h + create mode 100644 drivers/misc/ipts/receiver.c + create mode 100644 drivers/misc/ipts/receiver.h + create mode 100644 drivers/misc/ipts/resources.c + create mode 100644 drivers/misc/ipts/resources.h + create mode 100644 drivers/misc/ipts/uapi.c + create mode 100644 drivers/misc/ipts/uapi.h + +diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig +index f4fb5c52b863..0e5a2fe6bffe 100644 +--- a/drivers/misc/Kconfig ++++ b/drivers/misc/Kconfig +@@ -464,4 +464,5 @@ source "drivers/misc/cardreader/Kconfig" + source "drivers/misc/habanalabs/Kconfig" + source "drivers/misc/uacce/Kconfig" + source "drivers/misc/pvpanic/Kconfig" ++source "drivers/misc/ipts/Kconfig" + endmenu +diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile +index e92a56d4442f..7adce5540183 100644 +--- a/drivers/misc/Makefile ++++ b/drivers/misc/Makefile +@@ -57,3 +57,4 @@ obj-$(CONFIG_HABANA_AI) += habanalabs/ + obj-$(CONFIG_UACCE) += uacce/ + obj-$(CONFIG_XILINX_SDFEC) += xilinx_sdfec.o + obj-$(CONFIG_HISI_HIKEY_USB) += hisi_hikey_usb.o ++obj-$(CONFIG_MISC_IPTS) += ipts/ +diff --git a/drivers/misc/ipts/Kconfig b/drivers/misc/ipts/Kconfig +new file mode 100644 +index 000000000000..83e2a930c396 +--- /dev/null ++++ b/drivers/misc/ipts/Kconfig +@@ -0,0 +1,17 @@ ++# SPDX-License-Identifier: GPL-2.0-or-later ++ ++config MISC_IPTS ++ tristate "Intel Precise Touch & Stylus" ++ depends on INTEL_MEI ++ help ++ Say Y here if your system has a touchscreen using Intels ++ Precise Touch & Stylus (IPTS) technology. ++ ++ If unsure say N. ++ ++ To compile this driver as a module, choose M here: the ++ module will be called ipts. ++ ++ Building this driver alone will not give you a working touchscreen. ++ It only exposed a userspace API that can be used by a daemon to ++ receive and process data from the touchscreen hardware. +diff --git a/drivers/misc/ipts/Makefile b/drivers/misc/ipts/Makefile +new file mode 100644 +index 000000000000..8f58b9adbc94 +--- /dev/null ++++ b/drivers/misc/ipts/Makefile +@@ -0,0 +1,12 @@ ++# SPDX-License-Identifier: GPL-2.0-or-later ++# ++# Makefile for the IPTS touchscreen driver ++# ++ ++obj-$(CONFIG_MISC_IPTS) += ipts.o ++ipts-objs := control.o ++ipts-objs += mei.o ++ipts-objs += receiver.o ++ipts-objs += resources.o ++ipts-objs += uapi.o ++ +diff --git a/drivers/misc/ipts/context.h b/drivers/misc/ipts/context.h +new file mode 100644 +index 000000000000..f4b06a2d3f72 +--- /dev/null ++++ b/drivers/misc/ipts/context.h +@@ -0,0 +1,47 @@ ++/* SPDX-License-Identifier: GPL-2.0-or-later */ ++/* ++ * Copyright (c) 2016 Intel Corporation ++ * Copyright (c) 2020 Dorian Stoll ++ * ++ * Linux driver for Intel Precise Touch & Stylus ++ */ ++ ++#ifndef _IPTS_CONTEXT_H_ ++#define _IPTS_CONTEXT_H_ ++ ++#include ++#include ++#include ++#include ++ ++#include "protocol.h" ++ ++enum ipts_host_status { ++ IPTS_HOST_STATUS_STARTING, ++ IPTS_HOST_STATUS_STARTED, ++ IPTS_HOST_STATUS_STOPPING, ++ IPTS_HOST_STATUS_STOPPED, ++}; ++ ++struct ipts_buffer_info { ++ u8 *address; ++ dma_addr_t dma_address; ++}; ++ ++struct ipts_context { ++ struct mei_cl_device *cldev; ++ struct device *dev; ++ ++ bool restart; ++ enum ipts_host_status status; ++ struct ipts_get_device_info_rsp device_info; ++ ++ struct ipts_buffer_info data[IPTS_BUFFERS]; ++ struct ipts_buffer_info doorbell; ++ ++ struct ipts_buffer_info feedback[IPTS_BUFFERS]; ++ struct ipts_buffer_info workqueue; ++ struct ipts_buffer_info host2me; ++}; ++ ++#endif /* _IPTS_CONTEXT_H_ */ +diff --git a/drivers/misc/ipts/control.c b/drivers/misc/ipts/control.c +new file mode 100644 +index 000000000000..a1d1f97a13d7 +--- /dev/null ++++ b/drivers/misc/ipts/control.c +@@ -0,0 +1,113 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later ++/* ++ * Copyright (c) 2016 Intel Corporation ++ * Copyright (c) 2020 Dorian Stoll ++ * ++ * Linux driver for Intel Precise Touch & Stylus ++ */ ++ ++#include ++ ++#include "context.h" ++#include "protocol.h" ++#include "resources.h" ++#include "uapi.h" ++ ++int ipts_control_send(struct ipts_context *ipts, u32 code, void *payload, ++ size_t size) ++{ ++ int ret; ++ struct ipts_command cmd; ++ ++ memset(&cmd, 0, sizeof(struct ipts_command)); ++ cmd.code = code; ++ ++ if (payload && size > 0) ++ memcpy(&cmd.payload, payload, size); ++ ++ ret = mei_cldev_send(ipts->cldev, (u8 *)&cmd, sizeof(cmd.code) + size); ++ if (ret >= 0) ++ return 0; ++ ++ /* ++ * During shutdown the device might get pulled away from below our feet. ++ * Dont log an error in this case, because it will confuse people. ++ */ ++ if (ret != -ENODEV || ipts->status != IPTS_HOST_STATUS_STOPPING) ++ dev_err(ipts->dev, "Error while sending: 0x%X:%d\n", code, ret); ++ ++ return ret; ++} ++ ++int ipts_control_send_feedback(struct ipts_context *ipts, u32 buffer) ++{ ++ struct ipts_feedback_cmd cmd; ++ ++ memset(&cmd, 0, sizeof(struct ipts_feedback_cmd)); ++ cmd.buffer = buffer; ++ ++ return ipts_control_send(ipts, IPTS_CMD_FEEDBACK, &cmd, ++ sizeof(struct ipts_feedback_cmd)); ++} ++ ++int ipts_control_set_feature(struct ipts_context *ipts, u8 report, u8 value) ++{ ++ struct ipts_feedback_buffer *feedback; ++ ++ memset(ipts->host2me.address, 0, ipts->device_info.feedback_size); ++ feedback = (struct ipts_feedback_buffer *)ipts->host2me.address; ++ ++ feedback->cmd_type = IPTS_FEEDBACK_CMD_TYPE_NONE; ++ feedback->data_type = IPTS_FEEDBACK_DATA_TYPE_SET_FEATURES; ++ feedback->buffer = IPTS_HOST2ME_BUFFER; ++ feedback->size = 2; ++ feedback->payload[0] = report; ++ feedback->payload[1] = value; ++ ++ return ipts_control_send_feedback(ipts, IPTS_HOST2ME_BUFFER); ++} ++ ++int ipts_control_start(struct ipts_context *ipts) ++{ ++ if (ipts->status != IPTS_HOST_STATUS_STOPPED) ++ return -EBUSY; ++ ++ dev_info(ipts->dev, "Starting IPTS\n"); ++ ipts->status = IPTS_HOST_STATUS_STARTING; ++ ipts->restart = false; ++ ++ ipts_uapi_link(ipts); ++ return ipts_control_send(ipts, IPTS_CMD_GET_DEVICE_INFO, NULL, 0); ++} ++ ++int ipts_control_stop(struct ipts_context *ipts) ++{ ++ int ret; ++ ++ if (ipts->status == IPTS_HOST_STATUS_STOPPING) ++ return -EBUSY; ++ ++ if (ipts->status == IPTS_HOST_STATUS_STOPPED) ++ return -EBUSY; ++ ++ dev_info(ipts->dev, "Stopping IPTS\n"); ++ ipts->status = IPTS_HOST_STATUS_STOPPING; ++ ++ ipts_uapi_unlink(); ++ ipts_resources_free(ipts); ++ ++ ret = ipts_control_send_feedback(ipts, 0); ++ if (ret == -ENODEV) ++ ipts->status = IPTS_HOST_STATUS_STOPPED; ++ ++ return ret; ++} ++ ++int ipts_control_restart(struct ipts_context *ipts) ++{ ++ if (ipts->restart) ++ return -EBUSY; ++ ++ ipts->restart = true; ++ return ipts_control_stop(ipts); ++} +diff --git a/drivers/misc/ipts/control.h b/drivers/misc/ipts/control.h +new file mode 100644 +index 000000000000..2c44e9e0e99f +--- /dev/null ++++ b/drivers/misc/ipts/control.h +@@ -0,0 +1,24 @@ ++/* SPDX-License-Identifier: GPL-2.0-or-later */ ++/* ++ * Copyright (c) 2016 Intel Corporation ++ * Copyright (c) 2020 Dorian Stoll ++ * ++ * Linux driver for Intel Precise Touch & Stylus ++ */ ++ ++#ifndef _IPTS_CONTROL_H_ ++#define _IPTS_CONTROL_H_ ++ ++#include ++ ++#include "context.h" ++ ++int ipts_control_send(struct ipts_context *ipts, u32 cmd, void *payload, ++ size_t size); ++int ipts_control_send_feedback(struct ipts_context *ipts, u32 buffer); ++int ipts_control_set_feature(struct ipts_context *ipts, u8 report, u8 value); ++int ipts_control_start(struct ipts_context *ipts); ++int ipts_control_restart(struct ipts_context *ipts); ++int ipts_control_stop(struct ipts_context *ipts); ++ ++#endif /* _IPTS_CONTROL_H_ */ +diff --git a/drivers/misc/ipts/mei.c b/drivers/misc/ipts/mei.c +new file mode 100644 +index 000000000000..59ecf13e00d2 +--- /dev/null ++++ b/drivers/misc/ipts/mei.c +@@ -0,0 +1,125 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later ++/* ++ * Copyright (c) 2016 Intel Corporation ++ * Copyright (c) 2020 Dorian Stoll ++ * ++ * Linux driver for Intel Precise Touch & Stylus ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "context.h" ++#include "control.h" ++#include "protocol.h" ++#include "receiver.h" ++#include "uapi.h" ++ ++static int ipts_mei_set_dma_mask(struct mei_cl_device *cldev) ++{ ++ int ret; ++ ++ ret = dma_coerce_mask_and_coherent(&cldev->dev, DMA_BIT_MASK(64)); ++ if (!ret) ++ return 0; ++ ++ return dma_coerce_mask_and_coherent(&cldev->dev, DMA_BIT_MASK(32)); ++} ++ ++static int ipts_mei_probe(struct mei_cl_device *cldev, ++ const struct mei_cl_device_id *id) ++{ ++ int ret; ++ struct ipts_context *ipts; ++ ++ if (ipts_mei_set_dma_mask(cldev)) { ++ dev_err(&cldev->dev, "Failed to set DMA mask for IPTS\n"); ++ return -EFAULT; ++ } ++ ++ ret = mei_cldev_enable(cldev); ++ if (ret) { ++ dev_err(&cldev->dev, "Failed to enable MEI device: %d\n", ret); ++ return ret; ++ } ++ ++ ipts = kzalloc(sizeof(*ipts), GFP_KERNEL); ++ if (!ipts) { ++ mei_cldev_disable(cldev); ++ return -ENOMEM; ++ } ++ ++ ipts->cldev = cldev; ++ ipts->dev = &cldev->dev; ++ ipts->status = IPTS_HOST_STATUS_STOPPED; ++ ++ mei_cldev_set_drvdata(cldev, ipts); ++ mei_cldev_register_rx_cb(cldev, ipts_receiver_callback); ++ ++ return ipts_control_start(ipts); ++} ++ ++static void ipts_mei_remove(struct mei_cl_device *cldev) ++{ ++ int i; ++ struct ipts_context *ipts = mei_cldev_get_drvdata(cldev); ++ ++ ipts_control_stop(ipts); ++ ++ for (i = 0; i < 20; i++) { ++ if (ipts->status == IPTS_HOST_STATUS_STOPPED) ++ break; ++ ++ msleep(25); ++ } ++ ++ mei_cldev_disable(cldev); ++ kfree(ipts); ++} ++ ++static struct mei_cl_device_id ipts_mei_device_id_table[] = { ++ { "", IPTS_MEI_UUID, MEI_CL_VERSION_ANY }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(mei, ipts_mei_device_id_table); ++ ++static struct mei_cl_driver ipts_mei_driver = { ++ .id_table = ipts_mei_device_id_table, ++ .name = "ipts", ++ .probe = ipts_mei_probe, ++ .remove = ipts_mei_remove, ++}; ++ ++static int __init ipts_mei_init(void) ++{ ++ int ret; ++ ++ ret = ipts_uapi_init(); ++ if (ret) ++ return ret; ++ ++ ret = mei_cldev_driver_register(&ipts_mei_driver); ++ if (ret) { ++ ipts_uapi_free(); ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static void __exit ipts_mei_exit(void) ++{ ++ mei_cldev_driver_unregister(&ipts_mei_driver); ++ ipts_uapi_free(); ++} ++ ++MODULE_DESCRIPTION("IPTS touchscreen driver"); ++MODULE_AUTHOR("Dorian Stoll "); ++MODULE_LICENSE("GPL"); ++ ++module_init(ipts_mei_init); ++module_exit(ipts_mei_exit); +diff --git a/drivers/misc/ipts/protocol.h b/drivers/misc/ipts/protocol.h +new file mode 100644 +index 000000000000..c3458904a94d +--- /dev/null ++++ b/drivers/misc/ipts/protocol.h +@@ -0,0 +1,347 @@ ++/* SPDX-License-Identifier: GPL-2.0-or-later */ ++/* ++ * Copyright (c) 2016 Intel Corporation ++ * Copyright (c) 2020 Dorian Stoll ++ * ++ * Linux driver for Intel Precise Touch & Stylus ++ */ ++ ++#ifndef _IPTS_PROTOCOL_H_ ++#define _IPTS_PROTOCOL_H_ ++ ++#include ++ ++/* ++ * The MEI client ID for IPTS functionality. ++ */ ++#define IPTS_MEI_UUID \ ++ UUID_LE(0x3e8d0870, 0x271a, 0x4208, 0x8e, 0xb5, 0x9a, 0xcb, 0x94, \ ++ 0x02, 0xae, 0x04) ++ ++/* ++ * Queries the device for vendor specific information. ++ * ++ * The command must not contain any payload. ++ * The response will contain struct ipts_get_device_info_rsp as payload. ++ */ ++#define IPTS_CMD_GET_DEVICE_INFO 0x00000001 ++#define IPTS_RSP_GET_DEVICE_INFO 0x80000001 ++ ++/* ++ * Sets the mode that IPTS will operate in. ++ * ++ * The command must contain struct ipts_set_mode_cmd as payload. ++ * The response will not contain any payload. ++ */ ++#define IPTS_CMD_SET_MODE 0x00000002 ++#define IPTS_RSP_SET_MODE 0x80000002 ++ ++/* ++ * Configures the memory buffers that the ME will use ++ * for passing data to the host. ++ * ++ * The command must contain struct ipts_set_mem_window_cmd as payload. ++ * The response will not contain any payload. ++ */ ++#define IPTS_CMD_SET_MEM_WINDOW 0x00000003 ++#define IPTS_RSP_SET_MEM_WINDOW 0x80000003 ++ ++/* ++ * Signals that the host is ready to receive data to the ME. ++ * ++ * The command must not contain any payload. ++ * The response will not contain any payload. ++ */ ++#define IPTS_CMD_READY_FOR_DATA 0x00000005 ++#define IPTS_RSP_READY_FOR_DATA 0x80000005 ++ ++/* ++ * Signals that a buffer can be refilled to the ME. ++ * ++ * The command must contain struct ipts_feedback_cmd as payload. ++ * The response will not contain any payload. ++ */ ++#define IPTS_CMD_FEEDBACK 0x00000006 ++#define IPTS_RSP_FEEDBACK 0x80000006 ++ ++/* ++ * Resets the data flow from the ME to the hosts and ++ * clears the buffers that were set with SET_MEM_WINDOW. ++ * ++ * The command must not contain any payload. ++ * The response will not contain any payload. ++ */ ++#define IPTS_CMD_CLEAR_MEM_WINDOW 0x00000007 ++#define IPTS_RSP_CLEAR_MEM_WINDOW 0x80000007 ++ ++/* ++ * Instructs the ME to reset the touch sensor. ++ * ++ * The command must contain struct ipts_reset_sensor_cmd as payload. ++ * The response will not contain any payload. ++ */ ++#define IPTS_CMD_RESET_SENSOR 0x0000000B ++#define IPTS_RSP_RESET_SENSOR 0x8000000B ++ ++/** ++ * enum ipts_status - Possible status codes returned by IPTS commands. ++ * @IPTS_STATUS_SUCCESS: Operation completed successfully. ++ * @IPTS_STATUS_INVALID_PARAMS: Command contained a payload with invalid parameters. ++ * @IPTS_STATUS_ACCESS_DENIED: ME could not validate buffer addresses supplied by host. ++ * @IPTS_STATUS_CMD_SIZE_ERROR: Command contains an invalid payload. ++ * @IPTS_STATUS_NOT_READY: Buffer addresses have not been set. ++ * @IPTS_STATUS_REQUEST_OUTSTANDING: There is an outstanding command of the same type. ++ * The host must wait for a response before sending another ++ * command of the same type. ++ * @IPTS_STATUS_NO_SENSOR_FOUND: No sensor could be found. Either no sensor is connected, it ++ * has not been initialized yet, or the system is improperly ++ * configured. ++ * @IPTS_STATUS_OUT_OF_MEMORY: Not enough free memory for requested operation. ++ * @IPTS_STATUS_INTERNAL_ERROR: An unexpected error occurred. ++ * @IPTS_STATUS_SENSOR_DISABLED: The sensor has been disabled and must be reinitialized. ++ * @IPTS_STATUS_COMPAT_CHECK_FAIL: Compatibility revision check between sensor and ME failed. ++ * The host can ignore this error and attempt to continue. ++ * @IPTS_STATUS_SENSOR_EXPECTED_RESET: The sensor went through a reset initiated by ME or host. ++ * @IPTS_STATUS_SENSOR_UNEXPECTED_RESET: The sensor went through an unexpected reset. ++ * @IPTS_STATUS_RESET_FAILED: Requested sensor reset failed to complete. ++ * @IPTS_STATUS_TIMEOUT: The operation timed out. ++ * @IPTS_STATUS_TEST_MODE_FAIL: Test mode pattern did not match expected values. ++ * @IPTS_STATUS_SENSOR_FAIL_FATAL: The sensor reported a fatal error during reset sequence. ++ * Further progress is not possible. ++ * @IPTS_STATUS_SENSOR_FAIL_NONFATAL: The sensor reported a fatal error during reset sequence. ++ * The host can attempt to continue. ++ * @IPTS_STATUS_INVALID_DEVICE_CAPS: The device reported invalid capabilities. ++ * @IPTS_STATUS_QUIESCE_IO_IN_PROGRESS: Command cannot be completed until Quiesce IO is done. ++ */ ++enum ipts_status { ++ IPTS_STATUS_SUCCESS = 0, ++ IPTS_STATUS_INVALID_PARAMS = 1, ++ IPTS_STATUS_ACCESS_DENIED = 2, ++ IPTS_STATUS_CMD_SIZE_ERROR = 3, ++ IPTS_STATUS_NOT_READY = 4, ++ IPTS_STATUS_REQUEST_OUTSTANDING = 5, ++ IPTS_STATUS_NO_SENSOR_FOUND = 6, ++ IPTS_STATUS_OUT_OF_MEMORY = 7, ++ IPTS_STATUS_INTERNAL_ERROR = 8, ++ IPTS_STATUS_SENSOR_DISABLED = 9, ++ IPTS_STATUS_COMPAT_CHECK_FAIL = 10, ++ IPTS_STATUS_SENSOR_EXPECTED_RESET = 11, ++ IPTS_STATUS_SENSOR_UNEXPECTED_RESET = 12, ++ IPTS_STATUS_RESET_FAILED = 13, ++ IPTS_STATUS_TIMEOUT = 14, ++ IPTS_STATUS_TEST_MODE_FAIL = 15, ++ IPTS_STATUS_SENSOR_FAIL_FATAL = 16, ++ IPTS_STATUS_SENSOR_FAIL_NONFATAL = 17, ++ IPTS_STATUS_INVALID_DEVICE_CAPS = 18, ++ IPTS_STATUS_QUIESCE_IO_IN_PROGRESS = 19, ++}; ++ ++/* ++ * The amount of buffers that is used for IPTS ++ */ ++#define IPTS_BUFFERS 16 ++ ++/* ++ * The special buffer ID that is used for direct host2me feedback. ++ */ ++#define IPTS_HOST2ME_BUFFER IPTS_BUFFERS ++ ++/** ++ * enum ipts_mode - Operation mode for IPTS hardware ++ * @IPTS_MODE_SINGLETOUCH: Fallback that supports only one finger and no stylus. ++ * The data is received as a HID report with ID 64. ++ * @IPTS_MODE_MULTITOUCH: The "proper" operation mode for IPTS. It will return ++ * stylus data as well as capacitive heatmap touch data. ++ * This data needs to be processed in userspace. ++ */ ++enum ipts_mode { ++ IPTS_MODE_SINGLETOUCH = 0, ++ IPTS_MODE_MULTITOUCH = 1, ++}; ++ ++/** ++ * struct ipts_set_mode_cmd - Payload for the SET_MODE command. ++ * @mode: The mode that IPTS should operate in. ++ */ ++struct ipts_set_mode_cmd { ++ enum ipts_mode mode; ++ u8 reserved[12]; ++} __packed; ++ ++#define IPTS_WORKQUEUE_SIZE 8192 ++#define IPTS_WORKQUEUE_ITEM_SIZE 16 ++ ++/** ++ * struct ipts_set_mem_window_cmd - Payload for the SET_MEM_WINDOW command. ++ * @data_buffer_addr_lower: Lower 32 bits of the data buffer addresses. ++ * @data_buffer_addr_upper: Upper 32 bits of the data buffer addresses. ++ * @workqueue_addr_lower: Lower 32 bits of the workqueue buffer address. ++ * @workqueue_addr_upper: Upper 32 bits of the workqueue buffer address. ++ * @doorbell_addr_lower: Lower 32 bits of the doorbell buffer address. ++ * @doorbell_addr_upper: Upper 32 bits of the doorbell buffer address. ++ * @feedback_buffer_addr_lower: Lower 32 bits of the feedback buffer addresses. ++ * @feedback_buffer_addr_upper: Upper 32 bits of the feedback buffer addresses. ++ * @host2me_addr_lower: Lower 32 bits of the host2me buffer address. ++ * @host2me_addr_upper: Upper 32 bits of the host2me buffer address. ++ * @workqueue_item_size: Magic value. (IPTS_WORKQUEUE_ITEM_SIZE) ++ * @workqueue_size: Magic value. (IPTS_WORKQUEUE_SIZE) ++ * ++ * The data buffers are buffers that get filled with touch data by the ME. ++ * The doorbell buffer is a u32 that gets incremented by the ME once a data ++ * buffer has been filled with new data. ++ * ++ * The other buffers are required for using GuC submission with binary ++ * firmware. Since support for GuC submission has been dropped from i915, ++ * they are not used anymore, but they need to be allocated and passed, ++ * otherwise the hardware will refuse to start. ++ */ ++struct ipts_set_mem_window_cmd { ++ u32 data_buffer_addr_lower[IPTS_BUFFERS]; ++ u32 data_buffer_addr_upper[IPTS_BUFFERS]; ++ u32 workqueue_addr_lower; ++ u32 workqueue_addr_upper; ++ u32 doorbell_addr_lower; ++ u32 doorbell_addr_upper; ++ u32 feedback_buffer_addr_lower[IPTS_BUFFERS]; ++ u32 feedback_buffer_addr_upper[IPTS_BUFFERS]; ++ u32 host2me_addr_lower; ++ u32 host2me_addr_upper; ++ u32 host2me_size; ++ u8 reserved1; ++ u8 workqueue_item_size; ++ u16 workqueue_size; ++ u8 reserved[32]; ++} __packed; ++ ++/** ++ * struct ipts_feedback_cmd - Payload for the FEEDBACK command. ++ * @buffer: The buffer that the ME should refill. ++ */ ++struct ipts_feedback_cmd { ++ u32 buffer; ++ u8 reserved[12]; ++} __packed; ++ ++/** ++ * enum ipts_feedback_cmd_type - Commands that can be executed on the sensor through feedback. ++ */ ++enum ipts_feedback_cmd_type { ++ IPTS_FEEDBACK_CMD_TYPE_NONE = 0, ++ IPTS_FEEDBACK_CMD_TYPE_SOFT_RESET = 1, ++ IPTS_FEEDBACK_CMD_TYPE_GOTO_ARMED = 2, ++ IPTS_FEEDBACK_CMD_TYPE_GOTO_SENSING = 3, ++ IPTS_FEEDBACK_CMD_TYPE_GOTO_SLEEP = 4, ++ IPTS_FEEDBACK_CMD_TYPE_GOTO_DOZE = 5, ++ IPTS_FEEDBACK_CMD_TYPE_HARD_RESET = 6, ++}; ++ ++/** ++ * enum ipts_feedback_data_type - Describes the data that a feedback buffer contains. ++ * @IPTS_FEEDBACK_DATA_TYPE_VENDOR: The buffer contains vendor specific feedback. ++ * @IPTS_FEEDBACK_DATA_TYPE_SET_FEATURES: The buffer contains a HID set features command. ++ * @IPTS_FEEDBACK_DATA_TYPE_GET_FEATURES: The buffer contains a HID get features command. ++ * @IPTS_FEEDBACK_DATA_TYPE_OUTPUT_REPORT: The buffer contains a HID output report. ++ * @IPTS_FEEDBACK_DATA_TYPE_STORE_DATA: The buffer contains calibration data for the sensor. ++ */ ++enum ipts_feedback_data_type { ++ IPTS_FEEDBACK_DATA_TYPE_VENDOR = 0, ++ IPTS_FEEDBACK_DATA_TYPE_SET_FEATURES = 1, ++ IPTS_FEEDBACK_DATA_TYPE_GET_FEATURES = 2, ++ IPTS_FEEDBACK_DATA_TYPE_OUTPUT_REPORT = 3, ++ IPTS_FEEDBACK_DATA_TYPE_STORE_DATA = 4, ++}; ++ ++/** ++ * struct ipts_feedback_buffer - The contents of an IPTS feedback buffer. ++ * @cmd_type: A command that should be executed on the sensor. ++ * @size: The size of the payload to be written. ++ * @buffer: The ID of the buffer that contains this feedback data. ++ * @protocol: The protocol version of the EDS. ++ * @data_type: The type of payload that the buffer contains. ++ * @spi_offset: The offset at which to write the payload data. ++ * @payload: Payload for the feedback command, or 0 if no payload is sent. ++ */ ++struct ipts_feedback_buffer { ++ enum ipts_feedback_cmd_type cmd_type; ++ u32 size; ++ u32 buffer; ++ u32 protocol; ++ enum ipts_feedback_data_type data_type; ++ u32 spi_offset; ++ u8 reserved[40]; ++ u8 payload[]; ++} __packed; ++ ++/** ++ * enum ipts_reset_type - Possible ways of resetting the touch sensor ++ * @IPTS_RESET_TYPE_HARD: Perform hardware reset using GPIO pin. ++ * @IPTS_RESET_TYPE_SOFT: Perform software reset using SPI interface. ++ */ ++enum ipts_reset_type { ++ IPTS_RESET_TYPE_HARD = 0, ++ IPTS_RESET_TYPE_SOFT = 1, ++}; ++ ++/** ++ * struct ipts_reset_sensor_cmd - Payload for the RESET_SENSOR command. ++ * @type: What type of reset should be performed. ++ */ ++struct ipts_reset_sensor_cmd { ++ enum ipts_reset_type type; ++ u8 reserved[4]; ++} __packed; ++ ++/** ++ * struct ipts_command - A message sent from the host to the ME. ++ * @code: The message code describing the command. (see IPTS_CMD_*) ++ * @payload: Payload for the command, or 0 if no payload is required. ++ */ ++struct ipts_command { ++ u32 code; ++ u8 payload[320]; ++} __packed; ++ ++/** ++ * struct ipts_device_info - Payload for the GET_DEVICE_INFO response. ++ * @vendor_id: Vendor ID of the touch sensor. ++ * @device_id: Device ID of the touch sensor. ++ * @hw_rev: Hardware revision of the touch sensor. ++ * @fw_rev: Firmware revision of the touch sensor. ++ * @data_size: Required size of one data buffer. ++ * @feedback_size: Required size of one feedback buffer. ++ * @mode: Current operation mode of IPTS. ++ * @max_contacts: The amount of concurrent touches supported by the sensor. ++ */ ++struct ipts_get_device_info_rsp { ++ u16 vendor_id; ++ u16 device_id; ++ u32 hw_rev; ++ u32 fw_rev; ++ u32 data_size; ++ u32 feedback_size; ++ enum ipts_mode mode; ++ u8 max_contacts; ++ u8 reserved[19]; ++} __packed; ++ ++/** ++ * struct ipts_feedback_rsp - Payload for the FEEDBACK response. ++ * @buffer: The buffer that has received feedback. ++ */ ++struct ipts_feedback_rsp { ++ u32 buffer; ++} __packed; ++ ++/** ++ * struct ipts_response - A message sent from the ME to the host. ++ * @code: The message code describing the response. (see IPTS_RSP_*) ++ * @status: The status code returned by the command. ++ * @payload: Payload returned by the command. ++ */ ++struct ipts_response { ++ u32 code; ++ enum ipts_status status; ++ u8 payload[80]; ++} __packed; ++ ++#endif /* _IPTS_PROTOCOL_H_ */ +diff --git a/drivers/misc/ipts/receiver.c b/drivers/misc/ipts/receiver.c +new file mode 100644 +index 000000000000..23dca13c2139 +--- /dev/null ++++ b/drivers/misc/ipts/receiver.c +@@ -0,0 +1,224 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later ++/* ++ * Copyright (c) 2016 Intel Corporation ++ * Copyright (c) 2020 Dorian Stoll ++ * ++ * Linux driver for Intel Precise Touch & Stylus ++ */ ++ ++#include ++#include ++#include ++ ++#include "context.h" ++#include "control.h" ++#include "protocol.h" ++#include "resources.h" ++ ++/* ++ * Temporary parameter to guard gen7 multitouch mode. ++ * Remove once gen7 has stable iptsd support. ++ */ ++static bool gen7mt; ++module_param(gen7mt, bool, 0644); ++ ++static int ipts_receiver_handle_get_device_info(struct ipts_context *ipts, ++ struct ipts_response *rsp) ++{ ++ struct ipts_set_mode_cmd cmd; ++ ++ memcpy(&ipts->device_info, rsp->payload, ++ sizeof(struct ipts_get_device_info_rsp)); ++ ++ memset(&cmd, 0, sizeof(struct ipts_set_mode_cmd)); ++ cmd.mode = IPTS_MODE_MULTITOUCH; ++ ++ return ipts_control_send(ipts, IPTS_CMD_SET_MODE, &cmd, ++ sizeof(struct ipts_set_mode_cmd)); ++} ++ ++static int ipts_receiver_handle_set_mode(struct ipts_context *ipts) ++{ ++ int i, ret; ++ struct ipts_set_mem_window_cmd cmd; ++ ++ ret = ipts_resources_alloc(ipts); ++ if (ret) { ++ dev_err(ipts->dev, "Failed to allocate resources\n"); ++ return ret; ++ } ++ ++ memset(&cmd, 0, sizeof(struct ipts_set_mem_window_cmd)); ++ ++ for (i = 0; i < IPTS_BUFFERS; i++) { ++ cmd.data_buffer_addr_lower[i] = ++ lower_32_bits(ipts->data[i].dma_address); ++ ++ cmd.data_buffer_addr_upper[i] = ++ upper_32_bits(ipts->data[i].dma_address); ++ ++ cmd.feedback_buffer_addr_lower[i] = ++ lower_32_bits(ipts->feedback[i].dma_address); ++ ++ cmd.feedback_buffer_addr_upper[i] = ++ upper_32_bits(ipts->feedback[i].dma_address); ++ } ++ ++ cmd.workqueue_addr_lower = lower_32_bits(ipts->workqueue.dma_address); ++ cmd.workqueue_addr_upper = upper_32_bits(ipts->workqueue.dma_address); ++ ++ cmd.doorbell_addr_lower = lower_32_bits(ipts->doorbell.dma_address); ++ cmd.doorbell_addr_upper = upper_32_bits(ipts->doorbell.dma_address); ++ ++ cmd.host2me_addr_lower = lower_32_bits(ipts->host2me.dma_address); ++ cmd.host2me_addr_upper = upper_32_bits(ipts->host2me.dma_address); ++ ++ cmd.workqueue_size = IPTS_WORKQUEUE_SIZE; ++ cmd.workqueue_item_size = IPTS_WORKQUEUE_ITEM_SIZE; ++ ++ return ipts_control_send(ipts, IPTS_CMD_SET_MEM_WINDOW, &cmd, ++ sizeof(struct ipts_set_mem_window_cmd)); ++} ++ ++static int ipts_receiver_handle_set_mem_window(struct ipts_context *ipts) ++{ ++ int ret; ++ ++ dev_info(ipts->dev, "Device %04hX:%04hX ready\n", ++ ipts->device_info.vendor_id, ipts->device_info.device_id); ++ ipts->status = IPTS_HOST_STATUS_STARTED; ++ ++ ret = ipts_control_send(ipts, IPTS_CMD_READY_FOR_DATA, NULL, 0); ++ if (ret) ++ return ret; ++ ++ if (!gen7mt) ++ return 0; ++ ++ return ipts_control_set_feature(ipts, 0x5, 0x1); ++} ++ ++static int ipts_receiver_handle_feedback(struct ipts_context *ipts, ++ struct ipts_response *rsp) ++{ ++ struct ipts_feedback_rsp feedback; ++ ++ if (ipts->status != IPTS_HOST_STATUS_STOPPING) ++ return 0; ++ ++ memcpy(&feedback, rsp->payload, sizeof(feedback)); ++ ++ if (feedback.buffer < IPTS_BUFFERS - 1) ++ return ipts_control_send_feedback(ipts, feedback.buffer + 1); ++ ++ return ipts_control_send(ipts, IPTS_CMD_CLEAR_MEM_WINDOW, NULL, 0); ++} ++ ++static int ipts_receiver_handle_clear_mem_window(struct ipts_context *ipts) ++{ ++ ipts->status = IPTS_HOST_STATUS_STOPPED; ++ ++ if (ipts->restart) ++ return ipts_control_start(ipts); ++ ++ return 0; ++} ++ ++static bool ipts_receiver_sensor_was_reset(u32 status) ++{ ++ return status == IPTS_STATUS_SENSOR_EXPECTED_RESET || ++ status == IPTS_STATUS_SENSOR_UNEXPECTED_RESET; ++} ++ ++static bool ipts_receiver_handle_error(struct ipts_context *ipts, ++ struct ipts_response *rsp) ++{ ++ bool error; ++ ++ switch (rsp->status) { ++ case IPTS_STATUS_SUCCESS: ++ case IPTS_STATUS_COMPAT_CHECK_FAIL: ++ error = false; ++ break; ++ case IPTS_STATUS_INVALID_PARAMS: ++ error = rsp->code != IPTS_RSP_FEEDBACK; ++ break; ++ case IPTS_STATUS_SENSOR_DISABLED: ++ error = ipts->status != IPTS_HOST_STATUS_STOPPING; ++ break; ++ default: ++ error = true; ++ break; ++ } ++ ++ if (!error) ++ return false; ++ ++ dev_err(ipts->dev, "Command 0x%08x failed: %d\n", rsp->code, ++ rsp->status); ++ ++ if (ipts_receiver_sensor_was_reset(rsp->status)) { ++ dev_err(ipts->dev, "Sensor was reset\n"); ++ ++ if (ipts_control_restart(ipts)) ++ dev_err(ipts->dev, "Failed to restart IPTS\n"); ++ } ++ ++ return true; ++} ++ ++static void ipts_receiver_handle_response(struct ipts_context *ipts, ++ struct ipts_response *rsp) ++{ ++ int ret; ++ ++ if (ipts_receiver_handle_error(ipts, rsp)) ++ return; ++ ++ switch (rsp->code) { ++ case IPTS_RSP_GET_DEVICE_INFO: ++ ret = ipts_receiver_handle_get_device_info(ipts, rsp); ++ break; ++ case IPTS_RSP_SET_MODE: ++ ret = ipts_receiver_handle_set_mode(ipts); ++ break; ++ case IPTS_RSP_SET_MEM_WINDOW: ++ ret = ipts_receiver_handle_set_mem_window(ipts); ++ break; ++ case IPTS_RSP_FEEDBACK: ++ ret = ipts_receiver_handle_feedback(ipts, rsp); ++ break; ++ case IPTS_RSP_CLEAR_MEM_WINDOW: ++ ret = ipts_receiver_handle_clear_mem_window(ipts); ++ break; ++ default: ++ ret = 0; ++ break; ++ } ++ ++ if (!ret) ++ return; ++ ++ dev_err(ipts->dev, "Error while handling response 0x%08x: %d\n", ++ rsp->code, ret); ++ ++ if (ipts_control_stop(ipts)) ++ dev_err(ipts->dev, "Failed to stop IPTS\n"); ++} ++ ++void ipts_receiver_callback(struct mei_cl_device *cldev) ++{ ++ int ret; ++ struct ipts_response rsp; ++ struct ipts_context *ipts; ++ ++ ipts = mei_cldev_get_drvdata(cldev); ++ ++ ret = mei_cldev_recv(cldev, (u8 *)&rsp, sizeof(struct ipts_response)); ++ if (ret <= 0) { ++ dev_err(ipts->dev, "Error while reading response: %d\n", ret); ++ return; ++ } ++ ++ ipts_receiver_handle_response(ipts, &rsp); ++} +diff --git a/drivers/misc/ipts/receiver.h b/drivers/misc/ipts/receiver.h +new file mode 100644 +index 000000000000..7f075afa7ef8 +--- /dev/null ++++ b/drivers/misc/ipts/receiver.h +@@ -0,0 +1,16 @@ ++/* SPDX-License-Identifier: GPL-2.0-or-later */ ++/* ++ * Copyright (c) 2016 Intel Corporation ++ * Copyright (c) 2020 Dorian Stoll ++ * ++ * Linux driver for Intel Precise Touch & Stylus ++ */ ++ ++#ifndef _IPTS_RECEIVER_H_ ++#define _IPTS_RECEIVER_H_ ++ ++#include ++ ++void ipts_receiver_callback(struct mei_cl_device *cldev); ++ ++#endif /* _IPTS_RECEIVER_H_ */ +diff --git a/drivers/misc/ipts/resources.c b/drivers/misc/ipts/resources.c +new file mode 100644 +index 000000000000..8e3a2409e438 +--- /dev/null ++++ b/drivers/misc/ipts/resources.c +@@ -0,0 +1,128 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later ++/* ++ * Copyright (c) 2016 Intel Corporation ++ * Copyright (c) 2020 Dorian Stoll ++ * ++ * Linux driver for Intel Precise Touch & Stylus ++ */ ++ ++#include ++ ++#include "context.h" ++ ++void ipts_resources_free(struct ipts_context *ipts) ++{ ++ int i; ++ struct ipts_buffer_info *buffers; ++ ++ u32 data_buffer_size = ipts->device_info.data_size; ++ u32 feedback_buffer_size = ipts->device_info.feedback_size; ++ ++ buffers = ipts->data; ++ for (i = 0; i < IPTS_BUFFERS; i++) { ++ if (!buffers[i].address) ++ continue; ++ ++ dma_free_coherent(ipts->dev, data_buffer_size, ++ buffers[i].address, buffers[i].dma_address); ++ ++ buffers[i].address = NULL; ++ buffers[i].dma_address = 0; ++ } ++ ++ buffers = ipts->feedback; ++ for (i = 0; i < IPTS_BUFFERS; i++) { ++ if (!buffers[i].address) ++ continue; ++ ++ dma_free_coherent(ipts->dev, feedback_buffer_size, ++ buffers[i].address, buffers[i].dma_address); ++ ++ buffers[i].address = NULL; ++ buffers[i].dma_address = 0; ++ } ++ ++ if (ipts->doorbell.address) { ++ dma_free_coherent(ipts->dev, sizeof(u32), ++ ipts->doorbell.address, ++ ipts->doorbell.dma_address); ++ ++ ipts->doorbell.address = NULL; ++ ipts->doorbell.dma_address = 0; ++ } ++ ++ if (ipts->workqueue.address) { ++ dma_free_coherent(ipts->dev, sizeof(u32), ++ ipts->workqueue.address, ++ ipts->workqueue.dma_address); ++ ++ ipts->workqueue.address = NULL; ++ ipts->workqueue.dma_address = 0; ++ } ++ ++ if (ipts->host2me.address) { ++ dma_free_coherent(ipts->dev, feedback_buffer_size, ++ ipts->host2me.address, ++ ipts->host2me.dma_address); ++ ++ ipts->host2me.address = NULL; ++ ipts->host2me.dma_address = 0; ++ } ++} ++ ++int ipts_resources_alloc(struct ipts_context *ipts) ++{ ++ int i; ++ struct ipts_buffer_info *buffers; ++ ++ u32 data_buffer_size = ipts->device_info.data_size; ++ u32 feedback_buffer_size = ipts->device_info.feedback_size; ++ ++ buffers = ipts->data; ++ for (i = 0; i < IPTS_BUFFERS; i++) { ++ buffers[i].address = ++ dma_alloc_coherent(ipts->dev, data_buffer_size, ++ &buffers[i].dma_address, GFP_KERNEL); ++ ++ if (!buffers[i].address) ++ goto release_resources; ++ } ++ ++ buffers = ipts->feedback; ++ for (i = 0; i < IPTS_BUFFERS; i++) { ++ buffers[i].address = ++ dma_alloc_coherent(ipts->dev, feedback_buffer_size, ++ &buffers[i].dma_address, GFP_KERNEL); ++ ++ if (!buffers[i].address) ++ goto release_resources; ++ } ++ ++ ipts->doorbell.address = ++ dma_alloc_coherent(ipts->dev, sizeof(u32), ++ &ipts->doorbell.dma_address, GFP_KERNEL); ++ ++ if (!ipts->doorbell.address) ++ goto release_resources; ++ ++ ipts->workqueue.address = ++ dma_alloc_coherent(ipts->dev, sizeof(u32), ++ &ipts->workqueue.dma_address, GFP_KERNEL); ++ ++ if (!ipts->workqueue.address) ++ goto release_resources; ++ ++ ipts->host2me.address = ++ dma_alloc_coherent(ipts->dev, feedback_buffer_size, ++ &ipts->host2me.dma_address, GFP_KERNEL); ++ ++ if (!ipts->workqueue.address) ++ goto release_resources; ++ ++ return 0; ++ ++release_resources: ++ ++ ipts_resources_free(ipts); ++ return -ENOMEM; ++} +diff --git a/drivers/misc/ipts/resources.h b/drivers/misc/ipts/resources.h +new file mode 100644 +index 000000000000..fdac0eee9156 +--- /dev/null ++++ b/drivers/misc/ipts/resources.h +@@ -0,0 +1,17 @@ ++/* SPDX-License-Identifier: GPL-2.0-or-later */ ++/* ++ * Copyright (c) 2016 Intel Corporation ++ * Copyright (c) 2020 Dorian Stoll ++ * ++ * Linux driver for Intel Precise Touch & Stylus ++ */ ++ ++#ifndef _IPTS_RESOURCES_H_ ++#define _IPTS_RESOURCES_H_ ++ ++#include "context.h" ++ ++int ipts_resources_alloc(struct ipts_context *ipts); ++void ipts_resources_free(struct ipts_context *ipts); ++ ++#endif /* _IPTS_RESOURCES_H_ */ +diff --git a/drivers/misc/ipts/uapi.c b/drivers/misc/ipts/uapi.c +new file mode 100644 +index 000000000000..598f0710ad64 +--- /dev/null ++++ b/drivers/misc/ipts/uapi.c +@@ -0,0 +1,208 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later ++/* ++ * Copyright (c) 2016 Intel Corporation ++ * Copyright (c) 2020 Dorian Stoll ++ * ++ * Linux driver for Intel Precise Touch & Stylus ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "context.h" ++#include "control.h" ++#include "protocol.h" ++#include "uapi.h" ++ ++struct ipts_uapi uapi; ++ ++static ssize_t ipts_uapi_read(struct file *file, char __user *buf, size_t count, ++ loff_t *offset) ++{ ++ int buffer; ++ int maxbytes; ++ struct ipts_context *ipts = uapi.ipts; ++ ++ buffer = MINOR(file->f_path.dentry->d_inode->i_rdev); ++ ++ if (!ipts || ipts->status != IPTS_HOST_STATUS_STARTED) ++ return -ENODEV; ++ ++ maxbytes = ipts->device_info.data_size - *offset; ++ if (maxbytes <= 0 || count > maxbytes) ++ return -EINVAL; ++ ++ if (copy_to_user(buf, ipts->data[buffer].address + *offset, count)) ++ return -EFAULT; ++ ++ return count; ++} ++ ++static long ipts_uapi_ioctl_get_device_ready(struct ipts_context *ipts, ++ unsigned long arg) ++{ ++ void __user *buffer = (void __user *)arg; ++ u8 ready = 0; ++ ++ if (ipts) ++ ready = ipts->status == IPTS_HOST_STATUS_STARTED; ++ ++ if (copy_to_user(buffer, &ready, sizeof(u8))) ++ return -EFAULT; ++ ++ return 0; ++} ++ ++static long ipts_uapi_ioctl_get_device_info(struct ipts_context *ipts, ++ unsigned long arg) ++{ ++ struct ipts_device_info info; ++ void __user *buffer = (void __user *)arg; ++ ++ if (!ipts || ipts->status != IPTS_HOST_STATUS_STARTED) ++ return -ENODEV; ++ ++ info.vendor = ipts->device_info.vendor_id; ++ info.product = ipts->device_info.device_id; ++ info.version = ipts->device_info.fw_rev; ++ info.buffer_size = ipts->device_info.data_size; ++ info.max_contacts = ipts->device_info.max_contacts; ++ ++ if (copy_to_user(buffer, &info, sizeof(struct ipts_device_info))) ++ return -EFAULT; ++ ++ return 0; ++} ++ ++static long ipts_uapi_ioctl_get_doorbell(struct ipts_context *ipts, ++ unsigned long arg) ++{ ++ void __user *buffer = (void __user *)arg; ++ ++ if (!ipts || ipts->status != IPTS_HOST_STATUS_STARTED) ++ return -ENODEV; ++ ++ if (copy_to_user(buffer, ipts->doorbell.address, sizeof(u32))) ++ return -EFAULT; ++ ++ return 0; ++} ++ ++static long ipts_uapi_ioctl_send_feedback(struct ipts_context *ipts, ++ struct file *file) ++{ ++ int ret; ++ u32 buffer; ++ ++ if (!ipts || ipts->status != IPTS_HOST_STATUS_STARTED) ++ return -ENODEV; ++ ++ buffer = MINOR(file->f_path.dentry->d_inode->i_rdev); ++ ++ ret = ipts_control_send_feedback(ipts, buffer); ++ if (ret) ++ return -EFAULT; ++ ++ return 0; ++} ++ ++static long ipts_uapi_ioctl_send_reset(struct ipts_context *ipts) ++{ ++ int ret; ++ struct ipts_reset_sensor_cmd cmd; ++ ++ if (!ipts || ipts->status != IPTS_HOST_STATUS_STARTED) ++ return -ENODEV; ++ ++ memset(&cmd, 0, sizeof(struct ipts_reset_sensor_cmd)); ++ cmd.type = IPTS_RESET_TYPE_SOFT; ++ ++ ret = ipts_control_send(ipts, IPTS_CMD_RESET_SENSOR, &cmd, ++ sizeof(struct ipts_reset_sensor_cmd)); ++ ++ if (ret) ++ return -EFAULT; ++ ++ return 0; ++} ++ ++static long ipts_uapi_ioctl(struct file *file, unsigned int cmd, ++ unsigned long arg) ++{ ++ struct ipts_context *ipts = uapi.ipts; ++ ++ switch (cmd) { ++ case IPTS_IOCTL_GET_DEVICE_READY: ++ return ipts_uapi_ioctl_get_device_ready(ipts, arg); ++ case IPTS_IOCTL_GET_DEVICE_INFO: ++ return ipts_uapi_ioctl_get_device_info(ipts, arg); ++ case IPTS_IOCTL_GET_DOORBELL: ++ return ipts_uapi_ioctl_get_doorbell(ipts, arg); ++ case IPTS_IOCTL_SEND_FEEDBACK: ++ return ipts_uapi_ioctl_send_feedback(ipts, file); ++ case IPTS_IOCTL_SEND_RESET: ++ return ipts_uapi_ioctl_send_reset(ipts); ++ default: ++ return -ENOTTY; ++ } ++} ++ ++static const struct file_operations ipts_uapi_fops = { ++ .owner = THIS_MODULE, ++ .read = ipts_uapi_read, ++ .unlocked_ioctl = ipts_uapi_ioctl, ++#ifdef CONFIG_COMPAT ++ .compat_ioctl = ipts_uapi_ioctl, ++#endif ++}; ++ ++void ipts_uapi_link(struct ipts_context *ipts) ++{ ++ uapi.ipts = ipts; ++} ++ ++void ipts_uapi_unlink(void) ++{ ++ uapi.ipts = NULL; ++} ++ ++int ipts_uapi_init(void) ++{ ++ int i, major; ++ ++ alloc_chrdev_region(&uapi.dev, 0, IPTS_BUFFERS, "ipts"); ++ uapi.class = class_create(THIS_MODULE, "ipts"); ++ ++ major = MAJOR(uapi.dev); ++ ++ cdev_init(&uapi.cdev, &ipts_uapi_fops); ++ uapi.cdev.owner = THIS_MODULE; ++ cdev_add(&uapi.cdev, MKDEV(major, 0), IPTS_BUFFERS); ++ ++ for (i = 0; i < IPTS_BUFFERS; i++) { ++ device_create(uapi.class, NULL, MKDEV(major, i), NULL, ++ "ipts/%d", i); ++ } ++ ++ return 0; ++} ++ ++void ipts_uapi_free(void) ++{ ++ int i; ++ int major; ++ ++ major = MAJOR(uapi.dev); ++ ++ for (i = 0; i < IPTS_BUFFERS; i++) ++ device_destroy(uapi.class, MKDEV(major, i)); ++ ++ cdev_del(&uapi.cdev); ++ ++ unregister_chrdev_region(MKDEV(major, 0), MINORMASK); ++ class_destroy(uapi.class); ++} +diff --git a/drivers/misc/ipts/uapi.h b/drivers/misc/ipts/uapi.h +new file mode 100644 +index 000000000000..53fb86a88f97 +--- /dev/null ++++ b/drivers/misc/ipts/uapi.h +@@ -0,0 +1,47 @@ ++/* SPDX-License-Identifier: GPL-2.0-or-later */ ++/* ++ * Copyright (c) 2016 Intel Corporation ++ * Copyright (c) 2020 Dorian Stoll ++ * ++ * Linux driver for Intel Precise Touch & Stylus ++ */ ++ ++#ifndef _IPTS_UAPI_H_ ++#define _IPTS_UAPI_H_ ++ ++#include ++ ++#include "context.h" ++ ++struct ipts_uapi { ++ dev_t dev; ++ struct class *class; ++ struct cdev cdev; ++ ++ struct ipts_context *ipts; ++}; ++ ++struct ipts_device_info { ++ __u16 vendor; ++ __u16 product; ++ __u32 version; ++ __u32 buffer_size; ++ __u8 max_contacts; ++ ++ /* For future expansion */ ++ __u8 reserved[19]; ++}; ++ ++#define IPTS_IOCTL_GET_DEVICE_READY _IOR(0x86, 0x01, __u8) ++#define IPTS_IOCTL_GET_DEVICE_INFO _IOR(0x86, 0x02, struct ipts_device_info) ++#define IPTS_IOCTL_GET_DOORBELL _IOR(0x86, 0x03, __u32) ++#define IPTS_IOCTL_SEND_FEEDBACK _IO(0x86, 0x04) ++#define IPTS_IOCTL_SEND_RESET _IO(0x86, 0x05) ++ ++void ipts_uapi_link(struct ipts_context *ipts); ++void ipts_uapi_unlink(void); ++ ++int ipts_uapi_init(void); ++void ipts_uapi_free(void); ++ ++#endif /* _IPTS_UAPI_H_ */ +-- +2.33.0 + diff --git a/patches/5.14/0005-surface-sam-over-hid.patch b/patches/5.14/0005-surface-sam-over-hid.patch new file mode 100644 index 000000000..e78c25169 --- /dev/null +++ b/patches/5.14/0005-surface-sam-over-hid.patch @@ -0,0 +1,335 @@ +From e371cd58c1b3300a032f218e941b89b757b9be59 Mon Sep 17 00:00:00 2001 +From: Maximilian Luz +Date: Sat, 25 Jul 2020 17:19:53 +0200 +Subject: [PATCH] i2c: acpi: Implement RawBytes read access + +Microsoft Surface Pro 4 and Book 1 devices access the MSHW0030 I2C +device via a generic serial bus operation region and RawBytes read +access. On the Surface Book 1, this access is required to turn on (and +off) the discrete GPU. + +Multiple things are to note here: + +a) The RawBytes access is device/driver dependent. The ACPI + specification states: + + > Raw accesses assume that the writer has knowledge of the bus that + > the access is made over and the device that is being accessed. The + > protocol may only ensure that the buffer is transmitted to the + > appropriate driver, but the driver must be able to interpret the + > buffer to communicate to a register. + + Thus this implementation may likely not work on other devices + accessing I2C via the RawBytes accessor type. + +b) The MSHW0030 I2C device is an HID-over-I2C device which seems to + serve multiple functions: + + 1. It is the main access point for the legacy-type Surface Aggregator + Module (also referred to as SAM-over-HID, as opposed to the newer + SAM-over-SSH/UART). It has currently not been determined on how + support for the legacy SAM should be implemented. Likely via a + custom HID driver. + + 2. It seems to serve as the HID device for the Integrated Sensor Hub. + This might complicate matters with regards to implementing a + SAM-over-HID driver required by legacy SAM. + +In light of this, the simplest approach has been chosen for now. +However, it may make more sense regarding breakage and compatibility to +either provide functionality for replacing or enhancing the default +operation region handler via some additional API functions, or even to +completely blacklist MSHW0030 from the I2C core and provide a custom +driver for it. + +Replacing/enhancing the default operation region handler would, however, +either require some sort of secondary driver and access point for it, +from which the new API functions would be called and the new handler +(part) would be installed, or hard-coding them via some sort of +quirk-like interface into the I2C core. + +Signed-off-by: Maximilian Luz +Patchset: surface-sam-over-hid +--- + drivers/i2c/i2c-core-acpi.c | 35 +++++++++++++++++++++++++++++++++++ + 1 file changed, 35 insertions(+) + +diff --git a/drivers/i2c/i2c-core-acpi.c b/drivers/i2c/i2c-core-acpi.c +index 6f0aa0ed3241..13eb5ac82729 100644 +--- a/drivers/i2c/i2c-core-acpi.c ++++ b/drivers/i2c/i2c-core-acpi.c +@@ -570,6 +570,28 @@ static int acpi_gsb_i2c_write_bytes(struct i2c_client *client, + return (ret == 1) ? 0 : -EIO; + } + ++static int acpi_gsb_i2c_write_raw_bytes(struct i2c_client *client, ++ u8 *data, u8 data_len) ++{ ++ struct i2c_msg msgs[1]; ++ int ret = AE_OK; ++ ++ msgs[0].addr = client->addr; ++ msgs[0].flags = client->flags; ++ msgs[0].len = data_len + 1; ++ msgs[0].buf = data; ++ ++ ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); ++ ++ if (ret < 0) { ++ dev_err(&client->adapter->dev, "i2c write failed: %d\n", ret); ++ return ret; ++ } ++ ++ /* 1 transfer must have completed successfully */ ++ return (ret == 1) ? 0 : -EIO; ++} ++ + static acpi_status + i2c_acpi_space_handler(u32 function, acpi_physical_address command, + u32 bits, u64 *value64, +@@ -671,6 +693,19 @@ i2c_acpi_space_handler(u32 function, acpi_physical_address command, + } + break; + ++ case ACPI_GSB_ACCESS_ATTRIB_RAW_BYTES: ++ if (action == ACPI_READ) { ++ dev_warn(&adapter->dev, ++ "protocol 0x%02x not supported for client 0x%02x\n", ++ accessor_type, client->addr); ++ ret = AE_BAD_PARAMETER; ++ goto err; ++ } else { ++ status = acpi_gsb_i2c_write_raw_bytes(client, ++ gsb->data, info->access_length); ++ } ++ break; ++ + default: + dev_warn(&adapter->dev, "protocol 0x%02x not supported for client 0x%02x\n", + accessor_type, client->addr); +-- +2.33.0 + +From b502e53c1952ef1e31b5ca207527009073ea172d Mon Sep 17 00:00:00 2001 +From: Maximilian Luz +Date: Sat, 13 Feb 2021 16:41:18 +0100 +Subject: [PATCH] platform/surface: Add driver for Surface Book 1 dGPU switch + +Add driver exposing the discrete GPU power-switch of the Microsoft +Surface Book 1 to user-space. + +On the Surface Book 1, the dGPU power is controlled via the Surface +System Aggregator Module (SAM). The specific SAM-over-HID command for +this is exposed via ACPI. This module provides a simple driver exposing +the ACPI call via a sysfs parameter to user-space, so that users can +easily power-on/-off the dGPU. + +Patchset: surface-sam-over-hid +--- + drivers/platform/surface/Kconfig | 7 + + drivers/platform/surface/Makefile | 1 + + .../surface/surfacebook1_dgpu_switch.c | 162 ++++++++++++++++++ + 3 files changed, 170 insertions(+) + create mode 100644 drivers/platform/surface/surfacebook1_dgpu_switch.c + +diff --git a/drivers/platform/surface/Kconfig b/drivers/platform/surface/Kconfig +index 3105f651614f..53beaedefdd1 100644 +--- a/drivers/platform/surface/Kconfig ++++ b/drivers/platform/surface/Kconfig +@@ -104,6 +104,13 @@ config SURFACE_AGGREGATOR_REGISTRY + the respective client devices. Drivers for these devices still need to + be selected via the other options. + ++config SURFACE_BOOK1_DGPU_SWITCH ++ tristate "Surface Book 1 dGPU Switch Driver" ++ depends on SYSFS ++ help ++ This driver provides a sysfs switch to set the power-state of the ++ discrete GPU found on the Microsoft Surface Book 1. ++ + config SURFACE_DTX + tristate "Surface DTX (Detachment System) Driver" + depends on SURFACE_AGGREGATOR +diff --git a/drivers/platform/surface/Makefile b/drivers/platform/surface/Makefile +index 32889482de55..0cc63440328d 100644 +--- a/drivers/platform/surface/Makefile ++++ b/drivers/platform/surface/Makefile +@@ -11,6 +11,7 @@ obj-$(CONFIG_SURFACE_ACPI_NOTIFY) += surface_acpi_notify.o + obj-$(CONFIG_SURFACE_AGGREGATOR) += aggregator/ + obj-$(CONFIG_SURFACE_AGGREGATOR_CDEV) += surface_aggregator_cdev.o + obj-$(CONFIG_SURFACE_AGGREGATOR_REGISTRY) += surface_aggregator_registry.o ++obj-$(CONFIG_SURFACE_BOOK1_DGPU_SWITCH) += surfacebook1_dgpu_switch.o + obj-$(CONFIG_SURFACE_DTX) += surface_dtx.o + obj-$(CONFIG_SURFACE_GPE) += surface_gpe.o + obj-$(CONFIG_SURFACE_HOTPLUG) += surface_hotplug.o +diff --git a/drivers/platform/surface/surfacebook1_dgpu_switch.c b/drivers/platform/surface/surfacebook1_dgpu_switch.c +new file mode 100644 +index 000000000000..8b816ed8f35c +--- /dev/null ++++ b/drivers/platform/surface/surfacebook1_dgpu_switch.c +@@ -0,0 +1,162 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later ++ ++#include ++#include ++#include ++#include ++ ++ ++#ifdef pr_fmt ++#undef pr_fmt ++#endif ++#define pr_fmt(fmt) "%s:%s: " fmt, KBUILD_MODNAME, __func__ ++ ++ ++static const guid_t dgpu_sw_guid = GUID_INIT(0x6fd05c69, 0xcde3, 0x49f4, ++ 0x95, 0xed, 0xab, 0x16, 0x65, 0x49, 0x80, 0x35); ++ ++#define DGPUSW_ACPI_PATH_DSM "\\_SB_.PCI0.LPCB.EC0_.VGBI" ++#define DGPUSW_ACPI_PATH_HGON "\\_SB_.PCI0.RP05.HGON" ++#define DGPUSW_ACPI_PATH_HGOF "\\_SB_.PCI0.RP05.HGOF" ++ ++ ++static int sb1_dgpu_sw_dsmcall(void) ++{ ++ union acpi_object *ret; ++ acpi_handle handle; ++ acpi_status status; ++ ++ status = acpi_get_handle(NULL, DGPUSW_ACPI_PATH_DSM, &handle); ++ if (status) ++ return -EINVAL; ++ ++ ret = acpi_evaluate_dsm_typed(handle, &dgpu_sw_guid, 1, 1, NULL, ACPI_TYPE_BUFFER); ++ if (!ret) ++ return -EINVAL; ++ ++ ACPI_FREE(ret); ++ return 0; ++} ++ ++static int sb1_dgpu_sw_hgon(void) ++{ ++ struct acpi_buffer buf = {ACPI_ALLOCATE_BUFFER, NULL}; ++ acpi_status status; ++ ++ status = acpi_evaluate_object(NULL, DGPUSW_ACPI_PATH_HGON, NULL, &buf); ++ if (status) { ++ pr_err("failed to run HGON: %d\n", status); ++ return -EINVAL; ++ } ++ ++ if (buf.pointer) ++ ACPI_FREE(buf.pointer); ++ ++ pr_info("turned-on dGPU via HGON\n"); ++ return 0; ++} ++ ++static int sb1_dgpu_sw_hgof(void) ++{ ++ struct acpi_buffer buf = {ACPI_ALLOCATE_BUFFER, NULL}; ++ acpi_status status; ++ ++ status = acpi_evaluate_object(NULL, DGPUSW_ACPI_PATH_HGOF, NULL, &buf); ++ if (status) { ++ pr_err("failed to run HGOF: %d\n", status); ++ return -EINVAL; ++ } ++ ++ if (buf.pointer) ++ ACPI_FREE(buf.pointer); ++ ++ pr_info("turned-off dGPU via HGOF\n"); ++ return 0; ++} ++ ++ ++static ssize_t dgpu_dsmcall_store(struct device *dev, struct device_attribute *attr, ++ const char *buf, size_t len) ++{ ++ int status, value; ++ ++ status = kstrtoint(buf, 0, &value); ++ if (status < 0) ++ return status; ++ ++ if (value != 1) ++ return -EINVAL; ++ ++ status = sb1_dgpu_sw_dsmcall(); ++ ++ return status < 0 ? status : len; ++} ++ ++static ssize_t dgpu_power_store(struct device *dev, struct device_attribute *attr, ++ const char *buf, size_t len) ++{ ++ bool power; ++ int status; ++ ++ status = kstrtobool(buf, &power); ++ if (status < 0) ++ return status; ++ ++ if (power) ++ status = sb1_dgpu_sw_hgon(); ++ else ++ status = sb1_dgpu_sw_hgof(); ++ ++ return status < 0 ? status : len; ++} ++ ++static DEVICE_ATTR_WO(dgpu_dsmcall); ++static DEVICE_ATTR_WO(dgpu_power); ++ ++static struct attribute *sb1_dgpu_sw_attrs[] = { ++ &dev_attr_dgpu_dsmcall.attr, ++ &dev_attr_dgpu_power.attr, ++ NULL, ++}; ++ ++static const struct attribute_group sb1_dgpu_sw_attr_group = { ++ .attrs = sb1_dgpu_sw_attrs, ++}; ++ ++ ++static int sb1_dgpu_sw_probe(struct platform_device *pdev) ++{ ++ return sysfs_create_group(&pdev->dev.kobj, &sb1_dgpu_sw_attr_group); ++} ++ ++static int sb1_dgpu_sw_remove(struct platform_device *pdev) ++{ ++ sysfs_remove_group(&pdev->dev.kobj, &sb1_dgpu_sw_attr_group); ++ return 0; ++} ++ ++/* ++ * The dGPU power seems to be actually handled by MSHW0040. However, that is ++ * also the power-/volume-button device with a mainline driver. So let's use ++ * MSHW0041 instead for now, which seems to be the LTCH (latch/DTX) device. ++ */ ++static const struct acpi_device_id sb1_dgpu_sw_match[] = { ++ { "MSHW0041", }, ++ { }, ++}; ++MODULE_DEVICE_TABLE(acpi, sb1_dgpu_sw_match); ++ ++static struct platform_driver sb1_dgpu_sw = { ++ .probe = sb1_dgpu_sw_probe, ++ .remove = sb1_dgpu_sw_remove, ++ .driver = { ++ .name = "surfacebook1_dgpu_switch", ++ .acpi_match_table = sb1_dgpu_sw_match, ++ .probe_type = PROBE_PREFER_ASYNCHRONOUS, ++ }, ++}; ++module_platform_driver(sb1_dgpu_sw); ++ ++MODULE_AUTHOR("Maximilian Luz "); ++MODULE_DESCRIPTION("Discrete GPU Power-Switch for Surface Book 1"); ++MODULE_LICENSE("GPL"); +-- +2.33.0 + diff --git a/patches/5.14/0006-surface-hotplug.patch b/patches/5.14/0006-surface-hotplug.patch new file mode 100644 index 000000000..be0f8887f --- /dev/null +++ b/patches/5.14/0006-surface-hotplug.patch @@ -0,0 +1,50 @@ +From c31a8baf7ee53cfd6df6cc215e598cabbd7d9926 Mon Sep 17 00:00:00 2001 +From: "Rafael J. Wysocki" +Date: Thu, 8 Jul 2021 15:25:06 +0200 +Subject: [PATCH] PCI: Use pci_update_current_state() in + pci_enable_device_flags() + +Updating the current_state field of struct pci_dev the way it is done +in pci_enable_device_flags() before calling do_pci_enable_device() may +not work. For example, if the given PCI device depends on an ACPI +power resource whose _STA method initially returns 0 ("off"), but the +config space of the PCI device is accessible and the power state +retrieved from the PCI_PM_CTRL register is D0, the current_state +field in the struct pci_dev representing that device will get out of +sync with the power.state of its ACPI companion object and that will +lead to power management issues going forward. + +To avoid such issues, make pci_enable_device_flags() call +pci_update_current_state() which takes ACPI device power management +into account, if present, to retrieve the current power state of the +device. + +Link: https://lore.kernel.org/lkml/20210314000439.3138941-1-luzmaximilian@gmail.com/ +Reported-by: Maximilian Luz +Signed-off-by: Rafael J. Wysocki +Tested-by: Maximilian Luz +Patchset: surface-hotplug +--- + drivers/pci/pci.c | 6 +----- + 1 file changed, 1 insertion(+), 5 deletions(-) + +diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c +index 3f353572588d..a5e6759c407b 100644 +--- a/drivers/pci/pci.c ++++ b/drivers/pci/pci.c +@@ -1906,11 +1906,7 @@ static int pci_enable_device_flags(struct pci_dev *dev, unsigned long flags) + * so that things like MSI message writing will behave as expected + * (e.g. if the device really is in D0 at enable time). + */ +- if (dev->pm_cap) { +- u16 pmcsr; +- pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr); +- dev->current_state = (pmcsr & PCI_PM_CTRL_STATE_MASK); +- } ++ pci_update_current_state(dev, dev->current_state); + + if (atomic_inc_return(&dev->enable_cnt) > 1) + return 0; /* already enabled */ +-- +2.33.0 + diff --git a/patches/5.14/0007-surface-typecover.patch b/patches/5.14/0007-surface-typecover.patch new file mode 100644 index 000000000..42a692ad4 --- /dev/null +++ b/patches/5.14/0007-surface-typecover.patch @@ -0,0 +1,233 @@ +From 81abe9beae0fa64d2646e44f8e7cdf77480ce9de Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= +Date: Thu, 5 Nov 2020 13:09:45 +0100 +Subject: [PATCH] hid/multitouch: Turn off Type Cover keyboard backlight when + suspending + +The Type Cover for Microsoft Surface devices supports a special usb +control request to disable or enable the built-in keyboard backlight. +On Windows, this request happens when putting the device into suspend or +resuming it, without it the backlight of the Type Cover will remain +enabled for some time even though the computer is suspended, which looks +weird to the user. + +So add support for this special usb control request to hid-multitouch, +which is the driver that's handling the Type Cover. + +The reason we have to use a pm_notifier for this instead of the usual +suspend/resume methods is that those won't get called in case the usb +device is already autosuspended. + +Also, if the device is autosuspended, we have to briefly autoresume it +in order to send the request. Doing that should be fine, the usb-core +driver does something similar during suspend inside choose_wakeup(). + +To make sure we don't send that request to every device but only to +devices which support it, add a new quirk +MT_CLS_WIN_8_MS_SURFACE_TYPE_COVER to hid-multitouch. For now this quirk +is only enabled for the usb id of the Surface Pro 2017 Type Cover, which +is where I confirmed that it's working. + +Patchset: surface-typecover +--- + drivers/hid/hid-multitouch.c | 100 ++++++++++++++++++++++++++++++++++- + 1 file changed, 98 insertions(+), 2 deletions(-) + +diff --git a/drivers/hid/hid-multitouch.c b/drivers/hid/hid-multitouch.c +index 3ea7cb1cda84..92fb053e0dd2 100644 +--- a/drivers/hid/hid-multitouch.c ++++ b/drivers/hid/hid-multitouch.c +@@ -34,7 +34,10 @@ + #include + #include + #include ++#include + #include ++#include ++#include + #include + #include + #include +@@ -47,6 +50,7 @@ MODULE_DESCRIPTION("HID multitouch panels"); + MODULE_LICENSE("GPL"); + + #include "hid-ids.h" ++#include "usbhid/usbhid.h" + + /* quirks to control the device */ + #define MT_QUIRK_NOT_SEEN_MEANS_UP BIT(0) +@@ -71,12 +75,15 @@ MODULE_LICENSE("GPL"); + #define MT_QUIRK_SEPARATE_APP_REPORT BIT(19) + #define MT_QUIRK_FORCE_MULTI_INPUT BIT(20) + #define MT_QUIRK_DISABLE_WAKEUP BIT(21) ++#define MT_QUIRK_HAS_TYPE_COVER_BACKLIGHT BIT(22) + + #define MT_INPUTMODE_TOUCHSCREEN 0x02 + #define MT_INPUTMODE_TOUCHPAD 0x03 + + #define MT_BUTTONTYPE_CLICKPAD 0 + ++#define MS_TYPE_COVER_FEATURE_REPORT_USAGE 0xff050086 ++ + enum latency_mode { + HID_LATENCY_NORMAL = 0, + HID_LATENCY_HIGH = 1, +@@ -168,6 +175,8 @@ struct mt_device { + + struct list_head applications; + struct list_head reports; ++ ++ struct notifier_block pm_notifier; + }; + + static void mt_post_parse_default_settings(struct mt_device *td, +@@ -210,6 +219,7 @@ static void mt_post_parse(struct mt_device *td, struct mt_application *app); + #define MT_CLS_GOOGLE 0x0111 + #define MT_CLS_RAZER_BLADE_STEALTH 0x0112 + #define MT_CLS_SMART_TECH 0x0113 ++#define MT_CLS_WIN_8_MS_SURFACE_TYPE_COVER 0x0114 + + #define MT_DEFAULT_MAXCONTACT 10 + #define MT_MAX_MAXCONTACT 250 +@@ -378,6 +388,16 @@ static const struct mt_class mt_classes[] = { + MT_QUIRK_CONTACT_CNT_ACCURATE | + MT_QUIRK_SEPARATE_APP_REPORT, + }, ++ { .name = MT_CLS_WIN_8_MS_SURFACE_TYPE_COVER, ++ .quirks = MT_QUIRK_HAS_TYPE_COVER_BACKLIGHT | ++ MT_QUIRK_ALWAYS_VALID | ++ MT_QUIRK_IGNORE_DUPLICATES | ++ MT_QUIRK_HOVERING | ++ MT_QUIRK_CONTACT_CNT_ACCURATE | ++ MT_QUIRK_STICKY_FINGERS | ++ MT_QUIRK_WIN8_PTP_BUTTONS, ++ .export_all_inputs = true ++ }, + { } + }; + +@@ -1690,6 +1710,69 @@ static void mt_expired_timeout(struct timer_list *t) + clear_bit(MT_IO_FLAGS_RUNNING, &td->mt_io_flags); + } + ++static void get_type_cover_backlight_field(struct hid_device *hdev, ++ struct hid_field **field) ++{ ++ struct hid_report_enum *rep_enum; ++ struct hid_report *rep; ++ struct hid_field *cur_field; ++ int i, j; ++ ++ rep_enum = &hdev->report_enum[HID_FEATURE_REPORT]; ++ list_for_each_entry(rep, &rep_enum->report_list, list) { ++ for (i = 0; i < rep->maxfield; i++) { ++ cur_field = rep->field[i]; ++ ++ for (j = 0; j < cur_field->maxusage; j++) { ++ if (cur_field->usage[j].hid ++ == MS_TYPE_COVER_FEATURE_REPORT_USAGE) { ++ *field = cur_field; ++ return; ++ } ++ } ++ } ++ } ++} ++ ++static void update_keyboard_backlight(struct hid_device *hdev, bool enabled) ++{ ++ struct usb_device *udev = hid_to_usb_dev(hdev); ++ struct hid_field *field = NULL; ++ ++ /* Wake up the device in case it's already suspended */ ++ pm_runtime_get_sync(&udev->dev); ++ ++ get_type_cover_backlight_field(hdev, &field); ++ if (!field) { ++ hid_err(hdev, "couldn't find backlight field\n"); ++ goto out; ++ } ++ ++ field->value[field->index] = enabled ? 0x01ff00ff : 0x00ff00ff; ++ hid_hw_request(hdev, field->report, HID_REQ_SET_REPORT); ++ ++out: ++ pm_runtime_put_sync(&udev->dev); ++} ++ ++static int mt_pm_notifier(struct notifier_block *notifier, ++ unsigned long pm_event, ++ void *unused) ++{ ++ struct mt_device *td = ++ container_of(notifier, struct mt_device, pm_notifier); ++ struct hid_device *hdev = td->hdev; ++ ++ if (td->mtclass.quirks & MT_QUIRK_HAS_TYPE_COVER_BACKLIGHT) { ++ if (pm_event == PM_SUSPEND_PREPARE) ++ update_keyboard_backlight(hdev, 0); ++ else if (pm_event == PM_POST_SUSPEND) ++ update_keyboard_backlight(hdev, 1); ++ } ++ ++ return NOTIFY_DONE; ++} ++ + static int mt_probe(struct hid_device *hdev, const struct hid_device_id *id) + { + int ret, i; +@@ -1713,6 +1796,9 @@ static int mt_probe(struct hid_device *hdev, const struct hid_device_id *id) + td->inputmode_value = MT_INPUTMODE_TOUCHSCREEN; + hid_set_drvdata(hdev, td); + ++ td->pm_notifier.notifier_call = mt_pm_notifier; ++ register_pm_notifier(&td->pm_notifier); ++ + INIT_LIST_HEAD(&td->applications); + INIT_LIST_HEAD(&td->reports); + +@@ -1742,15 +1828,19 @@ static int mt_probe(struct hid_device *hdev, const struct hid_device_id *id) + timer_setup(&td->release_timer, mt_expired_timeout, 0); + + ret = hid_parse(hdev); +- if (ret != 0) ++ if (ret != 0) { ++ unregister_pm_notifier(&td->pm_notifier); + return ret; ++ } + + if (mtclass->quirks & MT_QUIRK_FIX_CONST_CONTACT_ID) + mt_fix_const_fields(hdev, HID_DG_CONTACTID); + + ret = hid_hw_start(hdev, HID_CONNECT_DEFAULT); +- if (ret) ++ if (ret) { ++ unregister_pm_notifier(&td->pm_notifier); + return ret; ++ } + + ret = sysfs_create_group(&hdev->dev.kobj, &mt_attribute_group); + if (ret) +@@ -1802,6 +1892,7 @@ static void mt_remove(struct hid_device *hdev) + { + struct mt_device *td = hid_get_drvdata(hdev); + ++ unregister_pm_notifier(&td->pm_notifier); + del_timer_sync(&td->release_timer); + + sysfs_remove_group(&hdev->dev.kobj, &mt_attribute_group); +@@ -2159,6 +2250,11 @@ static const struct hid_device_id mt_devices[] = { + MT_USB_DEVICE(USB_VENDOR_ID_XIROKU, + USB_DEVICE_ID_XIROKU_CSR2) }, + ++ /* Microsoft Surface type cover */ ++ { .driver_data = MT_CLS_WIN_8_MS_SURFACE_TYPE_COVER, ++ HID_DEVICE(HID_BUS_ANY, HID_GROUP_ANY, ++ USB_VENDOR_ID_MICROSOFT, 0x09c0) }, ++ + /* Google MT devices */ + { .driver_data = MT_CLS_GOOGLE, + HID_DEVICE(HID_BUS_ANY, HID_GROUP_ANY, USB_VENDOR_ID_GOOGLE, +-- +2.33.0 + diff --git a/patches/5.14/0008-cameras.patch b/patches/5.14/0008-cameras.patch new file mode 100644 index 000000000..eba99f5b6 --- /dev/null +++ b/patches/5.14/0008-cameras.patch @@ -0,0 +1,3288 @@ +From ffcd7613df69ed5fcddb5c5879e45ff02fc0e5d6 Mon Sep 17 00:00:00 2001 +From: Daniel Scally +Date: Mon, 5 Apr 2021 23:56:53 +0100 +Subject: [PATCH] media: ipu3-cio2: Toggle sensor streaming in pm runtime ops + +The .suspend() and .resume() runtime_pm operations for the ipu3-cio2 +driver currently do not handle the sensor's stream. Setting .s_stream() on +or off for the sensor subdev means that sensors will pause and resume the +stream at the appropriate time even if their drivers don't implement those +operations. + +Signed-off-by: Daniel Scally +Patchset: cameras +--- + drivers/media/pci/intel/ipu3/ipu3-cio2-main.c | 15 ++++++++++++++- + 1 file changed, 14 insertions(+), 1 deletion(-) + +diff --git a/drivers/media/pci/intel/ipu3/ipu3-cio2-main.c b/drivers/media/pci/intel/ipu3/ipu3-cio2-main.c +index 47db0ee0fcbf..7bb86e246ebe 100644 +--- a/drivers/media/pci/intel/ipu3/ipu3-cio2-main.c ++++ b/drivers/media/pci/intel/ipu3/ipu3-cio2-main.c +@@ -1973,12 +1973,19 @@ static int __maybe_unused cio2_suspend(struct device *dev) + struct pci_dev *pci_dev = to_pci_dev(dev); + struct cio2_device *cio2 = pci_get_drvdata(pci_dev); + struct cio2_queue *q = cio2->cur_queue; ++ int r; + + dev_dbg(dev, "cio2 suspend\n"); + if (!cio2->streaming) + return 0; + + /* Stop stream */ ++ r = v4l2_subdev_call(q->sensor, video, s_stream, 0); ++ if (r) { ++ dev_err(dev, "failed to stop sensor streaming\n"); ++ return r; ++ } ++ + cio2_hw_exit(cio2, q); + synchronize_irq(pci_dev->irq); + +@@ -2013,8 +2020,14 @@ static int __maybe_unused cio2_resume(struct device *dev) + } + + r = cio2_hw_init(cio2, q); +- if (r) ++ if (r) { + dev_err(dev, "fail to init cio2 hw\n"); ++ return r; ++ } ++ ++ r = v4l2_subdev_call(q->sensor, video, s_stream, 1); ++ if (r) ++ dev_err(dev, "fail to start sensor streaming\n"); + + return r; + } +-- +2.33.0 + +From 8939a9c77027607e523f4e910a44b68077581763 Mon Sep 17 00:00:00 2001 +From: Daniel Scally +Date: Mon, 5 Apr 2021 23:56:54 +0100 +Subject: [PATCH] media: i2c: Add support for ov5693 sensor + +The OV5693 is a 5 Mpx CMOS image sensor, connected via MIPI CSI-2. The +chip is capable of a single lane configuration, but currently only two +lanes are supported. + +Most of the sensor's features are supported, with the main exception +being the lens correction algorithm. + +The driver provides all mandatory, optional and recommended V4L2 controls +for maximum compatibility with libcamera. + +Signed-off-by: Daniel Scally +Patchset: cameras +--- + MAINTAINERS | 7 + + drivers/media/i2c/Kconfig | 11 + + drivers/media/i2c/Makefile | 1 + + drivers/media/i2c/ov5693.c | 1557 ++++++++++++++++++++++++++++++++++++ + 4 files changed, 1576 insertions(+) + create mode 100644 drivers/media/i2c/ov5693.c + +diff --git a/MAINTAINERS b/MAINTAINERS +index d7b4f32875a9..db66227a14f8 100644 +--- a/MAINTAINERS ++++ b/MAINTAINERS +@@ -13751,6 +13751,13 @@ S: Maintained + T: git git://linuxtv.org/media_tree.git + F: drivers/media/i2c/ov5675.c + ++OMNIVISION OV5693 SENSOR DRIVER ++M: Daniel Scally ++L: linux-media@vger.kernel.org ++S: Maintained ++T: git git://linuxtv.org/media_tree.git ++F: drivers/media/i2c/ov5693.c ++ + OMNIVISION OV5695 SENSOR DRIVER + M: Shunqian Zheng + L: linux-media@vger.kernel.org +diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig +index 588f8eb95984..dee06f535f2c 100644 +--- a/drivers/media/i2c/Kconfig ++++ b/drivers/media/i2c/Kconfig +@@ -1014,6 +1014,17 @@ config VIDEO_OV5675 + To compile this driver as a module, choose M here: the + module will be called ov5675. + ++config VIDEO_OV5693 ++ tristate "OmniVision OV5693 sensor support" ++ depends on I2C && VIDEO_V4L2 ++ select V4L2_FWNODE ++ help ++ This is a Video4Linux2 sensor driver for the OmniVision ++ OV5693 camera. ++ ++ To compile this driver as a module, choose M here: the ++ module will be called ov5693. ++ + config VIDEO_OV5695 + tristate "OmniVision OV5695 sensor support" + depends on I2C && VIDEO_V4L2 +diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile +index 1168fa6b84ed..011e90c1a288 100644 +--- a/drivers/media/i2c/Makefile ++++ b/drivers/media/i2c/Makefile +@@ -75,6 +75,7 @@ obj-$(CONFIG_VIDEO_OV5647) += ov5647.o + obj-$(CONFIG_VIDEO_OV5648) += ov5648.o + obj-$(CONFIG_VIDEO_OV5670) += ov5670.o + obj-$(CONFIG_VIDEO_OV5675) += ov5675.o ++obj-$(CONFIG_VIDEO_OV5693) += ov5693.o + obj-$(CONFIG_VIDEO_OV5695) += ov5695.o + obj-$(CONFIG_VIDEO_OV6650) += ov6650.o + obj-$(CONFIG_VIDEO_OV7251) += ov7251.o +diff --git a/drivers/media/i2c/ov5693.c b/drivers/media/i2c/ov5693.c +new file mode 100644 +index 000000000000..9499ee10f56c +--- /dev/null ++++ b/drivers/media/i2c/ov5693.c +@@ -0,0 +1,1557 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (c) 2013 Intel Corporation. All Rights Reserved. ++ * ++ * Adapted from the atomisp-ov5693 driver, with contributions from: ++ * ++ * Daniel Scally ++ * Jean-Michel Hautbois ++ * Fabian Wuthrich ++ * Tsuchiya Yuto ++ * Jordan Hand ++ * Jake Day ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++/* System Control */ ++#define OV5693_SW_RESET_REG 0x0103 ++#define OV5693_SW_STREAM_REG 0x0100 ++#define OV5693_START_STREAMING 0x01 ++#define OV5693_STOP_STREAMING 0x00 ++#define OV5693_SW_RESET 0x01 ++ ++#define OV5693_REG_CHIP_ID_H 0x300a ++#define OV5693_REG_CHIP_ID_L 0x300b ++/* Yes, this is right. The datasheet for the OV5693 gives its ID as 0x5690 */ ++#define OV5693_CHIP_ID 0x5690 ++ ++/* Exposure */ ++#define OV5693_EXPOSURE_L_CTRL_HH_REG 0x3500 ++#define OV5693_EXPOSURE_L_CTRL_H_REG 0x3501 ++#define OV5693_EXPOSURE_L_CTRL_L_REG 0x3502 ++#define OV5693_EXPOSURE_CTRL_HH(v) (((v) & GENMASK(14, 12)) >> 12) ++#define OV5693_EXPOSURE_CTRL_H(v) (((v) & GENMASK(11, 4)) >> 4) ++#define OV5693_EXPOSURE_CTRL_L(v) (((v) & GENMASK(3, 0)) << 4) ++#define OV5693_INTEGRATION_TIME_MARGIN 8 ++#define OV5693_EXPOSURE_MIN 1 ++#define OV5693_EXPOSURE_STEP 1 ++ ++/* Analogue Gain */ ++#define OV5693_GAIN_CTRL_H_REG 0x350a ++#define OV5693_GAIN_CTRL_H(v) (((v) >> 4) & GENMASK(2, 0)) ++#define OV5693_GAIN_CTRL_L_REG 0x350b ++#define OV5693_GAIN_CTRL_L(v) (((v) << 4) & GENMASK(7, 4)) ++#define OV5693_GAIN_MIN 1 ++#define OV5693_GAIN_MAX 127 ++#define OV5693_GAIN_DEF 8 ++#define OV5693_GAIN_STEP 1 ++ ++/* Digital Gain */ ++#define OV5693_MWB_RED_GAIN_H_REG 0x3400 ++#define OV5693_MWB_RED_GAIN_L_REG 0x3401 ++#define OV5693_MWB_GREEN_GAIN_H_REG 0x3402 ++#define OV5693_MWB_GREEN_GAIN_L_REG 0x3403 ++#define OV5693_MWB_BLUE_GAIN_H_REG 0x3404 ++#define OV5693_MWB_BLUE_GAIN_L_REG 0x3405 ++#define OV5693_MWB_GAIN_H_CTRL(v) (((v) >> 8) & GENMASK(3, 0)) ++#define OV5693_MWB_GAIN_L_CTRL(v) ((v) & GENMASK(7, 0)) ++#define OV5693_MWB_GAIN_MAX 0x0fff ++#define OV5693_DIGITAL_GAIN_MIN 1 ++#define OV5693_DIGITAL_GAIN_MAX 4095 ++#define OV5693_DIGITAL_GAIN_DEF 1024 ++#define OV5693_DIGITAL_GAIN_STEP 1 ++ ++/* Timing and Format */ ++#define OV5693_CROP_START_X_H_REG 0x3800 ++#define OV5693_CROP_START_X_H(v) (((v) & GENMASK(12, 8)) >> 8) ++#define OV5693_CROP_START_X_L_REG 0x3801 ++#define OV5693_CROP_START_X_L(v) ((v) & GENMASK(7, 0)) ++ ++#define OV5693_CROP_START_Y_H_REG 0x3802 ++#define OV5693_CROP_START_Y_H(v) (((v) & GENMASK(11, 8)) >> 8) ++#define OV5693_CROP_START_Y_L_REG 0x3803 ++#define OV5693_CROP_START_Y_L(v) ((v) & GENMASK(7, 0)) ++ ++#define OV5693_CROP_END_X_H_REG 0x3804 ++#define OV5693_CROP_END_X_H(v) (((v) & GENMASK(12, 8)) >> 8) ++#define OV5693_CROP_END_X_L_REG 0x3805 ++#define OV5693_CROP_END_X_L(v) ((v) & GENMASK(7, 0)) ++ ++#define OV5693_CROP_END_Y_H_REG 0x3806 ++#define OV5693_CROP_END_Y_H(v) (((v) & GENMASK(11, 8)) >> 8) ++#define OV5693_CROP_END_Y_L_REG 0x3807 ++#define OV5693_CROP_END_Y_L(v) ((v) & GENMASK(7, 0)) ++ ++#define OV5693_OUTPUT_SIZE_X_H_REG 0x3808 ++#define OV5693_OUTPUT_SIZE_X_H(v) (((v) & GENMASK(15, 8)) >> 8) ++#define OV5693_OUTPUT_SIZE_X_L_REG 0x3809 ++#define OV5693_OUTPUT_SIZE_X_L(v) ((v) & GENMASK(7, 0)) ++ ++#define OV5693_OUTPUT_SIZE_Y_H_REG 0x380a ++#define OV5693_OUTPUT_SIZE_Y_H(v) (((v) & GENMASK(15, 8)) >> 8) ++#define OV5693_OUTPUT_SIZE_Y_L_REG 0x380b ++#define OV5693_OUTPUT_SIZE_Y_L(v) ((v) & GENMASK(7, 0)) ++ ++#define OV5693_TIMING_HTS_H_REG 0x380c ++#define OV5693_TIMING_HTS_H(v) (((v) & GENMASK(15, 8)) >> 8) ++#define OV5693_TIMING_HTS_L_REG 0x380d ++#define OV5693_TIMING_HTS_L(v) ((v) & GENMASK(7, 0)) ++#define OV5693_FIXED_PPL 2688U ++ ++#define OV5693_TIMING_VTS_H_REG 0x380e ++#define OV5693_TIMING_VTS_H(v) (((v) & GENMASK(15, 8)) >> 8) ++#define OV5693_TIMING_VTS_L_REG 0x380f ++#define OV5693_TIMING_VTS_L(v) ((v) & GENMASK(7, 0)) ++#define OV5693_TIMING_MAX_VTS 0xffff ++#define OV5693_TIMING_MIN_VTS 0x04 ++ ++#define OV5693_OFFSET_START_X_H_REG 0x3810 ++#define OV5693_OFFSET_START_X_H(v) (((v) & GENMASK(15, 8)) >> 8) ++#define OV5693_OFFSET_START_X_L_REG 0x3811 ++#define OV5693_OFFSET_START_X_L(v) ((v) & GENMASK(7, 0)) ++ ++#define OV5693_OFFSET_START_Y_H_REG 0x3812 ++#define OV5693_OFFSET_START_Y_H(v) (((v) & GENMASK(15, 8)) >> 8) ++#define OV5693_OFFSET_START_Y_L_REG 0x3813 ++#define OV5693_OFFSET_START_Y_L(v) ((v) & GENMASK(7, 0)) ++ ++#define OV5693_SUB_INC_X_REG 0x3814 ++#define OV5693_SUB_INC_Y_REG 0x3815 ++ ++#define OV5693_FORMAT1_REG 0x3820 ++#define OV5693_FORMAT1_FLIP_VERT_ISP_EN BIT(2) ++#define OV5693_FORMAT1_FLIP_VERT_SENSOR_EN BIT(1) ++#define OV5693_FORMAT1_VBIN_EN BIT(0) ++#define OV5693_FORMAT2_REG 0x3821 ++#define OV5693_FORMAT2_HDR_EN BIT(7) ++#define OV5693_FORMAT2_FLIP_HORZ_ISP_EN BIT(2) ++#define OV5693_FORMAT2_FLIP_HORZ_SENSOR_EN BIT(1) ++#define OV5693_FORMAT2_HBIN_EN BIT(0) ++ ++#define OV5693_ISP_CTRL2_REG 0x5002 ++#define OV5693_ISP_SCALE_ENABLE BIT(7) ++ ++/* Pixel Array */ ++#define OV5693_NATIVE_WIDTH 2624 ++#define OV5693_NATIVE_HEIGHT 1956 ++#define OV5693_NATIVE_START_LEFT 0 ++#define OV5693_NATIVE_START_TOP 0 ++#define OV5693_ACTIVE_WIDTH 2592 ++#define OV5693_ACTIVE_HEIGHT 1944 ++#define OV5693_ACTIVE_START_LEFT 16 ++#define OV5693_ACTIVE_START_TOP 6 ++#define OV5693_MIN_CROP_WIDTH 2 ++#define OV5693_MIN_CROP_HEIGHT 2 ++ ++/* Test Pattern */ ++#define OV5693_TEST_PATTERN_REG 0x5e00 ++#define OV5693_TEST_PATTERN_ENABLE BIT(7) ++#define OV5693_TEST_PATTERN_ROLLING BIT(6) ++#define OV5693_TEST_PATTERN_RANDOM 0x01 ++#define OV5693_TEST_PATTERN_BARS 0x00 ++ ++/* System Frequencies */ ++#define OV5693_XVCLK_FREQ 19200000 ++#define OV5693_LINK_FREQ_400MHZ 400000000 ++#define OV5693_PIXEL_RATE 160000000 ++ ++/* Miscellaneous */ ++#define OV5693_NUM_SUPPLIES 2 ++ ++#define to_ov5693_sensor(x) container_of(x, struct ov5693_device, sd) ++ ++struct ov5693_reg { ++ u16 reg; ++ u8 val; ++}; ++ ++struct ov5693_reg_list { ++ u32 num_regs; ++ const struct ov5693_reg *regs; ++}; ++ ++struct ov5693_device { ++ struct i2c_client *client; ++ struct device *dev; ++ ++ /* Protect against concurrent changes to controls */ ++ struct mutex lock; ++ ++ struct gpio_desc *reset; ++ struct gpio_desc *powerdown; ++ struct regulator_bulk_data supplies[OV5693_NUM_SUPPLIES]; ++ struct clk *clk; ++ ++ struct ov5693_mode { ++ struct v4l2_rect crop; ++ struct v4l2_mbus_framefmt format; ++ bool binning_x; ++ bool binning_y; ++ unsigned int inc_x_odd; ++ unsigned int inc_y_odd; ++ unsigned int vts; ++ } mode; ++ bool streaming; ++ ++ struct v4l2_subdev sd; ++ struct media_pad pad; ++ ++ struct ov5693_v4l2_ctrls { ++ struct v4l2_ctrl_handler handler; ++ struct v4l2_ctrl *link_freq; ++ struct v4l2_ctrl *pixel_rate; ++ struct v4l2_ctrl *exposure; ++ struct v4l2_ctrl *analogue_gain; ++ struct v4l2_ctrl *digital_gain; ++ struct v4l2_ctrl *hflip; ++ struct v4l2_ctrl *vflip; ++ struct v4l2_ctrl *hblank; ++ struct v4l2_ctrl *vblank; ++ struct v4l2_ctrl *test_pattern; ++ } ctrls; ++}; ++ ++static const struct ov5693_reg ov5693_global_regs[] = { ++ {0x3016, 0xf0}, ++ {0x3017, 0xf0}, ++ {0x3018, 0xf0}, ++ {0x3022, 0x01}, ++ {0x3028, 0x44}, ++ {0x3098, 0x02}, ++ {0x3099, 0x19}, ++ {0x309a, 0x02}, ++ {0x309b, 0x01}, ++ {0x309c, 0x00}, ++ {0x30a0, 0xd2}, ++ {0x30a2, 0x01}, ++ {0x30b2, 0x00}, ++ {0x30b3, 0x7d}, ++ {0x30b4, 0x03}, ++ {0x30b5, 0x04}, ++ {0x30b6, 0x01}, ++ {0x3104, 0x21}, ++ {0x3106, 0x00}, ++ {0x3406, 0x01}, ++ {0x3503, 0x07}, ++ {0x350b, 0x40}, ++ {0x3601, 0x0a}, ++ {0x3602, 0x38}, ++ {0x3612, 0x80}, ++ {0x3620, 0x54}, ++ {0x3621, 0xc7}, ++ {0x3622, 0x0f}, ++ {0x3625, 0x10}, ++ {0x3630, 0x55}, ++ {0x3631, 0xf4}, ++ {0x3632, 0x00}, ++ {0x3633, 0x34}, ++ {0x3634, 0x02}, ++ {0x364d, 0x0d}, ++ {0x364f, 0xdd}, ++ {0x3660, 0x04}, ++ {0x3662, 0x10}, ++ {0x3663, 0xf1}, ++ {0x3665, 0x00}, ++ {0x3666, 0x20}, ++ {0x3667, 0x00}, ++ {0x366a, 0x80}, ++ {0x3680, 0xe0}, ++ {0x3681, 0x00}, ++ {0x3700, 0x42}, ++ {0x3701, 0x14}, ++ {0x3702, 0xa0}, ++ {0x3703, 0xd8}, ++ {0x3704, 0x78}, ++ {0x3705, 0x02}, ++ {0x370a, 0x00}, ++ {0x370b, 0x20}, ++ {0x370c, 0x0c}, ++ {0x370d, 0x11}, ++ {0x370e, 0x00}, ++ {0x370f, 0x40}, ++ {0x3710, 0x00}, ++ {0x371a, 0x1c}, ++ {0x371b, 0x05}, ++ {0x371c, 0x01}, ++ {0x371e, 0xa1}, ++ {0x371f, 0x0c}, ++ {0x3721, 0x00}, ++ {0x3724, 0x10}, ++ {0x3726, 0x00}, ++ {0x372a, 0x01}, ++ {0x3730, 0x10}, ++ {0x3738, 0x22}, ++ {0x3739, 0xe5}, ++ {0x373a, 0x50}, ++ {0x373b, 0x02}, ++ {0x373c, 0x41}, ++ {0x373f, 0x02}, ++ {0x3740, 0x42}, ++ {0x3741, 0x02}, ++ {0x3742, 0x18}, ++ {0x3743, 0x01}, ++ {0x3744, 0x02}, ++ {0x3747, 0x10}, ++ {0x374c, 0x04}, ++ {0x3751, 0xf0}, ++ {0x3752, 0x00}, ++ {0x3753, 0x00}, ++ {0x3754, 0xc0}, ++ {0x3755, 0x00}, ++ {0x3756, 0x1a}, ++ {0x3758, 0x00}, ++ {0x3759, 0x0f}, ++ {0x376b, 0x44}, ++ {0x375c, 0x04}, ++ {0x3774, 0x10}, ++ {0x3776, 0x00}, ++ {0x377f, 0x08}, ++ {0x3780, 0x22}, ++ {0x3781, 0x0c}, ++ {0x3784, 0x2c}, ++ {0x3785, 0x1e}, ++ {0x378f, 0xf5}, ++ {0x3791, 0xb0}, ++ {0x3795, 0x00}, ++ {0x3796, 0x64}, ++ {0x3797, 0x11}, ++ {0x3798, 0x30}, ++ {0x3799, 0x41}, ++ {0x379a, 0x07}, ++ {0x379b, 0xb0}, ++ {0x379c, 0x0c}, ++ {0x3a04, 0x06}, ++ {0x3a05, 0x14}, ++ {0x3e07, 0x20}, ++ {0x4000, 0x08}, ++ {0x4001, 0x04}, ++ {0x4004, 0x08}, ++ {0x4006, 0x20}, ++ {0x4008, 0x24}, ++ {0x4009, 0x10}, ++ {0x4058, 0x00}, ++ {0x4101, 0xb2}, ++ {0x4307, 0x31}, ++ {0x4511, 0x05}, ++ {0x4512, 0x01}, ++ {0x481f, 0x30}, ++ {0x4826, 0x2c}, ++ {0x4d02, 0xfd}, ++ {0x4d03, 0xf5}, ++ {0x4d04, 0x0c}, ++ {0x4d05, 0xcc}, ++ {0x4837, 0x0a}, ++ {0x5003, 0x20}, ++ {0x5013, 0x00}, ++ {0x5842, 0x01}, ++ {0x5843, 0x2b}, ++ {0x5844, 0x01}, ++ {0x5845, 0x92}, ++ {0x5846, 0x01}, ++ {0x5847, 0x8f}, ++ {0x5848, 0x01}, ++ {0x5849, 0x0c}, ++ {0x5e10, 0x0c}, ++ {0x3820, 0x00}, ++ {0x3821, 0x1e}, ++ {0x5041, 0x14} ++}; ++ ++static const struct ov5693_reg_list ov5693_global_setting = { ++ .num_regs = ARRAY_SIZE(ov5693_global_regs), ++ .regs = ov5693_global_regs, ++}; ++ ++static const struct v4l2_rect ov5693_default_crop = { ++ .left = OV5693_ACTIVE_START_LEFT, ++ .top = OV5693_ACTIVE_START_TOP, ++ .width = OV5693_ACTIVE_WIDTH, ++ .height = OV5693_ACTIVE_HEIGHT, ++}; ++ ++static const struct v4l2_mbus_framefmt ov5693_default_fmt = { ++ .width = OV5693_ACTIVE_WIDTH, ++ .height = OV5693_ACTIVE_HEIGHT, ++ .code = MEDIA_BUS_FMT_SBGGR10_1X10, ++}; ++ ++static const s64 link_freq_menu_items[] = { ++ OV5693_LINK_FREQ_400MHZ ++}; ++ ++static const char * const ov5693_supply_names[] = { ++ "avdd", ++ "dovdd", ++}; ++ ++static const char * const ov5693_test_pattern_menu[] = { ++ "Disabled", ++ "Random Data", ++ "Colour Bars", ++ "Colour Bars with Rolling Bar" ++}; ++ ++static const u8 ov5693_test_pattern_bits[] = { ++ 0, ++ OV5693_TEST_PATTERN_ENABLE | OV5693_TEST_PATTERN_RANDOM, ++ OV5693_TEST_PATTERN_ENABLE | OV5693_TEST_PATTERN_BARS, ++ OV5693_TEST_PATTERN_ENABLE | OV5693_TEST_PATTERN_BARS | ++ OV5693_TEST_PATTERN_ROLLING, ++}; ++ ++/* I2C I/O Operations */ ++ ++static int ov5693_read_reg(struct ov5693_device *ov5693, u16 addr, u8 *value) ++{ ++ struct i2c_client *client = ov5693->client; ++ struct i2c_msg msgs[2]; ++ u8 addr_buf[2]; ++ u8 data_buf; ++ int ret; ++ ++ put_unaligned_be16(addr, addr_buf); ++ ++ /* Write register address */ ++ msgs[0].addr = client->addr; ++ msgs[0].flags = 0; ++ msgs[0].len = ARRAY_SIZE(addr_buf); ++ msgs[0].buf = addr_buf; ++ ++ /* Read register value */ ++ msgs[1].addr = client->addr; ++ msgs[1].flags = I2C_M_RD; ++ msgs[1].len = 1; ++ msgs[1].buf = &data_buf; ++ ++ ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); ++ if (ret != ARRAY_SIZE(msgs)) ++ return -EIO; ++ ++ *value = data_buf; ++ ++ return 0; ++} ++ ++static void ov5693_write_reg(struct ov5693_device *ov5693, u16 addr, u8 value, ++ int *error) ++{ ++ unsigned char data[3] = { addr >> 8, addr & 0xff, value }; ++ int ret; ++ ++ if (*error < 0) ++ return; ++ ++ ret = i2c_master_send(ov5693->client, data, sizeof(data)); ++ if (ret < 0) { ++ dev_dbg(ov5693->dev, "i2c send error at address 0x%04x: %d\n", ++ addr, ret); ++ *error = ret; ++ } ++} ++ ++static int ov5693_write_reg_array(struct ov5693_device *ov5693, ++ const struct ov5693_reg_list *reglist) ++{ ++ unsigned int i; ++ int ret = 0; ++ ++ for (i = 0; i < reglist->num_regs; i++) ++ ov5693_write_reg(ov5693, reglist->regs[i].reg, ++ reglist->regs[i].val, &ret); ++ ++ return ret; ++} ++ ++static int ov5693_update_bits(struct ov5693_device *ov5693, u16 address, ++ u16 mask, u16 bits) ++{ ++ u8 value = 0; ++ int ret; ++ ++ ret = ov5693_read_reg(ov5693, address, &value); ++ if (ret) ++ return ret; ++ ++ value &= ~mask; ++ value |= bits; ++ ++ ov5693_write_reg(ov5693, address, value, &ret); ++ ++ return ret; ++} ++ ++/* V4L2 Controls Functions */ ++ ++static int ov5693_flip_vert_configure(struct ov5693_device *ov5693, bool enable) ++{ ++ u8 bits = OV5693_FORMAT1_FLIP_VERT_ISP_EN | ++ OV5693_FORMAT1_FLIP_VERT_SENSOR_EN; ++ int ret; ++ ++ ret = ov5693_update_bits(ov5693, OV5693_FORMAT1_REG, bits, ++ enable ? bits : 0); ++ if (ret) ++ return ret; ++ ++ return 0; ++} ++ ++static int ov5693_flip_horz_configure(struct ov5693_device *ov5693, bool enable) ++{ ++ u8 bits = OV5693_FORMAT2_FLIP_HORZ_ISP_EN | ++ OV5693_FORMAT2_FLIP_HORZ_SENSOR_EN; ++ int ret; ++ ++ ret = ov5693_update_bits(ov5693, OV5693_FORMAT2_REG, bits, ++ enable ? bits : 0); ++ if (ret) ++ return ret; ++ ++ return 0; ++} ++ ++static int ov5693_get_exposure(struct ov5693_device *ov5693, s32 *value) ++{ ++ u8 exposure_hh = 0, exposure_h = 0, exposure_l = 0; ++ int ret; ++ ++ ret = ov5693_read_reg(ov5693, OV5693_EXPOSURE_L_CTRL_HH_REG, &exposure_hh); ++ if (ret) ++ return ret; ++ ++ ret = ov5693_read_reg(ov5693, OV5693_EXPOSURE_L_CTRL_H_REG, &exposure_h); ++ if (ret) ++ return ret; ++ ++ ret = ov5693_read_reg(ov5693, OV5693_EXPOSURE_L_CTRL_L_REG, &exposure_l); ++ if (ret) ++ return ret; ++ ++ /* The lowest 4 bits are unsupported fractional bits */ ++ *value = ((exposure_hh << 16) | (exposure_h << 8) | exposure_l) >> 4; ++ ++ return 0; ++} ++ ++static int ov5693_exposure_configure(struct ov5693_device *ov5693, u32 exposure) ++{ ++ int ret = 0; ++ ++ ov5693_write_reg(ov5693, OV5693_EXPOSURE_L_CTRL_HH_REG, ++ OV5693_EXPOSURE_CTRL_HH(exposure), &ret); ++ ov5693_write_reg(ov5693, OV5693_EXPOSURE_L_CTRL_H_REG, ++ OV5693_EXPOSURE_CTRL_H(exposure), &ret); ++ ov5693_write_reg(ov5693, OV5693_EXPOSURE_L_CTRL_L_REG, ++ OV5693_EXPOSURE_CTRL_L(exposure), &ret); ++ ++ return ret; ++} ++ ++static int ov5693_get_gain(struct ov5693_device *ov5693, u32 *gain) ++{ ++ u8 gain_l = 0, gain_h = 0; ++ int ret; ++ ++ ret = ov5693_read_reg(ov5693, OV5693_GAIN_CTRL_H_REG, &gain_h); ++ if (ret) ++ return ret; ++ ++ ret = ov5693_read_reg(ov5693, OV5693_GAIN_CTRL_L_REG, &gain_l); ++ if (ret) ++ return ret; ++ ++ /* As with exposure, the lowest 4 bits are fractional bits. */ ++ *gain = ((gain_h << 8) | gain_l) >> 4; ++ ++ return ret; ++} ++ ++static int ov5693_digital_gain_configure(struct ov5693_device *ov5693, u32 gain) ++{ ++ int ret = 0; ++ ++ ov5693_write_reg(ov5693, OV5693_MWB_RED_GAIN_H_REG, ++ OV5693_MWB_GAIN_H_CTRL(gain), &ret); ++ ov5693_write_reg(ov5693, OV5693_MWB_RED_GAIN_L_REG, ++ OV5693_MWB_GAIN_L_CTRL(gain), &ret); ++ ov5693_write_reg(ov5693, OV5693_MWB_GREEN_GAIN_H_REG, ++ OV5693_MWB_GAIN_H_CTRL(gain), &ret); ++ ov5693_write_reg(ov5693, OV5693_MWB_GREEN_GAIN_L_REG, ++ OV5693_MWB_GAIN_L_CTRL(gain), &ret); ++ ov5693_write_reg(ov5693, OV5693_MWB_BLUE_GAIN_H_REG, ++ OV5693_MWB_GAIN_H_CTRL(gain), &ret); ++ ov5693_write_reg(ov5693, OV5693_MWB_BLUE_GAIN_L_REG, ++ OV5693_MWB_GAIN_L_CTRL(gain), &ret); ++ ++ return ret; ++} ++ ++static int ov5693_analog_gain_configure(struct ov5693_device *ov5693, u32 gain) ++{ ++ int ret = 0; ++ ++ ov5693_write_reg(ov5693, OV5693_GAIN_CTRL_L_REG, ++ OV5693_GAIN_CTRL_L(gain), &ret); ++ ov5693_write_reg(ov5693, OV5693_GAIN_CTRL_H_REG, ++ OV5693_GAIN_CTRL_H(gain), &ret); ++ ++ return ret; ++} ++ ++static int ov5693_vts_configure(struct ov5693_device *ov5693, u32 vblank) ++{ ++ u16 vts = ov5693->mode.format.height + vblank; ++ int ret = 0; ++ ++ ov5693_write_reg(ov5693, OV5693_TIMING_VTS_H_REG, ++ OV5693_TIMING_VTS_H(vts), &ret); ++ ov5693_write_reg(ov5693, OV5693_TIMING_VTS_L_REG, ++ OV5693_TIMING_VTS_L(vts), &ret); ++ ++ return ret; ++} ++ ++static int ov5693_test_pattern_configure(struct ov5693_device *ov5693, u32 idx) ++{ ++ int ret = 0; ++ ++ ov5693_write_reg(ov5693, OV5693_TEST_PATTERN_REG, ++ ov5693_test_pattern_bits[idx], &ret); ++ ++ return ret; ++} ++ ++static int ov5693_s_ctrl(struct v4l2_ctrl *ctrl) ++{ ++ struct ov5693_device *ov5693 = ++ container_of(ctrl->handler, struct ov5693_device, ctrls.handler); ++ int ret = 0; ++ ++ /* If VBLANK is altered we need to update exposure to compensate */ ++ if (ctrl->id == V4L2_CID_VBLANK) { ++ int exposure_max; ++ ++ exposure_max = ov5693->mode.format.height + ctrl->val - ++ OV5693_INTEGRATION_TIME_MARGIN; ++ __v4l2_ctrl_modify_range(ov5693->ctrls.exposure, ++ ov5693->ctrls.exposure->minimum, ++ exposure_max, ++ ov5693->ctrls.exposure->step, ++ min(ov5693->ctrls.exposure->val, exposure_max)); ++ } ++ ++ /* Only apply changes to the controls if the device is powered up */ ++ if (!pm_runtime_get_if_in_use(ov5693->dev)) ++ return 0; ++ ++ switch (ctrl->id) { ++ case V4L2_CID_EXPOSURE: ++ ret = ov5693_exposure_configure(ov5693, ctrl->val); ++ break; ++ case V4L2_CID_ANALOGUE_GAIN: ++ ret = ov5693_analog_gain_configure(ov5693, ctrl->val); ++ break; ++ case V4L2_CID_DIGITAL_GAIN: ++ ret = ov5693_digital_gain_configure(ov5693, ctrl->val); ++ break; ++ case V4L2_CID_HFLIP: ++ ret = ov5693_flip_horz_configure(ov5693, !!ctrl->val); ++ break; ++ case V4L2_CID_VFLIP: ++ ret = ov5693_flip_vert_configure(ov5693, !!ctrl->val); ++ break; ++ case V4L2_CID_VBLANK: ++ ret = ov5693_vts_configure(ov5693, ctrl->val); ++ break; ++ case V4L2_CID_TEST_PATTERN: ++ ret = ov5693_test_pattern_configure(ov5693, ctrl->val); ++ break; ++ default: ++ ret = -EINVAL; ++ } ++ ++ pm_runtime_put(ov5693->dev); ++ ++ return ret; ++} ++ ++static int ov5693_g_volatile_ctrl(struct v4l2_ctrl *ctrl) ++{ ++ struct ov5693_device *ov5693 = ++ container_of(ctrl->handler, struct ov5693_device, ctrls.handler); ++ ++ switch (ctrl->id) { ++ case V4L2_CID_EXPOSURE_ABSOLUTE: ++ return ov5693_get_exposure(ov5693, &ctrl->val); ++ case V4L2_CID_AUTOGAIN: ++ return ov5693_get_gain(ov5693, &ctrl->val); ++ default: ++ return -EINVAL; ++ } ++} ++ ++static const struct v4l2_ctrl_ops ov5693_ctrl_ops = { ++ .s_ctrl = ov5693_s_ctrl, ++ .g_volatile_ctrl = ov5693_g_volatile_ctrl ++}; ++ ++/* System Control Functions */ ++ ++static int ov5693_mode_configure(struct ov5693_device *ov5693) ++{ ++ const struct ov5693_mode *mode = &ov5693->mode; ++ int ret = 0; ++ ++ /* Crop Start X */ ++ ov5693_write_reg(ov5693, OV5693_CROP_START_X_H_REG, ++ OV5693_CROP_START_X_H(mode->crop.left), &ret); ++ ov5693_write_reg(ov5693, OV5693_CROP_START_X_L_REG, ++ OV5693_CROP_START_X_L(mode->crop.left), &ret); ++ ++ /* Offset X */ ++ ov5693_write_reg(ov5693, OV5693_OFFSET_START_X_H_REG, ++ OV5693_OFFSET_START_X_H(0), &ret); ++ ov5693_write_reg(ov5693, OV5693_OFFSET_START_X_L_REG, ++ OV5693_OFFSET_START_X_L(0), &ret); ++ ++ /* Output Size X */ ++ ov5693_write_reg(ov5693, OV5693_OUTPUT_SIZE_X_H_REG, ++ OV5693_OUTPUT_SIZE_X_H(mode->format.width), &ret); ++ ov5693_write_reg(ov5693, OV5693_OUTPUT_SIZE_X_L_REG, ++ OV5693_OUTPUT_SIZE_X_L(mode->format.width), &ret); ++ ++ /* Crop End X */ ++ ov5693_write_reg(ov5693, OV5693_CROP_END_X_H_REG, ++ OV5693_CROP_END_X_H(mode->crop.left + mode->crop.width), ++ &ret); ++ ov5693_write_reg(ov5693, OV5693_CROP_END_X_L_REG, ++ OV5693_CROP_END_X_L(mode->crop.left + mode->crop.width), ++ &ret); ++ ++ /* Horizontal Total Size */ ++ ov5693_write_reg(ov5693, OV5693_TIMING_HTS_H_REG, ++ OV5693_TIMING_HTS_H(OV5693_FIXED_PPL), &ret); ++ ov5693_write_reg(ov5693, OV5693_TIMING_HTS_L_REG, ++ OV5693_TIMING_HTS_L(OV5693_FIXED_PPL), &ret); ++ ++ /* Crop Start Y */ ++ ov5693_write_reg(ov5693, OV5693_CROP_START_Y_H_REG, ++ OV5693_CROP_START_Y_H(mode->crop.top), &ret); ++ ov5693_write_reg(ov5693, OV5693_CROP_START_Y_L_REG, ++ OV5693_CROP_START_Y_L(mode->crop.top), &ret); ++ ++ /* Offset Y */ ++ ov5693_write_reg(ov5693, OV5693_OFFSET_START_Y_H_REG, ++ OV5693_OFFSET_START_Y_H(0), &ret); ++ ov5693_write_reg(ov5693, OV5693_OFFSET_START_Y_L_REG, ++ OV5693_OFFSET_START_Y_L(0), &ret); ++ ++ /* Output Size Y */ ++ ov5693_write_reg(ov5693, OV5693_OUTPUT_SIZE_Y_H_REG, ++ OV5693_OUTPUT_SIZE_Y_H(mode->format.height), &ret); ++ ov5693_write_reg(ov5693, OV5693_OUTPUT_SIZE_Y_L_REG, ++ OV5693_OUTPUT_SIZE_Y_L(mode->format.height), &ret); ++ ++ /* Crop End Y */ ++ ov5693_write_reg(ov5693, OV5693_CROP_END_Y_H_REG, ++ OV5693_CROP_END_Y_H(mode->crop.top + mode->crop.height), ++ &ret); ++ ov5693_write_reg(ov5693, OV5693_CROP_END_Y_L_REG, ++ OV5693_CROP_END_Y_L(mode->crop.top + mode->crop.height), ++ &ret); ++ ++ /* Vertical Total Size */ ++ ov5693_write_reg(ov5693, OV5693_TIMING_VTS_H_REG, ++ OV5693_TIMING_VTS_H(mode->vts), &ret); ++ ov5693_write_reg(ov5693, OV5693_TIMING_VTS_L_REG, ++ OV5693_TIMING_VTS_L(mode->vts), &ret); ++ ++ /* Subsample X increase */ ++ ov5693_write_reg(ov5693, OV5693_SUB_INC_X_REG, ++ ((mode->inc_x_odd << 4) & 0xf0) | 0x01, &ret); ++ /* Subsample Y increase */ ++ ov5693_write_reg(ov5693, OV5693_SUB_INC_Y_REG, ++ ((mode->inc_y_odd << 4) & 0xf0) | 0x01, &ret); ++ ++ /* Binning */ ++ ret = ov5693_update_bits(ov5693, OV5693_FORMAT1_REG, ++ OV5693_FORMAT1_VBIN_EN, ++ mode->binning_y ? OV5693_FORMAT1_VBIN_EN : 0); ++ if (ret) ++ return ret; ++ ++ ret = ov5693_update_bits(ov5693, OV5693_FORMAT2_REG, ++ OV5693_FORMAT2_HBIN_EN, ++ mode->binning_x ? OV5693_FORMAT2_HBIN_EN : 0); ++ ++ return ret; ++} ++ ++static int ov5693_sw_standby(struct ov5693_device *ov5693, bool standby) ++{ ++ int ret = 0; ++ ++ ov5693_write_reg(ov5693, OV5693_SW_STREAM_REG, ++ standby ? OV5693_STOP_STREAMING : OV5693_START_STREAMING, ++ &ret); ++ ++ return ret; ++} ++ ++static int ov5693_sw_reset(struct ov5693_device *ov5693) ++{ ++ int ret = 0; ++ ++ ov5693_write_reg(ov5693, OV5693_SW_RESET_REG, OV5693_SW_RESET, &ret); ++ ++ return ret; ++} ++ ++static int ov5693_sensor_init(struct ov5693_device *ov5693) ++{ ++ int ret = 0; ++ ++ ret = ov5693_sw_reset(ov5693); ++ if (ret) { ++ dev_err(ov5693->dev, "%s software reset error\n", __func__); ++ return ret; ++ } ++ ++ ret = ov5693_write_reg_array(ov5693, &ov5693_global_setting); ++ if (ret) { ++ dev_err(ov5693->dev, "%s global settings error\n", __func__); ++ return ret; ++ } ++ ++ ret = ov5693_mode_configure(ov5693); ++ if (ret) { ++ dev_err(ov5693->dev, "%s mode configure error\n", __func__); ++ return ret; ++ } ++ ++ ret = ov5693_sw_standby(ov5693, true); ++ if (ret) ++ dev_err(ov5693->dev, "%s software standby error\n", __func__); ++ ++ return ret; ++} ++ ++static void ov5693_sensor_powerdown(struct ov5693_device *ov5693) ++{ ++ gpiod_set_value_cansleep(ov5693->reset, 1); ++ gpiod_set_value_cansleep(ov5693->powerdown, 1); ++ ++ regulator_bulk_disable(OV5693_NUM_SUPPLIES, ov5693->supplies); ++ ++ clk_disable_unprepare(ov5693->clk); ++} ++ ++static int ov5693_sensor_powerup(struct ov5693_device *ov5693) ++{ ++ int ret; ++ ++ gpiod_set_value_cansleep(ov5693->reset, 1); ++ gpiod_set_value_cansleep(ov5693->powerdown, 1); ++ ++ ret = clk_prepare_enable(ov5693->clk); ++ if (ret) { ++ dev_err(ov5693->dev, "Failed to enable clk\n"); ++ goto fail_power; ++ } ++ ++ ret = regulator_bulk_enable(OV5693_NUM_SUPPLIES, ov5693->supplies); ++ if (ret) { ++ dev_err(ov5693->dev, "Failed to enable regulators\n"); ++ goto fail_power; ++ } ++ ++ gpiod_set_value_cansleep(ov5693->powerdown, 0); ++ gpiod_set_value_cansleep(ov5693->reset, 0); ++ ++ usleep_range(5000, 7500); ++ ++ return 0; ++ ++fail_power: ++ ov5693_sensor_powerdown(ov5693); ++ return ret; ++} ++ ++static int __maybe_unused ov5693_sensor_suspend(struct device *dev) ++{ ++ struct v4l2_subdev *sd = dev_get_drvdata(dev); ++ struct ov5693_device *ov5693 = to_ov5693_sensor(sd); ++ ++ ov5693_sensor_powerdown(ov5693); ++ ++ return 0; ++} ++ ++static int __maybe_unused ov5693_sensor_resume(struct device *dev) ++{ ++ struct v4l2_subdev *sd = dev_get_drvdata(dev); ++ struct ov5693_device *ov5693 = to_ov5693_sensor(sd); ++ int ret; ++ ++ mutex_lock(&ov5693->lock); ++ ++ ret = ov5693_sensor_powerup(ov5693); ++ if (ret) ++ goto out_unlock; ++ ++ ret = ov5693_sensor_init(ov5693); ++ if (ret) { ++ dev_err(dev, "ov5693 sensor init failure\n"); ++ goto err_power; ++ } ++ ++ goto out_unlock; ++ ++err_power: ++ ov5693_sensor_powerdown(ov5693); ++out_unlock: ++ mutex_unlock(&ov5693->lock); ++ return ret; ++} ++ ++static int ov5693_detect(struct ov5693_device *ov5693) ++{ ++ u8 id_l = 0, id_h = 0; ++ u16 id = 0; ++ int ret; ++ ++ ret = ov5693_read_reg(ov5693, OV5693_REG_CHIP_ID_H, &id_h); ++ if (ret) ++ return ret; ++ ++ ret = ov5693_read_reg(ov5693, OV5693_REG_CHIP_ID_L, &id_l); ++ if (ret) ++ return ret; ++ ++ id = (id_h << 8) | id_l; ++ ++ if (id != OV5693_CHIP_ID) { ++ dev_err(ov5693->dev, "sensor ID mismatch. Found 0x%04x\n", id); ++ return -ENODEV; ++ } ++ ++ return 0; ++} ++ ++/* V4L2 Framework callbacks */ ++ ++static unsigned int __ov5693_calc_vts(u32 height) ++{ ++ /* ++ * We need to set a sensible default VTS for whatever format height we ++ * happen to be given from set_fmt(). This function just targets ++ * an even multiple of 30fps. ++ */ ++ ++ unsigned int tgt_fps; ++ ++ tgt_fps = rounddown(OV5693_PIXEL_RATE / OV5693_FIXED_PPL / height, 30); ++ ++ return ALIGN_DOWN(OV5693_PIXEL_RATE / OV5693_FIXED_PPL / tgt_fps, 2); ++} ++ ++static struct v4l2_mbus_framefmt * ++__ov5693_get_pad_format(struct ov5693_device *ov5693, ++ struct v4l2_subdev_state *state, ++ unsigned int pad, enum v4l2_subdev_format_whence which) ++{ ++ switch (which) { ++ case V4L2_SUBDEV_FORMAT_TRY: ++ return v4l2_subdev_get_try_format(&ov5693->sd, state, pad); ++ case V4L2_SUBDEV_FORMAT_ACTIVE: ++ return &ov5693->mode.format; ++ default: ++ return NULL; ++ } ++} ++ ++static struct v4l2_rect * ++__ov5693_get_pad_crop(struct ov5693_device *ov5693, ++ struct v4l2_subdev_state *state, ++ unsigned int pad, enum v4l2_subdev_format_whence which) ++{ ++ switch (which) { ++ case V4L2_SUBDEV_FORMAT_TRY: ++ return v4l2_subdev_get_try_crop(&ov5693->sd, state, pad); ++ case V4L2_SUBDEV_FORMAT_ACTIVE: ++ return &ov5693->mode.crop; ++ } ++ ++ return NULL; ++} ++ ++static int ov5693_get_fmt(struct v4l2_subdev *sd, ++ struct v4l2_subdev_state *state, ++ struct v4l2_subdev_format *format) ++{ ++ struct ov5693_device *ov5693 = to_ov5693_sensor(sd); ++ ++ format->format = ov5693->mode.format; ++ ++ return 0; ++} ++ ++static int ov5693_set_fmt(struct v4l2_subdev *sd, ++ struct v4l2_subdev_state *state, ++ struct v4l2_subdev_format *format) ++{ ++ struct ov5693_device *ov5693 = to_ov5693_sensor(sd); ++ const struct v4l2_rect *crop; ++ struct v4l2_mbus_framefmt *fmt; ++ unsigned int hratio, vratio; ++ unsigned int width, height; ++ unsigned int hblank; ++ int exposure_max; ++ int ret = 0; ++ ++ crop = __ov5693_get_pad_crop(ov5693, state, format->pad, format->which); ++ ++ /* ++ * Align to two to simplify the binning calculations below, and clamp ++ * the requested format at the crop rectangle ++ */ ++ width = clamp_t(unsigned int, ALIGN(format->format.width, 2), ++ OV5693_MIN_CROP_WIDTH, crop->width); ++ height = clamp_t(unsigned int, ALIGN(format->format.height, 2), ++ OV5693_MIN_CROP_HEIGHT, crop->height); ++ ++ /* ++ * We can only support setting either the dimensions of the crop rect ++ * or those dimensions binned (separately) by a factor of two. ++ */ ++ hratio = clamp_t(unsigned int, DIV_ROUND_CLOSEST(crop->width, width), 1, 2); ++ vratio = clamp_t(unsigned int, DIV_ROUND_CLOSEST(crop->height, height), 1, 2); ++ ++ fmt = __ov5693_get_pad_format(ov5693, state, format->pad, format->which); ++ ++ fmt->width = crop->width / hratio; ++ fmt->height = crop->height / vratio; ++ fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10; ++ ++ format->format = *fmt; ++ ++ if (format->which == V4L2_SUBDEV_FORMAT_TRY) ++ return ret; ++ ++ mutex_lock(&ov5693->lock); ++ ++ ov5693->mode.binning_x = hratio > 1 ? true : false; ++ ov5693->mode.inc_x_odd = hratio > 1 ? 3 : 1; ++ ov5693->mode.binning_y = vratio > 1 ? true : false; ++ ov5693->mode.inc_y_odd = vratio > 1 ? 3 : 1; ++ ++ ov5693->mode.vts = __ov5693_calc_vts(fmt->height); ++ ++ __v4l2_ctrl_modify_range(ov5693->ctrls.vblank, ++ OV5693_TIMING_MIN_VTS, ++ OV5693_TIMING_MAX_VTS - fmt->height, ++ 1, ov5693->mode.vts - fmt->height); ++ __v4l2_ctrl_s_ctrl(ov5693->ctrls.vblank, ++ ov5693->mode.vts - fmt->height); ++ ++ hblank = OV5693_FIXED_PPL - fmt->width; ++ __v4l2_ctrl_modify_range(ov5693->ctrls.hblank, hblank, hblank, 1, ++ hblank); ++ ++ exposure_max = ov5693->mode.vts - OV5693_INTEGRATION_TIME_MARGIN; ++ __v4l2_ctrl_modify_range(ov5693->ctrls.exposure, ++ ov5693->ctrls.exposure->minimum, exposure_max, ++ ov5693->ctrls.exposure->step, ++ min(ov5693->ctrls.exposure->val, exposure_max)); ++ ++ mutex_unlock(&ov5693->lock); ++ return ret; ++} ++ ++static int ov5693_get_selection(struct v4l2_subdev *sd, ++ struct v4l2_subdev_state *state, ++ struct v4l2_subdev_selection *sel) ++{ ++ struct ov5693_device *ov5693 = to_ov5693_sensor(sd); ++ ++ switch (sel->target) { ++ case V4L2_SEL_TGT_CROP: ++ mutex_lock(&ov5693->lock); ++ sel->r = *__ov5693_get_pad_crop(ov5693, state, sel->pad, ++ sel->which); ++ mutex_unlock(&ov5693->lock); ++ break; ++ case V4L2_SEL_TGT_NATIVE_SIZE: ++ sel->r.top = 0; ++ sel->r.left = 0; ++ sel->r.width = OV5693_NATIVE_WIDTH; ++ sel->r.height = OV5693_NATIVE_HEIGHT; ++ break; ++ case V4L2_SEL_TGT_CROP_BOUNDS: ++ case V4L2_SEL_TGT_CROP_DEFAULT: ++ sel->r.top = OV5693_ACTIVE_START_TOP; ++ sel->r.left = OV5693_ACTIVE_START_LEFT; ++ sel->r.width = OV5693_ACTIVE_WIDTH; ++ sel->r.height = OV5693_ACTIVE_HEIGHT; ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static int ov5693_set_selection(struct v4l2_subdev *sd, ++ struct v4l2_subdev_state *state, ++ struct v4l2_subdev_selection *sel) ++{ ++ struct ov5693_device *ov5693 = to_ov5693_sensor(sd); ++ struct v4l2_mbus_framefmt *format; ++ struct v4l2_rect *__crop; ++ struct v4l2_rect rect; ++ ++ if (sel->target != V4L2_SEL_TGT_CROP) ++ return -EINVAL; ++ ++ /* ++ * Clamp the boundaries of the crop rectangle to the size of the sensor ++ * pixel array. Align to multiples of 2 to ensure Bayer pattern isn't ++ * disrupted. ++ */ ++ rect.left = clamp(ALIGN(sel->r.left, 2), OV5693_NATIVE_START_LEFT, ++ OV5693_NATIVE_WIDTH); ++ rect.top = clamp(ALIGN(sel->r.top, 2), OV5693_NATIVE_START_TOP, ++ OV5693_NATIVE_HEIGHT); ++ rect.width = clamp_t(unsigned int, ALIGN(sel->r.width, 2), ++ OV5693_MIN_CROP_WIDTH, OV5693_NATIVE_WIDTH); ++ rect.height = clamp_t(unsigned int, ALIGN(sel->r.height, 2), ++ OV5693_MIN_CROP_HEIGHT, OV5693_NATIVE_HEIGHT); ++ ++ /* Make sure the crop rectangle isn't outside the bounds of the array */ ++ rect.width = min_t(unsigned int, rect.width, ++ OV5693_NATIVE_WIDTH - rect.left); ++ rect.height = min_t(unsigned int, rect.height, ++ OV5693_NATIVE_HEIGHT - rect.top); ++ ++ __crop = __ov5693_get_pad_crop(ov5693, state, sel->pad, sel->which); ++ ++ if (rect.width != __crop->width || rect.height != __crop->height) { ++ /* ++ * Reset the output image size if the crop rectangle size has ++ * been modified. ++ */ ++ format = __ov5693_get_pad_format(ov5693, state, sel->pad, sel->which); ++ format->width = rect.width; ++ format->height = rect.height; ++ } ++ ++ *__crop = rect; ++ sel->r = rect; ++ ++ return 0; ++} ++ ++static int ov5693_s_stream(struct v4l2_subdev *sd, int enable) ++{ ++ struct ov5693_device *ov5693 = to_ov5693_sensor(sd); ++ int ret; ++ ++ if (enable) { ++ ret = pm_runtime_get_sync(ov5693->dev); ++ if (ret < 0) ++ goto err_power_down; ++ ++ ret = __v4l2_ctrl_handler_setup(&ov5693->ctrls.handler); ++ if (ret) ++ goto err_power_down; ++ } ++ ++ mutex_lock(&ov5693->lock); ++ ret = ov5693_sw_standby(ov5693, !enable); ++ mutex_unlock(&ov5693->lock); ++ ++ if (ret) ++ goto err_power_down; ++ ov5693->streaming = !!enable; ++ ++ if (!enable) ++ pm_runtime_put(ov5693->dev); ++ ++ return 0; ++err_power_down: ++ pm_runtime_put_noidle(ov5693->dev); ++ return ret; ++} ++ ++static int ov5693_g_frame_interval(struct v4l2_subdev *sd, ++ struct v4l2_subdev_frame_interval *interval) ++{ ++ struct ov5693_device *ov5693 = to_ov5693_sensor(sd); ++ unsigned int framesize = OV5693_FIXED_PPL * (ov5693->mode.format.height + ++ ov5693->ctrls.vblank->val); ++ unsigned int fps = DIV_ROUND_CLOSEST(OV5693_PIXEL_RATE, framesize); ++ ++ interval->interval.numerator = 1; ++ interval->interval.denominator = fps; ++ ++ return 0; ++} ++ ++static int ov5693_enum_mbus_code(struct v4l2_subdev *sd, ++ struct v4l2_subdev_state *state, ++ struct v4l2_subdev_mbus_code_enum *code) ++{ ++ /* Only a single mbus format is supported */ ++ if (code->index > 0) ++ return -EINVAL; ++ ++ code->code = MEDIA_BUS_FMT_SBGGR10_1X10; ++ return 0; ++} ++ ++static int ov5693_enum_frame_size(struct v4l2_subdev *sd, ++ struct v4l2_subdev_state *state, ++ struct v4l2_subdev_frame_size_enum *fse) ++{ ++ struct ov5693_device *ov5693 = to_ov5693_sensor(sd); ++ struct v4l2_rect *__crop; ++ ++ if (fse->index > 1 || fse->code != MEDIA_BUS_FMT_SBGGR10_1X10) ++ return -EINVAL; ++ ++ __crop = __ov5693_get_pad_crop(ov5693, state, fse->pad, fse->which); ++ if (!__crop) ++ return -EINVAL; ++ ++ fse->min_width = __crop->width / (fse->index + 1); ++ fse->min_height = __crop->height / (fse->index + 1); ++ fse->max_width = fse->min_width; ++ fse->max_height = fse->min_height; ++ ++ return 0; ++} ++ ++static const struct v4l2_subdev_video_ops ov5693_video_ops = { ++ .s_stream = ov5693_s_stream, ++ .g_frame_interval = ov5693_g_frame_interval, ++}; ++ ++static const struct v4l2_subdev_pad_ops ov5693_pad_ops = { ++ .enum_mbus_code = ov5693_enum_mbus_code, ++ .enum_frame_size = ov5693_enum_frame_size, ++ .get_fmt = ov5693_get_fmt, ++ .set_fmt = ov5693_set_fmt, ++ .get_selection = ov5693_get_selection, ++ .set_selection = ov5693_set_selection, ++}; ++ ++static const struct v4l2_subdev_ops ov5693_ops = { ++ .video = &ov5693_video_ops, ++ .pad = &ov5693_pad_ops, ++}; ++ ++/* Sensor and Driver Configuration Functions */ ++ ++static int ov5693_init_controls(struct ov5693_device *ov5693) ++{ ++ const struct v4l2_ctrl_ops *ops = &ov5693_ctrl_ops; ++ struct v4l2_fwnode_device_properties props; ++ int vblank_max, vblank_def; ++ int exposure_max; ++ int hblank; ++ int ret; ++ ++ ret = v4l2_ctrl_handler_init(&ov5693->ctrls.handler, 12); ++ if (ret) ++ return ret; ++ ++ /* link freq */ ++ ov5693->ctrls.link_freq = v4l2_ctrl_new_int_menu(&ov5693->ctrls.handler, ++ NULL, V4L2_CID_LINK_FREQ, ++ 0, 0, link_freq_menu_items); ++ if (ov5693->ctrls.link_freq) ++ ov5693->ctrls.link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY; ++ ++ /* pixel rate */ ++ ov5693->ctrls.pixel_rate = v4l2_ctrl_new_std(&ov5693->ctrls.handler, NULL, ++ V4L2_CID_PIXEL_RATE, 0, ++ OV5693_PIXEL_RATE, 1, ++ OV5693_PIXEL_RATE); ++ ++ /* Exposure */ ++ exposure_max = ov5693->mode.vts - OV5693_INTEGRATION_TIME_MARGIN; ++ ov5693->ctrls.exposure = v4l2_ctrl_new_std(&ov5693->ctrls.handler, ops, ++ V4L2_CID_EXPOSURE, ++ OV5693_EXPOSURE_MIN, ++ exposure_max, ++ OV5693_EXPOSURE_STEP, ++ exposure_max); ++ ++ /* Gain */ ++ ov5693->ctrls.analogue_gain = v4l2_ctrl_new_std(&ov5693->ctrls.handler, ++ ops, V4L2_CID_ANALOGUE_GAIN, ++ OV5693_GAIN_MIN, ++ OV5693_GAIN_MAX, ++ OV5693_GAIN_STEP, ++ OV5693_GAIN_DEF); ++ ++ ov5693->ctrls.digital_gain = v4l2_ctrl_new_std(&ov5693->ctrls.handler, ops, ++ V4L2_CID_DIGITAL_GAIN, ++ OV5693_DIGITAL_GAIN_MIN, ++ OV5693_DIGITAL_GAIN_MAX, ++ OV5693_DIGITAL_GAIN_STEP, ++ OV5693_DIGITAL_GAIN_DEF); ++ ++ /* Flip */ ++ ov5693->ctrls.hflip = v4l2_ctrl_new_std(&ov5693->ctrls.handler, ops, ++ V4L2_CID_HFLIP, 0, 1, 1, 0); ++ ++ ov5693->ctrls.vflip = v4l2_ctrl_new_std(&ov5693->ctrls.handler, ops, ++ V4L2_CID_VFLIP, 0, 1, 1, 0); ++ ++ hblank = OV5693_FIXED_PPL - ov5693->mode.format.width; ++ ov5693->ctrls.hblank = v4l2_ctrl_new_std(&ov5693->ctrls.handler, ops, ++ V4L2_CID_HBLANK, hblank, ++ hblank, 1, hblank); ++ ++ if (ov5693->ctrls.hblank) ++ ov5693->ctrls.hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY; ++ ++ vblank_max = OV5693_TIMING_MAX_VTS - ov5693->mode.format.height; ++ vblank_def = ov5693->mode.vts - ov5693->mode.format.height; ++ ov5693->ctrls.vblank = v4l2_ctrl_new_std(&ov5693->ctrls.handler, ops, ++ V4L2_CID_VBLANK, ++ OV5693_TIMING_MIN_VTS, ++ vblank_max, 1, vblank_def); ++ ++ ov5693->ctrls.test_pattern = v4l2_ctrl_new_std_menu_items( ++ &ov5693->ctrls.handler, ops, ++ V4L2_CID_TEST_PATTERN, ++ ARRAY_SIZE(ov5693_test_pattern_menu) - 1, ++ 0, 0, ov5693_test_pattern_menu); ++ ++ if (ov5693->ctrls.handler.error) { ++ dev_err(ov5693->dev, "Error initialising v4l2 ctrls\n"); ++ ret = ov5693->ctrls.handler.error; ++ goto err_free_handler; ++ } ++ ++ /* set properties from fwnode (e.g. rotation, orientation) */ ++ ret = v4l2_fwnode_device_parse(ov5693->dev, &props); ++ if (ret) ++ goto err_free_handler; ++ ++ ret = v4l2_ctrl_new_fwnode_properties(&ov5693->ctrls.handler, ops, ++ &props); ++ if (ret) ++ goto err_free_handler; ++ ++ /* Use same lock for controls as for everything else. */ ++ ov5693->ctrls.handler.lock = &ov5693->lock; ++ ov5693->sd.ctrl_handler = &ov5693->ctrls.handler; ++ ++ return 0; ++ ++err_free_handler: ++ v4l2_ctrl_handler_free(&ov5693->ctrls.handler); ++ return ret; ++} ++ ++static int ov5693_configure_gpios(struct ov5693_device *ov5693) ++{ ++ ov5693->reset = devm_gpiod_get_optional(ov5693->dev, "reset", ++ GPIOD_OUT_HIGH); ++ if (IS_ERR(ov5693->reset)) { ++ dev_err(ov5693->dev, "Error fetching reset GPIO\n"); ++ return PTR_ERR(ov5693->reset); ++ } ++ ++ ov5693->powerdown = devm_gpiod_get_optional(ov5693->dev, "powerdown", ++ GPIOD_OUT_HIGH); ++ if (IS_ERR(ov5693->powerdown)) { ++ dev_err(ov5693->dev, "Error fetching powerdown GPIO\n"); ++ return PTR_ERR(ov5693->powerdown); ++ } ++ ++ return 0; ++} ++ ++static int ov5693_get_regulators(struct ov5693_device *ov5693) ++{ ++ unsigned int i; ++ ++ for (i = 0; i < OV5693_NUM_SUPPLIES; i++) ++ ov5693->supplies[i].supply = ov5693_supply_names[i]; ++ ++ return devm_regulator_bulk_get(ov5693->dev, OV5693_NUM_SUPPLIES, ++ ov5693->supplies); ++} ++ ++static int ov5693_probe(struct i2c_client *client) ++{ ++ struct fwnode_handle *fwnode = dev_fwnode(&client->dev); ++ struct fwnode_handle *endpoint; ++ struct ov5693_device *ov5693; ++ u32 clk_rate; ++ int ret = 0; ++ ++ endpoint = fwnode_graph_get_next_endpoint(fwnode, NULL); ++ if (!endpoint && !IS_ERR_OR_NULL(fwnode->secondary)) ++ endpoint = fwnode_graph_get_next_endpoint(fwnode->secondary, NULL); ++ if (!endpoint) ++ return -EPROBE_DEFER; ++ ++ ov5693 = devm_kzalloc(&client->dev, sizeof(*ov5693), GFP_KERNEL); ++ if (!ov5693) ++ return -ENOMEM; ++ ++ ov5693->client = client; ++ ov5693->dev = &client->dev; ++ ++ mutex_init(&ov5693->lock); ++ ++ v4l2_i2c_subdev_init(&ov5693->sd, client, &ov5693_ops); ++ ++ ov5693->clk = devm_clk_get(&client->dev, "xvclk"); ++ if (IS_ERR(ov5693->clk)) { ++ dev_err(&client->dev, "Error getting clock\n"); ++ return PTR_ERR(ov5693->clk); ++ } ++ ++ clk_rate = clk_get_rate(ov5693->clk); ++ if (clk_rate != OV5693_XVCLK_FREQ) { ++ dev_err(&client->dev, "Unsupported clk freq %u, expected %u\n", ++ clk_rate, OV5693_XVCLK_FREQ); ++ return -EINVAL; ++ } ++ ++ ret = ov5693_configure_gpios(ov5693); ++ if (ret) ++ return ret; ++ ++ ret = ov5693_get_regulators(ov5693); ++ if (ret) { ++ dev_err(&client->dev, "Error fetching regulators\n"); ++ return ret; ++ } ++ ++ ov5693->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; ++ ov5693->pad.flags = MEDIA_PAD_FL_SOURCE; ++ ov5693->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; ++ ++ ov5693->mode.crop = ov5693_default_crop; ++ ov5693->mode.format = ov5693_default_fmt; ++ ov5693->mode.vts = __ov5693_calc_vts(ov5693->mode.format.height); ++ ++ ret = ov5693_init_controls(ov5693); ++ if (ret) ++ return ret; ++ ++ ret = media_entity_pads_init(&ov5693->sd.entity, 1, &ov5693->pad); ++ if (ret) ++ goto err_ctrl_handler_free; ++ ++ /* ++ * We need the driver to work in the event that pm runtime is disable in ++ * the kernel, so power up and verify the chip now. In the event that ++ * runtime pm is disabled this will leave the chip on, so that streaming ++ * will work. ++ */ ++ ++ ret = ov5693_sensor_powerup(ov5693); ++ if (ret) ++ goto err_media_entity_cleanup; ++ ++ ret = ov5693_detect(ov5693); ++ if (ret) ++ goto err_powerdown; ++ ++ pm_runtime_set_active(&client->dev); ++ pm_runtime_get_noresume(&client->dev); ++ pm_runtime_enable(&client->dev); ++ ++ ret = v4l2_async_register_subdev_sensor(&ov5693->sd); ++ if (ret) { ++ dev_err(&client->dev, "failed to register V4L2 subdev: %d", ++ ret); ++ goto err_pm_runtime; ++ } ++ ++ pm_runtime_set_autosuspend_delay(&client->dev, 1000); ++ pm_runtime_use_autosuspend(&client->dev); ++ pm_runtime_put_autosuspend(&client->dev); ++ ++ return ret; ++ ++err_pm_runtime: ++ pm_runtime_disable(&client->dev); ++ pm_runtime_put_noidle(&client->dev); ++err_powerdown: ++ ov5693_sensor_powerdown(ov5693); ++err_media_entity_cleanup: ++ media_entity_cleanup(&ov5693->sd.entity); ++err_ctrl_handler_free: ++ v4l2_ctrl_handler_free(&ov5693->ctrls.handler); ++ ++ return ret; ++} ++ ++static int ov5693_remove(struct i2c_client *client) ++{ ++ struct v4l2_subdev *sd = i2c_get_clientdata(client); ++ struct ov5693_device *ov5693 = to_ov5693_sensor(sd); ++ ++ v4l2_async_unregister_subdev(sd); ++ media_entity_cleanup(&ov5693->sd.entity); ++ v4l2_ctrl_handler_free(&ov5693->ctrls.handler); ++ mutex_destroy(&ov5693->lock); ++ ++ /* ++ * Disable runtime PM. In case runtime PM is disabled in the kernel, ++ * make sure to turn power off manually. ++ */ ++ pm_runtime_disable(&client->dev); ++ if (!pm_runtime_status_suspended(&client->dev)) ++ ov5693_sensor_powerdown(ov5693); ++ pm_runtime_set_suspended(&client->dev); ++ ++ return 0; ++} ++ ++static const struct dev_pm_ops ov5693_pm_ops = { ++ SET_RUNTIME_PM_OPS(ov5693_sensor_suspend, ov5693_sensor_resume, NULL) ++}; ++ ++static const struct acpi_device_id ov5693_acpi_match[] = { ++ {"INT33BE"}, ++ {}, ++}; ++MODULE_DEVICE_TABLE(acpi, ov5693_acpi_match); ++ ++static struct i2c_driver ov5693_driver = { ++ .driver = { ++ .name = "ov5693", ++ .acpi_match_table = ov5693_acpi_match, ++ .pm = &ov5693_pm_ops, ++ }, ++ .probe_new = ov5693_probe, ++ .remove = ov5693_remove, ++}; ++module_i2c_driver(ov5693_driver); ++ ++MODULE_DESCRIPTION("A low-level driver for OmniVision 5693 sensors"); ++MODULE_LICENSE("GPL"); +-- +2.33.0 + +From 611b28bc65ab9da3dc36014dd663440f5e33aaa9 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Fabian=20W=C3=BCthrich?= +Date: Fri, 22 Jan 2021 20:58:13 +0100 +Subject: [PATCH] cio2-bridge: Parse sensor orientation and rotation +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The sensor orientation is read from the _PLC ACPI buffer and converted +to a v4l2 format. + +See https://uefi.org/sites/default/files/resources/ACPI_6_3_final_Jan30.pdf +page 351 for a definition of the Panel property. + +The sensor rotation is read from the SSDB ACPI buffer and converted into +degrees. + +Signed-off-by: Fabian Wüthrich +Patchset: cameras +--- + drivers/media/pci/intel/ipu3/cio2-bridge.c | 45 ++++++++++++++++++++-- + drivers/media/pci/intel/ipu3/cio2-bridge.h | 3 ++ + 2 files changed, 44 insertions(+), 4 deletions(-) + +diff --git a/drivers/media/pci/intel/ipu3/cio2-bridge.c b/drivers/media/pci/intel/ipu3/cio2-bridge.c +index 30d29b96a339..77c97bf6521e 100644 +--- a/drivers/media/pci/intel/ipu3/cio2-bridge.c ++++ b/drivers/media/pci/intel/ipu3/cio2-bridge.c +@@ -29,6 +29,7 @@ static const struct cio2_sensor_config cio2_supported_sensors[] = { + static const struct cio2_property_names prop_names = { + .clock_frequency = "clock-frequency", + .rotation = "rotation", ++ .orientation = "orientation", + .bus_type = "bus-type", + .data_lanes = "data-lanes", + .remote_endpoint = "remote-endpoint", +@@ -72,11 +73,36 @@ static int cio2_bridge_read_acpi_buffer(struct acpi_device *adev, char *id, + return ret; + } + ++static u32 cio2_bridge_parse_rotation(u8 rotation) ++{ ++ if (rotation == 1) ++ return 180; ++ return 0; ++} ++ ++static enum v4l2_fwnode_orientation cio2_bridge_parse_orientation(u8 panel) ++{ ++ switch (panel) { ++ case 4: ++ return V4L2_FWNODE_ORIENTATION_FRONT; ++ case 5: ++ return V4L2_FWNODE_ORIENTATION_BACK; ++ default: ++ return V4L2_FWNODE_ORIENTATION_EXTERNAL; ++ } ++} ++ + static void cio2_bridge_create_fwnode_properties( + struct cio2_sensor *sensor, + struct cio2_bridge *bridge, + const struct cio2_sensor_config *cfg) + { ++ u32 rotation; ++ enum v4l2_fwnode_orientation orientation; ++ ++ rotation = cio2_bridge_parse_rotation(sensor->ssdb.degree); ++ orientation = cio2_bridge_parse_orientation(sensor->pld->panel); ++ + sensor->prop_names = prop_names; + + sensor->local_ref[0] = SOFTWARE_NODE_REFERENCE(&sensor->swnodes[SWNODE_CIO2_ENDPOINT]); +@@ -85,9 +111,12 @@ static void cio2_bridge_create_fwnode_properties( + sensor->dev_properties[0] = PROPERTY_ENTRY_U32( + sensor->prop_names.clock_frequency, + sensor->ssdb.mclkspeed); +- sensor->dev_properties[1] = PROPERTY_ENTRY_U8( ++ sensor->dev_properties[1] = PROPERTY_ENTRY_U32( + sensor->prop_names.rotation, +- sensor->ssdb.degree); ++ rotation); ++ sensor->dev_properties[2] = PROPERTY_ENTRY_U32( ++ sensor->prop_names.orientation, ++ orientation); + + sensor->ep_properties[0] = PROPERTY_ENTRY_U32( + sensor->prop_names.bus_type, +@@ -159,6 +188,7 @@ static void cio2_bridge_unregister_sensors(struct cio2_bridge *bridge) + for (i = 0; i < bridge->n_sensors; i++) { + sensor = &bridge->sensors[i]; + software_node_unregister_nodes(sensor->swnodes); ++ ACPI_FREE(sensor->pld); + acpi_dev_put(sensor->adev); + } + } +@@ -170,6 +200,7 @@ static int cio2_bridge_connect_sensor(const struct cio2_sensor_config *cfg, + struct fwnode_handle *fwnode; + struct cio2_sensor *sensor; + struct acpi_device *adev; ++ acpi_status status; + int ret; + + for_each_acpi_dev_match(adev, cfg->hid, NULL, -1) { +@@ -191,11 +222,15 @@ static int cio2_bridge_connect_sensor(const struct cio2_sensor_config *cfg, + if (ret) + goto err_put_adev; + ++ status = acpi_get_physical_device_location(adev->handle, &sensor->pld); ++ if (ACPI_FAILURE(status)) ++ goto err_put_adev; ++ + if (sensor->ssdb.lanes > CIO2_MAX_LANES) { + dev_err(&adev->dev, + "Number of lanes in SSDB is invalid\n"); + ret = -EINVAL; +- goto err_put_adev; ++ goto err_free_pld; + } + + cio2_bridge_create_fwnode_properties(sensor, bridge, cfg); +@@ -203,7 +238,7 @@ static int cio2_bridge_connect_sensor(const struct cio2_sensor_config *cfg, + + ret = software_node_register_nodes(sensor->swnodes); + if (ret) +- goto err_put_adev; ++ goto err_free_pld; + + fwnode = software_node_fwnode(&sensor->swnodes[ + SWNODE_SENSOR_HID]); +@@ -225,6 +260,8 @@ static int cio2_bridge_connect_sensor(const struct cio2_sensor_config *cfg, + + err_free_swnodes: + software_node_unregister_nodes(sensor->swnodes); ++err_free_pld: ++ ACPI_FREE(sensor->pld); + err_put_adev: + acpi_dev_put(adev); + return ret; +diff --git a/drivers/media/pci/intel/ipu3/cio2-bridge.h b/drivers/media/pci/intel/ipu3/cio2-bridge.h +index dd0ffcafa489..924d99d20328 100644 +--- a/drivers/media/pci/intel/ipu3/cio2-bridge.h ++++ b/drivers/media/pci/intel/ipu3/cio2-bridge.h +@@ -80,6 +80,7 @@ struct cio2_sensor_ssdb { + struct cio2_property_names { + char clock_frequency[16]; + char rotation[9]; ++ char orientation[12]; + char bus_type[9]; + char data_lanes[11]; + char remote_endpoint[16]; +@@ -106,6 +107,8 @@ struct cio2_sensor { + struct cio2_node_names node_names; + + struct cio2_sensor_ssdb ssdb; ++ struct acpi_pld_info *pld; ++ + struct cio2_property_names prop_names; + struct property_entry ep_properties[5]; + struct property_entry dev_properties[3]; +-- +2.33.0 + +From d4809f561f77701f534a268a85f87351b074a064 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Fabian=20W=C3=BCthrich?= +Date: Sun, 24 Jan 2021 11:07:42 +0100 +Subject: [PATCH] cio2-bridge: Use macros and add warnings +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Use macros for the _PLD panel as defined in the ACPI spec 6.3 and emit +a warning if we see an unknown value. + +Signed-off-by: Fabian Wüthrich +Patchset: cameras +--- + drivers/media/pci/intel/ipu3/cio2-bridge.c | 33 ++++++++++++++++------ + drivers/media/pci/intel/ipu3/cio2-bridge.h | 13 +++++++++ + 2 files changed, 37 insertions(+), 9 deletions(-) + +diff --git a/drivers/media/pci/intel/ipu3/cio2-bridge.c b/drivers/media/pci/intel/ipu3/cio2-bridge.c +index 77c97bf6521e..7e582135dfb8 100644 +--- a/drivers/media/pci/intel/ipu3/cio2-bridge.c ++++ b/drivers/media/pci/intel/ipu3/cio2-bridge.c +@@ -73,21 +73,36 @@ static int cio2_bridge_read_acpi_buffer(struct acpi_device *adev, char *id, + return ret; + } + +-static u32 cio2_bridge_parse_rotation(u8 rotation) ++static u32 cio2_bridge_parse_rotation(struct cio2_sensor *sensor) + { +- if (rotation == 1) ++ switch (sensor->ssdb.degree) { ++ case CIO2_SENSOR_ROTATION_NORMAL: ++ return 0; ++ case CIO2_SENSOR_ROTATION_INVERTED: + return 180; +- return 0; ++ default: ++ dev_warn(&sensor->adev->dev, ++ "Unknown rotation %d. Assume 0 degree rotation\n", ++ sensor->ssdb.degree); ++ return 0; ++ } + } + +-static enum v4l2_fwnode_orientation cio2_bridge_parse_orientation(u8 panel) ++static enum v4l2_fwnode_orientation cio2_bridge_parse_orientation(struct cio2_sensor *sensor) + { +- switch (panel) { +- case 4: ++ switch (sensor->pld->panel) { ++ case CIO2_PLD_PANEL_FRONT: + return V4L2_FWNODE_ORIENTATION_FRONT; +- case 5: ++ case CIO2_PLD_PANEL_BACK: + return V4L2_FWNODE_ORIENTATION_BACK; ++ case CIO2_PLD_PANEL_TOP: ++ case CIO2_PLD_PANEL_LEFT: ++ case CIO2_PLD_PANEL_RIGHT: ++ case CIO2_PLD_PANEL_UNKNOWN: ++ return V4L2_FWNODE_ORIENTATION_EXTERNAL; + default: ++ dev_warn(&sensor->adev->dev, "Unknown _PLD panel value %d\n", ++ sensor->pld->panel); + return V4L2_FWNODE_ORIENTATION_EXTERNAL; + } + } +@@ -100,8 +115,8 @@ static void cio2_bridge_create_fwnode_properties( + u32 rotation; + enum v4l2_fwnode_orientation orientation; + +- rotation = cio2_bridge_parse_rotation(sensor->ssdb.degree); +- orientation = cio2_bridge_parse_orientation(sensor->pld->panel); ++ rotation = cio2_bridge_parse_rotation(sensor); ++ orientation = cio2_bridge_parse_orientation(sensor); + + sensor->prop_names = prop_names; + +diff --git a/drivers/media/pci/intel/ipu3/cio2-bridge.h b/drivers/media/pci/intel/ipu3/cio2-bridge.h +index 924d99d20328..e1e388cc9f45 100644 +--- a/drivers/media/pci/intel/ipu3/cio2-bridge.h ++++ b/drivers/media/pci/intel/ipu3/cio2-bridge.h +@@ -12,6 +12,19 @@ + #define CIO2_MAX_LANES 4 + #define MAX_NUM_LINK_FREQS 3 + ++/* Values are estimated guesses as we don't have a spec */ ++#define CIO2_SENSOR_ROTATION_NORMAL 0 ++#define CIO2_SENSOR_ROTATION_INVERTED 1 ++ ++/* Panel position defined in _PLD section of ACPI Specification 6.3 */ ++#define CIO2_PLD_PANEL_TOP 0 ++#define CIO2_PLD_PANEL_BOTTOM 1 ++#define CIO2_PLD_PANEL_LEFT 2 ++#define CIO2_PLD_PANEL_RIGHT 3 ++#define CIO2_PLD_PANEL_FRONT 4 ++#define CIO2_PLD_PANEL_BACK 5 ++#define CIO2_PLD_PANEL_UNKNOWN 6 ++ + #define CIO2_SENSOR_CONFIG(_HID, _NR, ...) \ + (const struct cio2_sensor_config) { \ + .hid = _HID, \ +-- +2.33.0 + +From 56010e1b61e8333279d9cc107d66fddf9a46dc46 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Fabian=20W=C3=BCthrich?= +Date: Thu, 6 May 2021 07:52:44 +0200 +Subject: [PATCH] cio2-bridge: Use correct dev_properties size + +Patchset: cameras +--- + drivers/media/pci/intel/ipu3/cio2-bridge.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/media/pci/intel/ipu3/cio2-bridge.h b/drivers/media/pci/intel/ipu3/cio2-bridge.h +index e1e388cc9f45..deaf5804f70d 100644 +--- a/drivers/media/pci/intel/ipu3/cio2-bridge.h ++++ b/drivers/media/pci/intel/ipu3/cio2-bridge.h +@@ -124,7 +124,7 @@ struct cio2_sensor { + + struct cio2_property_names prop_names; + struct property_entry ep_properties[5]; +- struct property_entry dev_properties[3]; ++ struct property_entry dev_properties[4]; + struct property_entry cio2_properties[3]; + struct software_node_ref_args local_ref[1]; + struct software_node_ref_args remote_ref[1]; +-- +2.33.0 + +From cf2f637f36388d011bf7f1f5ee1fabcd757db8e8 Mon Sep 17 00:00:00 2001 +From: Daniel Scally +Date: Thu, 20 May 2021 23:31:04 +0100 +Subject: [PATCH] media: i2c: Fix vertical flip in ov5693 + +The pinkness experienced by users with rotated sensors in their laptops +was due to an incorrect setting for the vertical flip function; the +datasheet for the sensor gives the settings as bits 1&2 in one place and +bits 1&6 in another. + +Switch to flipping bit 6 instead of bit 2 for 0x3820 in the vertical +flip function to fix the pink hue. + +Signed-off-by: Daniel Scally +Patchset: cameras +--- + drivers/media/i2c/ov5693.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/media/i2c/ov5693.c b/drivers/media/i2c/ov5693.c +index 9499ee10f56c..c558f9b48c83 100644 +--- a/drivers/media/i2c/ov5693.c ++++ b/drivers/media/i2c/ov5693.c +@@ -133,7 +133,7 @@ + #define OV5693_SUB_INC_Y_REG 0x3815 + + #define OV5693_FORMAT1_REG 0x3820 +-#define OV5693_FORMAT1_FLIP_VERT_ISP_EN BIT(2) ++#define OV5693_FORMAT1_FLIP_VERT_ISP_EN BIT(6) + #define OV5693_FORMAT1_FLIP_VERT_SENSOR_EN BIT(1) + #define OV5693_FORMAT1_VBIN_EN BIT(0) + #define OV5693_FORMAT2_REG 0x3821 +-- +2.33.0 + +From 70bbe83f031cbdeac4713db8ac89c60a42187c22 Mon Sep 17 00:00:00 2001 +From: Daniel Scally +Date: Fri, 9 Jul 2021 16:39:18 +0100 +Subject: [PATCH] media: i2c: Add ACPI support to ov8865 + +The ov8865 sensor is sometimes found on x86 platforms enumerated via ACPI. +Add an ACPI match table to the driver so that it's probed on those +platforms. + +Signed-off-by: Daniel Scally +Patchset: cameras +--- + drivers/media/i2c/ov8865.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +diff --git a/drivers/media/i2c/ov8865.c b/drivers/media/i2c/ov8865.c +index ce50f3ea87b8..fe60cda3dea7 100644 +--- a/drivers/media/i2c/ov8865.c ++++ b/drivers/media/i2c/ov8865.c +@@ -5,6 +5,7 @@ + * Author: Paul Kocialkowski + */ + ++#include + #include + #include + #include +@@ -2946,6 +2947,12 @@ static const struct dev_pm_ops ov8865_pm_ops = { + SET_RUNTIME_PM_OPS(ov8865_suspend, ov8865_resume, NULL) + }; + ++static const struct acpi_device_id ov8865_acpi_match[] = { ++ {"INT347A"}, ++ {}, ++}; ++MODULE_DEVICE_TABLE(acpi, ov8865_acpi_match); ++ + static const struct of_device_id ov8865_of_match[] = { + { .compatible = "ovti,ov8865" }, + { } +@@ -2956,6 +2963,7 @@ static struct i2c_driver ov8865_driver = { + .driver = { + .name = "ov8865", + .of_match_table = ov8865_of_match, ++ .acpi_match_table = ov8865_acpi_match, + .pm = &ov8865_pm_ops, + }, + .probe_new = ov8865_probe, +-- +2.33.0 + +From 71895e642120d77f1c1c2133692c5b30afd5b70e Mon Sep 17 00:00:00 2001 +From: Daniel Scally +Date: Sat, 10 Jul 2021 21:20:17 +0100 +Subject: [PATCH] media: i2c: Fix incorrect value in comment + +The PLL configuration defined here sets 72MHz (which is correct), not +80MHz. Correct the comment. + +Signed-off-by: Daniel Scally +Patchset: cameras +--- + drivers/media/i2c/ov8865.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/media/i2c/ov8865.c b/drivers/media/i2c/ov8865.c +index fe60cda3dea7..2ef146e7e7ef 100644 +--- a/drivers/media/i2c/ov8865.c ++++ b/drivers/media/i2c/ov8865.c +@@ -713,7 +713,7 @@ static const struct ov8865_pll2_config ov8865_pll2_config_native = { + /* + * EXTCLK = 24 MHz + * DAC_CLK = 360 MHz +- * SCLK = 80 MHz ++ * SCLK = 72 MHz + */ + + static const struct ov8865_pll2_config ov8865_pll2_config_binning = { +-- +2.33.0 + +From 7e7c5df41a9650af8291bb4ec46031af5106141e Mon Sep 17 00:00:00 2001 +From: Daniel Scally +Date: Sat, 10 Jul 2021 22:21:52 +0100 +Subject: [PATCH] media: i2c: Check fwnode->secondary for endpoint + +The ov8865 driver is one of those that can be connected to a CIO2 +device by the cio2-bridge code. This means that the absence of an +endpoint for this device is not necessarily fatal, as one might be +built by the cio2-bridge when it probes. Check fwnode->secondary for +an endpoint, and defer probing if one isn't found rather than fail. + +Signed-off-by: Daniel Scally +Patchset: cameras +--- + drivers/media/i2c/ov8865.c | 11 ++++++----- + 1 file changed, 6 insertions(+), 5 deletions(-) + +diff --git a/drivers/media/i2c/ov8865.c b/drivers/media/i2c/ov8865.c +index 2ef146e7e7ef..a3199721bbca 100644 +--- a/drivers/media/i2c/ov8865.c ++++ b/drivers/media/i2c/ov8865.c +@@ -2779,6 +2779,7 @@ static int ov8865_resume(struct device *dev) + static int ov8865_probe(struct i2c_client *client) + { + struct device *dev = &client->dev; ++ struct fwnode_handle *fwnode = dev_fwnode(dev); + struct fwnode_handle *handle; + struct ov8865_sensor *sensor; + struct v4l2_subdev *subdev; +@@ -2795,11 +2796,11 @@ static int ov8865_probe(struct i2c_client *client) + + /* Graph Endpoint */ + +- handle = fwnode_graph_get_next_endpoint(dev_fwnode(dev), NULL); +- if (!handle) { +- dev_err(dev, "unable to find endpoint node\n"); +- return -EINVAL; +- } ++ handle = fwnode_graph_get_next_endpoint(fwnode, NULL); ++ if (!handle && !IS_ERR_OR_NULL(fwnode->secondary)) ++ handle = fwnode_graph_get_next_endpoint(fwnode->secondary, NULL); ++ if (!handle) ++ return -EPROBE_DEFER; + + sensor->endpoint.bus_type = V4L2_MBUS_CSI2_DPHY; + +-- +2.33.0 + +From d732561d66aaf96bda83718b520a787dc0bbd41d Mon Sep 17 00:00:00 2001 +From: Daniel Scally +Date: Sat, 10 Jul 2021 22:00:25 +0100 +Subject: [PATCH] media: i2c: Support 19.2MHz input clock in ov8865 + +The ov8865 driver as written expects a 24MHz input clock, but the sensor +is sometimes found on x86 platforms with a 19.2MHz input clock supplied. +Add a set of PLL configurations to the driver to support that rate too. +As ACPI doesn't auto-configure the clock rate, check for a clock-frequency +during probe and set that rate if one is found. + +Signed-off-by: Daniel Scally +Patchset: cameras +--- + drivers/media/i2c/ov8865.c | 157 +++++++++++++++++++++++++++---------- + 1 file changed, 114 insertions(+), 43 deletions(-) + +diff --git a/drivers/media/i2c/ov8865.c b/drivers/media/i2c/ov8865.c +index a3199721bbca..53e6bcbe18d6 100644 +--- a/drivers/media/i2c/ov8865.c ++++ b/drivers/media/i2c/ov8865.c +@@ -21,10 +21,6 @@ + #include + #include + +-/* Clock rate */ +- +-#define OV8865_EXTCLK_RATE 24000000 +- + /* Register definitions */ + + /* System */ +@@ -665,6 +661,9 @@ struct ov8865_sensor { + struct regulator *avdd; + struct regulator *dvdd; + struct regulator *dovdd; ++ ++ unsigned long extclk_rate; ++ unsigned int extclk_rate_idx; + struct clk *extclk; + + struct v4l2_fwnode_endpoint endpoint; +@@ -680,49 +679,83 @@ struct ov8865_sensor { + /* Static definitions */ + + /* +- * EXTCLK = 24 MHz + * PHY_SCLK = 720 MHz + * MIPI_PCLK = 90 MHz + */ +-static const struct ov8865_pll1_config ov8865_pll1_config_native = { +- .pll_pre_div_half = 1, +- .pll_pre_div = 0, +- .pll_mul = 30, +- .m_div = 1, +- .mipi_div = 3, +- .pclk_div = 1, +- .sys_pre_div = 1, +- .sys_div = 2, ++ ++static const struct ov8865_pll1_config ov8865_pll1_configs_native[] = { ++ { /* 19.2 MHz input clock */ ++ .pll_pre_div_half = 1, ++ .pll_pre_div = 2, ++ .pll_mul = 75, ++ .m_div = 1, ++ .mipi_div = 3, ++ .pclk_div = 1, ++ .sys_pre_div = 1, ++ .sys_div = 2, ++ }, ++ { /* 24MHz input clock */ ++ .pll_pre_div_half = 1, ++ .pll_pre_div = 0, ++ .pll_mul = 30, ++ .m_div = 1, ++ .mipi_div = 3, ++ .pclk_div = 1, ++ .sys_pre_div = 1, ++ .sys_div = 2, ++ }, + }; + + /* +- * EXTCLK = 24 MHz + * DAC_CLK = 360 MHz + * SCLK = 144 MHz + */ + +-static const struct ov8865_pll2_config ov8865_pll2_config_native = { +- .pll_pre_div_half = 1, +- .pll_pre_div = 0, +- .pll_mul = 30, +- .dac_div = 2, +- .sys_pre_div = 5, +- .sys_div = 0, ++static const struct ov8865_pll2_config ov8865_pll2_configs_native[] = { ++ /* 19.2MHz input clock */ ++ { ++ .pll_pre_div_half = 1, ++ .pll_pre_div = 5, ++ .pll_mul = 75, ++ .dac_div = 1, ++ .sys_pre_div = 1, ++ .sys_div = 3, ++ }, ++ /* 24MHz input clock */ ++ { ++ .pll_pre_div_half = 1, ++ .pll_pre_div = 0, ++ .pll_mul = 30, ++ .dac_div = 2, ++ .sys_pre_div = 5, ++ .sys_div = 0, ++ } + }; + + /* +- * EXTCLK = 24 MHz + * DAC_CLK = 360 MHz + * SCLK = 72 MHz + */ + +-static const struct ov8865_pll2_config ov8865_pll2_config_binning = { ++static const struct ov8865_pll2_config ov8865_pll2_configs_binning[] = { ++ /* 19.2MHz input clock */ ++ { ++ .pll_pre_div_half = 1, ++ .pll_pre_div = 2, ++ .pll_mul = 75, ++ .dac_div = 2, ++ .sys_pre_div = 10, ++ .sys_div = 0, ++ }, ++ /* 24MHz input clock */ ++ { + .pll_pre_div_half = 1, + .pll_pre_div = 0, + .pll_mul = 30, + .dac_div = 2, + .sys_pre_div = 10, + .sys_div = 0, ++ } + }; + + static const struct ov8865_sclk_config ov8865_sclk_config_native = { +@@ -934,8 +967,8 @@ static const struct ov8865_mode ov8865_modes[] = { + .frame_interval = { 1, 30 }, + + /* PLL */ +- .pll1_config = &ov8865_pll1_config_native, +- .pll2_config = &ov8865_pll2_config_native, ++ .pll1_config = ov8865_pll1_configs_native, ++ .pll2_config = ov8865_pll2_configs_native, + .sclk_config = &ov8865_sclk_config_native, + + /* Registers */ +@@ -990,8 +1023,8 @@ static const struct ov8865_mode ov8865_modes[] = { + .frame_interval = { 1, 30 }, + + /* PLL */ +- .pll1_config = &ov8865_pll1_config_native, +- .pll2_config = &ov8865_pll2_config_native, ++ .pll1_config = ov8865_pll1_configs_native, ++ .pll2_config = ov8865_pll2_configs_native, + .sclk_config = &ov8865_sclk_config_native, + + /* Registers */ +@@ -1050,8 +1083,8 @@ static const struct ov8865_mode ov8865_modes[] = { + .frame_interval = { 1, 30 }, + + /* PLL */ +- .pll1_config = &ov8865_pll1_config_native, +- .pll2_config = &ov8865_pll2_config_binning, ++ .pll1_config = ov8865_pll1_configs_native, ++ .pll2_config = ov8865_pll2_configs_binning, + .sclk_config = &ov8865_sclk_config_native, + + /* Registers */ +@@ -1116,8 +1149,8 @@ static const struct ov8865_mode ov8865_modes[] = { + .frame_interval = { 1, 90 }, + + /* PLL */ +- .pll1_config = &ov8865_pll1_config_native, +- .pll2_config = &ov8865_pll2_config_binning, ++ .pll1_config = ov8865_pll1_configs_native, ++ .pll2_config = ov8865_pll2_configs_binning, + .sclk_config = &ov8865_sclk_config_native, + + /* Registers */ +@@ -1266,6 +1299,13 @@ static const struct ov8865_register_value ov8865_init_sequence[] = { + { 0x4503, 0x10 }, + }; + ++/* Clock rate */ ++ ++static const unsigned long supported_extclk_rates[] = { ++ 19200000, ++ 24000000, ++}; ++ + static const s64 ov8865_link_freq_menu[] = { + 360000000, + }; +@@ -1513,12 +1553,11 @@ static int ov8865_isp_configure(struct ov8865_sensor *sensor) + static unsigned long ov8865_mode_pll1_rate(struct ov8865_sensor *sensor, + const struct ov8865_mode *mode) + { +- const struct ov8865_pll1_config *config = mode->pll1_config; +- unsigned long extclk_rate; ++ const struct ov8865_pll1_config *config; + unsigned long pll1_rate; + +- extclk_rate = clk_get_rate(sensor->extclk); +- pll1_rate = extclk_rate * config->pll_mul / config->pll_pre_div_half; ++ config = &mode->pll1_config[sensor->extclk_rate_idx]; ++ pll1_rate = sensor->extclk_rate * config->pll_mul / config->pll_pre_div_half; + + switch (config->pll_pre_div) { + case 0: +@@ -1552,10 +1591,12 @@ static int ov8865_mode_pll1_configure(struct ov8865_sensor *sensor, + const struct ov8865_mode *mode, + u32 mbus_code) + { +- const struct ov8865_pll1_config *config = mode->pll1_config; ++ const struct ov8865_pll1_config *config; + u8 value; + int ret; + ++ config = &mode->pll1_config[sensor->extclk_rate_idx]; ++ + switch (mbus_code) { + case MEDIA_BUS_FMT_SBGGR10_1X10: + value = OV8865_MIPI_BIT_SEL(10); +@@ -1622,9 +1663,11 @@ static int ov8865_mode_pll1_configure(struct ov8865_sensor *sensor, + static int ov8865_mode_pll2_configure(struct ov8865_sensor *sensor, + const struct ov8865_mode *mode) + { +- const struct ov8865_pll2_config *config = mode->pll2_config; ++ const struct ov8865_pll2_config *config; + int ret; + ++ config = &mode->pll2_config[sensor->extclk_rate_idx]; ++ + ret = ov8865_write(sensor, OV8865_PLL_CTRL12_REG, + OV8865_PLL_CTRL12_PRE_DIV_HALF(config->pll_pre_div_half) | + OV8865_PLL_CTRL12_DAC_DIV(config->dac_div)); +@@ -2053,9 +2096,11 @@ static int ov8865_mode_configure(struct ov8865_sensor *sensor, + static unsigned long ov8865_mode_mipi_clk_rate(struct ov8865_sensor *sensor, + const struct ov8865_mode *mode) + { +- const struct ov8865_pll1_config *config = mode->pll1_config; ++ const struct ov8865_pll1_config *config; + unsigned long pll1_rate; + ++ config = &mode->pll1_config[sensor->extclk_rate_idx]; ++ + pll1_rate = ov8865_mode_pll1_rate(sensor, mode); + + return pll1_rate / config->m_div / 2; +@@ -2784,7 +2829,8 @@ static int ov8865_probe(struct i2c_client *client) + struct ov8865_sensor *sensor; + struct v4l2_subdev *subdev; + struct media_pad *pad; +- unsigned long rate; ++ unsigned int rate; ++ unsigned int i; + int ret; + + sensor = devm_kzalloc(dev, sizeof(*sensor), GFP_KERNEL); +@@ -2861,13 +2907,38 @@ static int ov8865_probe(struct i2c_client *client) + goto error_endpoint; + } + +- rate = clk_get_rate(sensor->extclk); +- if (rate != OV8865_EXTCLK_RATE) { +- dev_err(dev, "clock rate %lu Hz is unsupported\n", rate); ++ /* ++ * We could have either a 24MHz or 19.2MHz clock rate. Check for a ++ * clock-frequency property and if found, set that rate. This should ++ * cover ACPI case. If the system uses devicetree then the configured ++ * rate should already be set, so we'll have to check it. ++ */ ++ ++ ret = fwnode_property_read_u32(fwnode, "clock-frequency", &rate); ++ if (!ret) { ++ ret = clk_set_rate(sensor->extclk, rate); ++ if (ret) { ++ dev_err(dev, "failed to set clock rate\n"); ++ return ret; ++ } ++ } ++ ++ sensor->extclk_rate = clk_get_rate(sensor->extclk); ++ ++ for (i = 0; i < ARRAY_SIZE(supported_extclk_rates); i++) { ++ if (sensor->extclk_rate == supported_extclk_rates[i]) ++ break; ++ } ++ ++ if (i == ARRAY_SIZE(supported_extclk_rates)) { ++ dev_err(dev, "clock rate %lu Hz is unsupported\n", ++ sensor->extclk_rate); + ret = -EINVAL; + goto error_endpoint; + } + ++ sensor->extclk_rate_idx = i; ++ + /* Subdev, entity and pad */ + + subdev = &sensor->subdev; +-- +2.33.0 + +From c20ba8696c4ca6b782f672bb8c121ebbea8a0a29 Mon Sep 17 00:00:00 2001 +From: Daniel Scally +Date: Sat, 10 Jul 2021 22:19:10 +0100 +Subject: [PATCH] media: i2c: Add .get_selection() support to ov8865 + +The ov8865 drivers media pad ops currently does not include +.get_selection() - add support for that callback. + +Signed-off-by: Daniel Scally +Patchset: cameras +--- + drivers/media/i2c/ov8865.c | 61 ++++++++++++++++++++++++++++++++++++++ + 1 file changed, 61 insertions(+) + +diff --git a/drivers/media/i2c/ov8865.c b/drivers/media/i2c/ov8865.c +index 53e6bcbe18d6..2f487c25ed56 100644 +--- a/drivers/media/i2c/ov8865.c ++++ b/drivers/media/i2c/ov8865.c +@@ -450,6 +450,15 @@ + #define OV8865_PRE_CTRL0_PATTERN_COLOR_SQUARES 2 + #define OV8865_PRE_CTRL0_PATTERN_BLACK 3 + ++/* Pixel Array */ ++ ++#define OV8865_NATIVE_WIDTH 3296 ++#define OV8865_NATIVE_HEIGHT 2528 ++#define OV8865_ACTIVE_START_TOP 32 ++#define OV8865_ACTIVE_START_LEFT 80 ++#define OV8865_ACTIVE_WIDTH 3264 ++#define OV8865_ACTIVE_HEIGHT 2448 ++ + /* Macros */ + + #define ov8865_subdev_sensor(s) \ +@@ -2743,12 +2752,64 @@ static int ov8865_enum_frame_interval(struct v4l2_subdev *subdev, + return 0; + } + ++static void ++__ov8865_get_pad_crop(struct ov8865_sensor *sensor, ++ struct v4l2_subdev_state *state, unsigned int pad, ++ enum v4l2_subdev_format_whence which, struct v4l2_rect *r) ++{ ++ switch (which) { ++ case V4L2_SUBDEV_FORMAT_TRY: ++ *r = *v4l2_subdev_get_try_crop(&sensor->subdev, state, pad); ++ break; ++ case V4L2_SUBDEV_FORMAT_ACTIVE: ++ r->height = sensor->state.mode->output_size_y; ++ r->width = sensor->state.mode->output_size_x; ++ r->top = (OV8865_NATIVE_HEIGHT - sensor->state.mode->output_size_y) / 2; ++ r->left = (OV8865_NATIVE_WIDTH - sensor->state.mode->output_size_x) / 2; ++ break; ++ } ++} ++ ++static int ov8865_get_selection(struct v4l2_subdev *subdev, ++ struct v4l2_subdev_state *state, ++ struct v4l2_subdev_selection *sel) ++{ ++ struct ov8865_sensor *sensor = ov8865_subdev_sensor(subdev); ++ ++ switch (sel->target) { ++ case V4L2_SEL_TGT_CROP: ++ mutex_lock(&sensor->mutex); ++ __ov8865_get_pad_crop(sensor, state, sel->pad, ++ sel->which, &sel->r); ++ mutex_unlock(&sensor->mutex); ++ break; ++ case V4L2_SEL_TGT_NATIVE_SIZE: ++ sel->r.top = 0; ++ sel->r.left = 0; ++ sel->r.width = OV8865_NATIVE_WIDTH; ++ sel->r.height = OV8865_NATIVE_HEIGHT; ++ break; ++ case V4L2_SEL_TGT_CROP_BOUNDS: ++ case V4L2_SEL_TGT_CROP_DEFAULT: ++ sel->r.top = OV8865_ACTIVE_START_TOP; ++ sel->r.left = OV8865_ACTIVE_START_LEFT; ++ sel->r.width = OV8865_ACTIVE_WIDTH; ++ sel->r.height = OV8865_ACTIVE_HEIGHT; ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ + static const struct v4l2_subdev_pad_ops ov8865_subdev_pad_ops = { + .enum_mbus_code = ov8865_enum_mbus_code, + .get_fmt = ov8865_get_fmt, + .set_fmt = ov8865_set_fmt, + .enum_frame_size = ov8865_enum_frame_size, + .enum_frame_interval = ov8865_enum_frame_interval, ++ .get_selection = ov8865_get_selection, + }; + + static const struct v4l2_subdev_ops ov8865_subdev_ops = { +-- +2.33.0 + +From 4b68f4ce141004f4e31f2f05e1b260cb7ac08638 Mon Sep 17 00:00:00 2001 +From: Daniel Scally +Date: Sat, 10 Jul 2021 22:34:43 +0100 +Subject: [PATCH] media: i2c: Switch control to V4L2_CID_ANALOGUE_GAIN + +The V4L2_CID_GAIN control for this driver configures registers that +the datasheet specifies as analogue gain. Switch the control's ID +to V4L2_CID_ANALOGUE_GAIN. + +Signed-off-by: Daniel Scally +Patchset: cameras +--- + drivers/media/i2c/ov8865.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/drivers/media/i2c/ov8865.c b/drivers/media/i2c/ov8865.c +index 2f487c25ed56..b91c952b6ef9 100644 +--- a/drivers/media/i2c/ov8865.c ++++ b/drivers/media/i2c/ov8865.c +@@ -2137,7 +2137,7 @@ static int ov8865_exposure_configure(struct ov8865_sensor *sensor, u32 exposure) + + /* Gain */ + +-static int ov8865_gain_configure(struct ov8865_sensor *sensor, u32 gain) ++static int ov8865_analog_gain_configure(struct ov8865_sensor *sensor, u32 gain) + { + int ret; + +@@ -2447,8 +2447,8 @@ static int ov8865_s_ctrl(struct v4l2_ctrl *ctrl) + if (ret) + return ret; + break; +- case V4L2_CID_GAIN: +- ret = ov8865_gain_configure(sensor, ctrl->val); ++ case V4L2_CID_ANALOGUE_GAIN: ++ ret = ov8865_analog_gain_configure(sensor, ctrl->val); + if (ret) + return ret; + break; +@@ -2493,7 +2493,7 @@ static int ov8865_ctrls_init(struct ov8865_sensor *sensor) + + /* Gain */ + +- v4l2_ctrl_new_std(handler, ops, V4L2_CID_GAIN, 128, 8191, 128, 128); ++ v4l2_ctrl_new_std(handler, ops, V4L2_CID_ANALOGUE_GAIN, 128, 8191, 128, 128); + + /* White Balance */ + +-- +2.33.0 + +From 82e85f81bed79b8e57f006e0cc47c984731653bc Mon Sep 17 00:00:00 2001 +From: Daniel Scally +Date: Mon, 12 Jul 2021 22:54:56 +0100 +Subject: [PATCH] media: i2c: Add vblank control to ov8865 + +Add a V4L2_CID_VBLANK control to the ov8865 driver. + +Signed-off-by: Daniel Scally +Patchset: cameras +--- + drivers/media/i2c/ov8865.c | 34 ++++++++++++++++++++++++++++++++++ + 1 file changed, 34 insertions(+) + +diff --git a/drivers/media/i2c/ov8865.c b/drivers/media/i2c/ov8865.c +index b91c952b6ef9..4430115607a4 100644 +--- a/drivers/media/i2c/ov8865.c ++++ b/drivers/media/i2c/ov8865.c +@@ -183,6 +183,8 @@ + #define OV8865_VTS_H(v) (((v) & GENMASK(11, 8)) >> 8) + #define OV8865_VTS_L_REG 0x380f + #define OV8865_VTS_L(v) ((v) & GENMASK(7, 0)) ++#define OV8865_TIMING_MAX_VTS 0xffff ++#define OV8865_TIMING_MIN_VTS 0x04 + #define OV8865_OFFSET_X_H_REG 0x3810 + #define OV8865_OFFSET_X_H(v) (((v) & GENMASK(15, 8)) >> 8) + #define OV8865_OFFSET_X_L_REG 0x3811 +@@ -658,6 +660,7 @@ struct ov8865_state { + struct ov8865_ctrls { + struct v4l2_ctrl *link_freq; + struct v4l2_ctrl *pixel_rate; ++ struct v4l2_ctrl *vblank; + + struct v4l2_ctrl_handler handler; + }; +@@ -2212,6 +2215,20 @@ static int ov8865_test_pattern_configure(struct ov8865_sensor *sensor, + ov8865_test_pattern_bits[index]); + } + ++/* Blanking */ ++ ++static int ov8865_vts_configure(struct ov8865_sensor *sensor, u32 vblank) ++{ ++ u16 vts = sensor->state.mode->output_size_y + vblank; ++ int ret; ++ ++ ret = ov8865_write(sensor, OV8865_VTS_H_REG, OV8865_VTS_H(vts)); ++ if (ret) ++ return ret; ++ ++ return ov8865_write(sensor, OV8865_VTS_L_REG, OV8865_VTS_L(vts)); ++} ++ + /* State */ + + static int ov8865_state_mipi_configure(struct ov8865_sensor *sensor, +@@ -2463,6 +2480,8 @@ static int ov8865_s_ctrl(struct v4l2_ctrl *ctrl) + case V4L2_CID_TEST_PATTERN: + index = (unsigned int)ctrl->val; + return ov8865_test_pattern_configure(sensor, index); ++ case V4L2_CID_VBLANK: ++ return ov8865_vts_configure(sensor, ctrl->val); + default: + return -EINVAL; + } +@@ -2479,6 +2498,8 @@ static int ov8865_ctrls_init(struct ov8865_sensor *sensor) + struct ov8865_ctrls *ctrls = &sensor->ctrls; + struct v4l2_ctrl_handler *handler = &ctrls->handler; + const struct v4l2_ctrl_ops *ops = &ov8865_ctrl_ops; ++ const struct ov8865_mode *mode = sensor->state.mode; ++ unsigned int vblank_max, vblank_def; + int ret; + + v4l2_ctrl_handler_init(handler, 32); +@@ -2514,6 +2535,13 @@ static int ov8865_ctrls_init(struct ov8865_sensor *sensor) + ARRAY_SIZE(ov8865_test_pattern_menu) - 1, + 0, 0, ov8865_test_pattern_menu); + ++ /* Blanking */ ++ vblank_max = OV8865_TIMING_MAX_VTS - mode->output_size_y; ++ vblank_def = mode->vts - mode->output_size_y; ++ ctrls->vblank = v4l2_ctrl_new_std(handler, ops, V4L2_CID_VBLANK, ++ OV8865_TIMING_MIN_VTS, vblank_max, 1, ++ vblank_def); ++ + /* MIPI CSI-2 */ + + ctrls->link_freq = +@@ -2694,6 +2722,10 @@ static int ov8865_set_fmt(struct v4l2_subdev *subdev, + sensor->state.mbus_code != mbus_code) + ret = ov8865_state_configure(sensor, mode, mbus_code); + ++ __v4l2_ctrl_modify_range(sensor->ctrls.vblank, OV8865_TIMING_MIN_VTS, ++ OV8865_TIMING_MAX_VTS - mode->output_size_y, ++ 1, mode->vts - mode->output_size_y); ++ + complete: + mutex_unlock(&sensor->mutex); + +@@ -3021,6 +3053,8 @@ static int ov8865_probe(struct i2c_client *client) + + /* Sensor */ + ++ sensor->state.mode = &ov8865_modes[0]; ++ + ret = ov8865_ctrls_init(sensor); + if (ret) + goto error_mutex; +-- +2.33.0 + +From 3ba44b92b9777f31aaf5b52c7facac7e1715d306 Mon Sep 17 00:00:00 2001 +From: Daniel Scally +Date: Tue, 13 Jul 2021 23:40:33 +0100 +Subject: [PATCH] media: i2c: Add hblank control to ov8865 + +Add a V4L2_CID_HBLANK control to the ov8865 driver. This is read only +with timing control intended to be done via vblanking alone. + +Signed-off-by: Daniel Scally +Patchset: cameras +--- + drivers/media/i2c/ov8865.c | 14 ++++++++++++++ + 1 file changed, 14 insertions(+) + +diff --git a/drivers/media/i2c/ov8865.c b/drivers/media/i2c/ov8865.c +index 4430115607a4..e9b5f4d8e79b 100644 +--- a/drivers/media/i2c/ov8865.c ++++ b/drivers/media/i2c/ov8865.c +@@ -660,6 +660,7 @@ struct ov8865_state { + struct ov8865_ctrls { + struct v4l2_ctrl *link_freq; + struct v4l2_ctrl *pixel_rate; ++ struct v4l2_ctrl *hblank; + struct v4l2_ctrl *vblank; + + struct v4l2_ctrl_handler handler; +@@ -2500,6 +2501,7 @@ static int ov8865_ctrls_init(struct ov8865_sensor *sensor) + const struct v4l2_ctrl_ops *ops = &ov8865_ctrl_ops; + const struct ov8865_mode *mode = sensor->state.mode; + unsigned int vblank_max, vblank_def; ++ unsigned int hblank; + int ret; + + v4l2_ctrl_handler_init(handler, 32); +@@ -2536,6 +2538,13 @@ static int ov8865_ctrls_init(struct ov8865_sensor *sensor) + 0, 0, ov8865_test_pattern_menu); + + /* Blanking */ ++ hblank = mode->hts < mode->output_size_x ? 0 : mode->hts - mode->output_size_x; ++ ctrls->hblank = v4l2_ctrl_new_std(handler, ops, V4L2_CID_HBLANK, hblank, ++ hblank, 1, hblank); ++ ++ if (ctrls->hblank) ++ ctrls->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY; ++ + vblank_max = OV8865_TIMING_MAX_VTS - mode->output_size_y; + vblank_def = mode->vts - mode->output_size_y; + ctrls->vblank = v4l2_ctrl_new_std(handler, ops, V4L2_CID_VBLANK, +@@ -2682,6 +2691,7 @@ static int ov8865_set_fmt(struct v4l2_subdev *subdev, + struct v4l2_mbus_framefmt *mbus_format = &format->format; + const struct ov8865_mode *mode; + u32 mbus_code = 0; ++ unsigned int hblank; + unsigned int index; + int ret = 0; + +@@ -2726,6 +2736,10 @@ static int ov8865_set_fmt(struct v4l2_subdev *subdev, + OV8865_TIMING_MAX_VTS - mode->output_size_y, + 1, mode->vts - mode->output_size_y); + ++ hblank = mode->hts < mode->output_size_x ? 0 : mode->hts - mode->output_size_x; ++ __v4l2_ctrl_modify_range(sensor->ctrls.hblank, hblank, hblank, 1, ++ hblank); ++ + complete: + mutex_unlock(&sensor->mutex); + +-- +2.33.0 + +From 778dce0a4483b0c593abd80c4277aedc2d386184 Mon Sep 17 00:00:00 2001 +From: Daniel Scally +Date: Tue, 13 Jul 2021 23:43:17 +0100 +Subject: [PATCH] media: i2c: cap exposure at height + vblank in ov8865 + +Exposure limits depend on the total height; when vblank is altered (and +thus the total height is altered), change the exposure limits to reflect +the new cap. + +Signed-off-by: Daniel Scally +Patchset: cameras +--- + drivers/media/i2c/ov8865.c | 24 ++++++++++++++++++++++-- + 1 file changed, 22 insertions(+), 2 deletions(-) + +diff --git a/drivers/media/i2c/ov8865.c b/drivers/media/i2c/ov8865.c +index e9b5f4d8e79b..893cc58dc265 100644 +--- a/drivers/media/i2c/ov8865.c ++++ b/drivers/media/i2c/ov8865.c +@@ -662,6 +662,7 @@ struct ov8865_ctrls { + struct v4l2_ctrl *pixel_rate; + struct v4l2_ctrl *hblank; + struct v4l2_ctrl *vblank; ++ struct v4l2_ctrl *exposure; + + struct v4l2_ctrl_handler handler; + }; +@@ -2455,6 +2456,18 @@ static int ov8865_s_ctrl(struct v4l2_ctrl *ctrl) + unsigned int index; + int ret; + ++ /* If VBLANK is altered we need to update exposure to compensate */ ++ if (ctrl->id == V4L2_CID_VBLANK) { ++ int exposure_max; ++ ++ exposure_max = sensor->state.mode->output_size_y + ctrl->val; ++ __v4l2_ctrl_modify_range(sensor->ctrls.exposure, ++ sensor->ctrls.exposure->minimum, ++ exposure_max, ++ sensor->ctrls.exposure->step, ++ min(sensor->ctrls.exposure->val, exposure_max)); ++ } ++ + /* Wait for the sensor to be on before setting controls. */ + if (pm_runtime_suspended(sensor->dev)) + return 0; +@@ -2511,8 +2524,8 @@ static int ov8865_ctrls_init(struct ov8865_sensor *sensor) + + /* Exposure */ + +- v4l2_ctrl_new_std(handler, ops, V4L2_CID_EXPOSURE, 16, 1048575, 16, +- 512); ++ ctrls->exposure = v4l2_ctrl_new_std(handler, ops, V4L2_CID_EXPOSURE, 16, ++ 1048575, 16, 512); + + /* Gain */ + +@@ -2693,6 +2706,7 @@ static int ov8865_set_fmt(struct v4l2_subdev *subdev, + u32 mbus_code = 0; + unsigned int hblank; + unsigned int index; ++ int exposure_max; + int ret = 0; + + mutex_lock(&sensor->mutex); +@@ -2740,6 +2754,12 @@ static int ov8865_set_fmt(struct v4l2_subdev *subdev, + __v4l2_ctrl_modify_range(sensor->ctrls.hblank, hblank, hblank, 1, + hblank); + ++ exposure_max = mode->vts; ++ __v4l2_ctrl_modify_range(sensor->ctrls.exposure, ++ sensor->ctrls.exposure->minimum, exposure_max, ++ sensor->ctrls.exposure->step, ++ min(sensor->ctrls.exposure->val, exposure_max)); ++ + complete: + mutex_unlock(&sensor->mutex); + +-- +2.33.0 + +From e079f254476a7223b2e07c0f8f37218102fdb7c3 Mon Sep 17 00:00:00 2001 +From: Daniel Scally +Date: Wed, 14 Jul 2021 18:05:44 +0100 +Subject: [PATCH] media: i2c: Remove unused macros from ov8865 + +There are a number of macros defined in this driver that aren't actually +used within it. There's a lot of macros defined in total, so removing the +unused ones helps make it a bit less busy. + +Signed-off-by: Daniel Scally +Patchset: cameras +--- + drivers/media/i2c/ov8865.c | 137 +------------------------------------ + 1 file changed, 1 insertion(+), 136 deletions(-) + +diff --git a/drivers/media/i2c/ov8865.c b/drivers/media/i2c/ov8865.c +index 893cc58dc265..fb81b822987d 100644 +--- a/drivers/media/i2c/ov8865.c ++++ b/drivers/media/i2c/ov8865.c +@@ -46,8 +46,6 @@ + #define OV8865_PLL_CTRL6_REG 0x306 + #define OV8865_PLL_CTRL6_SYS_DIV(v) (((v) - 1) & BIT(0)) + +-#define OV8865_PLL_CTRL8_REG 0x308 +-#define OV8865_PLL_CTRL9_REG 0x309 + #define OV8865_PLL_CTRLA_REG 0x30a + #define OV8865_PLL_CTRLA_PRE_DIV_HALF(v) (((v) - 1) & BIT(0)) + #define OV8865_PLL_CTRLB_REG 0x30b +@@ -60,41 +58,21 @@ + #define OV8865_PLL_CTRLE_SYS_DIV(v) ((v) & GENMASK(2, 0)) + #define OV8865_PLL_CTRLF_REG 0x30f + #define OV8865_PLL_CTRLF_SYS_PRE_DIV(v) (((v) - 1) & GENMASK(3, 0)) +-#define OV8865_PLL_CTRL10_REG 0x310 +-#define OV8865_PLL_CTRL11_REG 0x311 + #define OV8865_PLL_CTRL12_REG 0x312 + #define OV8865_PLL_CTRL12_PRE_DIV_HALF(v) ((((v) - 1) << 4) & BIT(4)) + #define OV8865_PLL_CTRL12_DAC_DIV(v) (((v) - 1) & GENMASK(3, 0)) + +-#define OV8865_PLL_CTRL1B_REG 0x31b +-#define OV8865_PLL_CTRL1C_REG 0x31c +- + #define OV8865_PLL_CTRL1E_REG 0x31e + #define OV8865_PLL_CTRL1E_PLL1_NO_LAT BIT(3) + +-#define OV8865_PAD_OEN0_REG 0x3000 +- +-#define OV8865_PAD_OEN2_REG 0x3002 +- +-#define OV8865_CLK_RST5_REG 0x3005 +- + #define OV8865_CHIP_ID_HH_REG 0x300a + #define OV8865_CHIP_ID_HH_VALUE 0x00 + #define OV8865_CHIP_ID_H_REG 0x300b + #define OV8865_CHIP_ID_H_VALUE 0x88 + #define OV8865_CHIP_ID_L_REG 0x300c + #define OV8865_CHIP_ID_L_VALUE 0x65 +-#define OV8865_PAD_OUT2_REG 0x300d +- +-#define OV8865_PAD_SEL2_REG 0x3010 +-#define OV8865_PAD_PK_REG 0x3011 +-#define OV8865_PAD_PK_DRIVE_STRENGTH_1X (0 << 5) +-#define OV8865_PAD_PK_DRIVE_STRENGTH_2X (1 << 5) +-#define OV8865_PAD_PK_DRIVE_STRENGTH_3X (2 << 5) +-#define OV8865_PAD_PK_DRIVE_STRENGTH_4X (3 << 5) + + #define OV8865_PUMP_CLK_DIV_REG 0x3015 +-#define OV8865_PUMP_CLK_DIV_PUMP_N(v) (((v) << 4) & GENMASK(6, 4)) + #define OV8865_PUMP_CLK_DIV_PUMP_P(v) ((v) & GENMASK(2, 0)) + + #define OV8865_MIPI_SC_CTRL0_REG 0x3018 +@@ -102,21 +80,12 @@ + GENMASK(7, 5)) + #define OV8865_MIPI_SC_CTRL0_MIPI_EN BIT(4) + #define OV8865_MIPI_SC_CTRL0_UNKNOWN BIT(1) +-#define OV8865_MIPI_SC_CTRL0_LANES_PD_MIPI BIT(0) +-#define OV8865_MIPI_SC_CTRL1_REG 0x3019 +-#define OV8865_CLK_RST0_REG 0x301a +-#define OV8865_CLK_RST1_REG 0x301b +-#define OV8865_CLK_RST2_REG 0x301c +-#define OV8865_CLK_RST3_REG 0x301d +-#define OV8865_CLK_RST4_REG 0x301e + + #define OV8865_PCLK_SEL_REG 0x3020 + #define OV8865_PCLK_SEL_PCLK_DIV_MASK BIT(3) + #define OV8865_PCLK_SEL_PCLK_DIV(v) ((((v) - 1) << 3) & BIT(3)) + +-#define OV8865_MISC_CTRL_REG 0x3021 + #define OV8865_MIPI_SC_CTRL2_REG 0x3022 +-#define OV8865_MIPI_SC_CTRL2_CLK_LANES_PD_MIPI BIT(1) + #define OV8865_MIPI_SC_CTRL2_PD_MIPI_RST_SYNC BIT(0) + + #define OV8865_MIPI_BIT_SEL_REG 0x3031 +@@ -125,7 +94,6 @@ + #define OV8865_CLK_SEL0_PLL1_SYS_SEL(v) (((v) << 7) & BIT(7)) + #define OV8865_CLK_SEL1_REG 0x3033 + #define OV8865_CLK_SEL1_MIPI_EOF BIT(5) +-#define OV8865_CLK_SEL1_UNKNOWN BIT(2) + #define OV8865_CLK_SEL1_PLL_SCLK_SEL_MASK BIT(1) + #define OV8865_CLK_SEL1_PLL_SCLK_SEL(v) (((v) << 1) & BIT(1)) + +@@ -142,7 +110,6 @@ + #define OV8865_EXPOSURE_CTRL_H(v) (((v) & GENMASK(15, 8)) >> 8) + #define OV8865_EXPOSURE_CTRL_L_REG 0x3502 + #define OV8865_EXPOSURE_CTRL_L(v) ((v) & GENMASK(7, 0)) +-#define OV8865_EXPOSURE_GAIN_MANUAL_REG 0x3503 + + #define OV8865_GAIN_CTRL_H_REG 0x3508 + #define OV8865_GAIN_CTRL_H(v) (((v) & GENMASK(12, 8)) >> 8) +@@ -197,18 +164,6 @@ + #define OV8865_INC_X_ODD(v) ((v) & GENMASK(4, 0)) + #define OV8865_INC_X_EVEN_REG 0x3815 + #define OV8865_INC_X_EVEN(v) ((v) & GENMASK(4, 0)) +-#define OV8865_VSYNC_START_H_REG 0x3816 +-#define OV8865_VSYNC_START_H(v) (((v) & GENMASK(15, 8)) >> 8) +-#define OV8865_VSYNC_START_L_REG 0x3817 +-#define OV8865_VSYNC_START_L(v) ((v) & GENMASK(7, 0)) +-#define OV8865_VSYNC_END_H_REG 0x3818 +-#define OV8865_VSYNC_END_H(v) (((v) & GENMASK(15, 8)) >> 8) +-#define OV8865_VSYNC_END_L_REG 0x3819 +-#define OV8865_VSYNC_END_L(v) ((v) & GENMASK(7, 0)) +-#define OV8865_HSYNC_FIRST_H_REG 0x381a +-#define OV8865_HSYNC_FIRST_H(v) (((v) & GENMASK(15, 8)) >> 8) +-#define OV8865_HSYNC_FIRST_L_REG 0x381b +-#define OV8865_HSYNC_FIRST_L(v) ((v) & GENMASK(7, 0)) + + #define OV8865_FORMAT1_REG 0x3820 + #define OV8865_FORMAT1_FLIP_VERT_ISP_EN BIT(2) +@@ -240,10 +195,6 @@ + #define OV8865_AUTO_SIZE_CTRL_CROP_END_X_REG BIT(2) + #define OV8865_AUTO_SIZE_CTRL_CROP_START_Y_REG BIT(1) + #define OV8865_AUTO_SIZE_CTRL_CROP_START_X_REG BIT(0) +-#define OV8865_AUTO_SIZE_X_OFFSET_H_REG 0x3842 +-#define OV8865_AUTO_SIZE_X_OFFSET_L_REG 0x3843 +-#define OV8865_AUTO_SIZE_Y_OFFSET_H_REG 0x3844 +-#define OV8865_AUTO_SIZE_Y_OFFSET_L_REG 0x3845 + #define OV8865_AUTO_SIZE_BOUNDARIES_REG 0x3846 + #define OV8865_AUTO_SIZE_BOUNDARIES_Y(v) (((v) << 4) & GENMASK(7, 4)) + #define OV8865_AUTO_SIZE_BOUNDARIES_X(v) ((v) & GENMASK(3, 0)) +@@ -259,30 +210,10 @@ + #define OV8865_BLC_CTRL0_TRIG_FORMAT_EN BIT(6) + #define OV8865_BLC_CTRL0_TRIG_GAIN_EN BIT(5) + #define OV8865_BLC_CTRL0_TRIG_EXPOSURE_EN BIT(4) +-#define OV8865_BLC_CTRL0_TRIG_MANUAL_EN BIT(3) +-#define OV8865_BLC_CTRL0_FREEZE_EN BIT(2) +-#define OV8865_BLC_CTRL0_ALWAYS_EN BIT(1) + #define OV8865_BLC_CTRL0_FILTER_EN BIT(0) + #define OV8865_BLC_CTRL1_REG 0x4001 +-#define OV8865_BLC_CTRL1_DITHER_EN BIT(7) +-#define OV8865_BLC_CTRL1_ZERO_LINE_DIFF_EN BIT(6) +-#define OV8865_BLC_CTRL1_COL_SHIFT_256 (0 << 4) + #define OV8865_BLC_CTRL1_COL_SHIFT_128 (1 << 4) +-#define OV8865_BLC_CTRL1_COL_SHIFT_64 (2 << 4) +-#define OV8865_BLC_CTRL1_COL_SHIFT_32 (3 << 4) + #define OV8865_BLC_CTRL1_OFFSET_LIMIT_EN BIT(2) +-#define OV8865_BLC_CTRL1_COLUMN_CANCEL_EN BIT(1) +-#define OV8865_BLC_CTRL2_REG 0x4002 +-#define OV8865_BLC_CTRL3_REG 0x4003 +-#define OV8865_BLC_CTRL4_REG 0x4004 +-#define OV8865_BLC_CTRL5_REG 0x4005 +-#define OV8865_BLC_CTRL6_REG 0x4006 +-#define OV8865_BLC_CTRL7_REG 0x4007 +-#define OV8865_BLC_CTRL8_REG 0x4008 +-#define OV8865_BLC_CTRL9_REG 0x4009 +-#define OV8865_BLC_CTRLA_REG 0x400a +-#define OV8865_BLC_CTRLB_REG 0x400b +-#define OV8865_BLC_CTRLC_REG 0x400c + #define OV8865_BLC_CTRLD_REG 0x400d + #define OV8865_BLC_CTRLD_OFFSET_TRIGGER(v) ((v) & GENMASK(7, 0)) + +@@ -337,66 +268,8 @@ + + /* MIPI */ + +-#define OV8865_MIPI_CTRL0_REG 0x4800 +-#define OV8865_MIPI_CTRL1_REG 0x4801 +-#define OV8865_MIPI_CTRL2_REG 0x4802 +-#define OV8865_MIPI_CTRL3_REG 0x4803 +-#define OV8865_MIPI_CTRL4_REG 0x4804 +-#define OV8865_MIPI_CTRL5_REG 0x4805 +-#define OV8865_MIPI_CTRL6_REG 0x4806 +-#define OV8865_MIPI_CTRL7_REG 0x4807 +-#define OV8865_MIPI_CTRL8_REG 0x4808 +- +-#define OV8865_MIPI_FCNT_MAX_H_REG 0x4810 +-#define OV8865_MIPI_FCNT_MAX_L_REG 0x4811 +- +-#define OV8865_MIPI_CTRL13_REG 0x4813 +-#define OV8865_MIPI_CTRL14_REG 0x4814 +-#define OV8865_MIPI_CTRL15_REG 0x4815 +-#define OV8865_MIPI_EMBEDDED_DT_REG 0x4816 +- +-#define OV8865_MIPI_HS_ZERO_MIN_H_REG 0x4818 +-#define OV8865_MIPI_HS_ZERO_MIN_L_REG 0x4819 +-#define OV8865_MIPI_HS_TRAIL_MIN_H_REG 0x481a +-#define OV8865_MIPI_HS_TRAIL_MIN_L_REG 0x481b +-#define OV8865_MIPI_CLK_ZERO_MIN_H_REG 0x481c +-#define OV8865_MIPI_CLK_ZERO_MIN_L_REG 0x481d +-#define OV8865_MIPI_CLK_PREPARE_MAX_REG 0x481e +-#define OV8865_MIPI_CLK_PREPARE_MIN_REG 0x481f +-#define OV8865_MIPI_CLK_POST_MIN_H_REG 0x4820 +-#define OV8865_MIPI_CLK_POST_MIN_L_REG 0x4821 +-#define OV8865_MIPI_CLK_TRAIL_MIN_H_REG 0x4822 +-#define OV8865_MIPI_CLK_TRAIL_MIN_L_REG 0x4823 +-#define OV8865_MIPI_LPX_P_MIN_H_REG 0x4824 +-#define OV8865_MIPI_LPX_P_MIN_L_REG 0x4825 +-#define OV8865_MIPI_HS_PREPARE_MIN_REG 0x4826 +-#define OV8865_MIPI_HS_PREPARE_MAX_REG 0x4827 +-#define OV8865_MIPI_HS_EXIT_MIN_H_REG 0x4828 +-#define OV8865_MIPI_HS_EXIT_MIN_L_REG 0x4829 +-#define OV8865_MIPI_UI_HS_ZERO_MIN_REG 0x482a +-#define OV8865_MIPI_UI_HS_TRAIL_MIN_REG 0x482b +-#define OV8865_MIPI_UI_CLK_ZERO_MIN_REG 0x482c +-#define OV8865_MIPI_UI_CLK_PREPARE_REG 0x482d +-#define OV8865_MIPI_UI_CLK_POST_MIN_REG 0x482e +-#define OV8865_MIPI_UI_CLK_TRAIL_MIN_REG 0x482f +-#define OV8865_MIPI_UI_LPX_P_MIN_REG 0x4830 +-#define OV8865_MIPI_UI_HS_PREPARE_REG 0x4831 +-#define OV8865_MIPI_UI_HS_EXIT_MIN_REG 0x4832 +-#define OV8865_MIPI_PKT_START_SIZE_REG 0x4833 +- + #define OV8865_MIPI_PCLK_PERIOD_REG 0x4837 +-#define OV8865_MIPI_LP_GPIO0_REG 0x4838 +-#define OV8865_MIPI_LP_GPIO1_REG 0x4839 +- +-#define OV8865_MIPI_CTRL3C_REG 0x483c +-#define OV8865_MIPI_LP_GPIO4_REG 0x483d +- +-#define OV8865_MIPI_CTRL4A_REG 0x484a +-#define OV8865_MIPI_CTRL4B_REG 0x484b +-#define OV8865_MIPI_CTRL4C_REG 0x484c +-#define OV8865_MIPI_LANE_TEST_PATTERN_REG 0x484d +-#define OV8865_MIPI_FRAME_END_DELAY_REG 0x484e +-#define OV8865_MIPI_CLOCK_TEST_PATTERN_REG 0x484f ++ + #define OV8865_MIPI_LANE_SEL01_REG 0x4850 + #define OV8865_MIPI_LANE_SEL01_LANE0(v) (((v) << 0) & GENMASK(2, 0)) + #define OV8865_MIPI_LANE_SEL01_LANE1(v) (((v) << 4) & GENMASK(6, 4)) +@@ -407,7 +280,6 @@ + /* ISP */ + + #define OV8865_ISP_CTRL0_REG 0x5000 +-#define OV8865_ISP_CTRL0_LENC_EN BIT(7) + #define OV8865_ISP_CTRL0_WHITE_BALANCE_EN BIT(4) + #define OV8865_ISP_CTRL0_DPC_BLACK_EN BIT(2) + #define OV8865_ISP_CTRL0_DPC_WHITE_EN BIT(1) +@@ -416,17 +288,11 @@ + #define OV8865_ISP_CTRL2_REG 0x5002 + #define OV8865_ISP_CTRL2_DEBUG BIT(3) + #define OV8865_ISP_CTRL2_VARIOPIXEL_EN BIT(2) +-#define OV8865_ISP_CTRL2_VSYNC_LATCH_EN BIT(0) +-#define OV8865_ISP_CTRL3_REG 0x5003 + + #define OV8865_ISP_GAIN_RED_H_REG 0x5018 + #define OV8865_ISP_GAIN_RED_H(v) (((v) & GENMASK(13, 6)) >> 6) + #define OV8865_ISP_GAIN_RED_L_REG 0x5019 + #define OV8865_ISP_GAIN_RED_L(v) ((v) & GENMASK(5, 0)) +-#define OV8865_ISP_GAIN_GREEN_H_REG 0x501a +-#define OV8865_ISP_GAIN_GREEN_H(v) (((v) & GENMASK(13, 6)) >> 6) +-#define OV8865_ISP_GAIN_GREEN_L_REG 0x501b +-#define OV8865_ISP_GAIN_GREEN_L(v) ((v) & GENMASK(5, 0)) + #define OV8865_ISP_GAIN_BLUE_H_REG 0x501c + #define OV8865_ISP_GAIN_BLUE_H(v) (((v) & GENMASK(13, 6)) >> 6) + #define OV8865_ISP_GAIN_BLUE_L_REG 0x501d +@@ -434,7 +300,6 @@ + + /* VarioPixel */ + +-#define OV8865_VAP_CTRL0_REG 0x5900 + #define OV8865_VAP_CTRL1_REG 0x5901 + #define OV8865_VAP_CTRL1_HSUB_COEF(v) ((((v) - 1) << 2) & \ + GENMASK(3, 2)) +-- +2.33.0 + +From 9d1155ccf592adbdfb3f1b90be5fc3b7faec9831 Mon Sep 17 00:00:00 2001 +From: Daniel Scally +Date: Fri, 16 Jul 2021 00:00:54 +0100 +Subject: [PATCH] media: i2c: Switch exposure control unit to lines + +The ov8865 driver currently has the unit of the V4L2_CID_EXPOSURE control +as 1/16th of a line. This is what the sensor expects, but isn't very +intuitive. Switch the control to be in units of a line and simply do the +16x multiplication before passing the value to the sensor. + +The datasheet for this sensor gives minimum exposure as 2 lines, so take +the opportunity to correct the lower bounds of the control. + +Signed-off-by: Daniel Scally +Patchset: cameras +--- + drivers/media/i2c/ov8865.c | 7 +++++-- + 1 file changed, 5 insertions(+), 2 deletions(-) + +diff --git a/drivers/media/i2c/ov8865.c b/drivers/media/i2c/ov8865.c +index fb81b822987d..27520c731e47 100644 +--- a/drivers/media/i2c/ov8865.c ++++ b/drivers/media/i2c/ov8865.c +@@ -1991,6 +1991,9 @@ static int ov8865_exposure_configure(struct ov8865_sensor *sensor, u32 exposure) + { + int ret; + ++ /* The sensor stores exposure in units of 1/16th of a line */ ++ exposure *= 16; ++ + ret = ov8865_write(sensor, OV8865_EXPOSURE_CTRL_HH_REG, + OV8865_EXPOSURE_CTRL_HH(exposure)); + if (ret) +@@ -2389,8 +2392,8 @@ static int ov8865_ctrls_init(struct ov8865_sensor *sensor) + + /* Exposure */ + +- ctrls->exposure = v4l2_ctrl_new_std(handler, ops, V4L2_CID_EXPOSURE, 16, +- 1048575, 16, 512); ++ ctrls->exposure = v4l2_ctrl_new_std(handler, ops, V4L2_CID_EXPOSURE, 2, ++ 65535, 1, 32); + + /* Gain */ + +-- +2.33.0 + +From 54967f8d933a63945c75fb67eb9beb9a4a73fb02 Mon Sep 17 00:00:00 2001 +From: Daniel Scally +Date: Fri, 16 Jul 2021 22:56:15 +0100 +Subject: [PATCH] media: i2c: Add controls from fwnode to ov8865 + +Add V4L2_CID_ORIENTATION and V4L2_CID_ROTATION controls to the ov8865 +driver by attempting to parse them from firmware. + +Signed-off-by: Daniel Scally +Patchset: cameras +--- + drivers/media/i2c/ov8865.c | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +diff --git a/drivers/media/i2c/ov8865.c b/drivers/media/i2c/ov8865.c +index 27520c731e47..f746917719ae 100644 +--- a/drivers/media/i2c/ov8865.c ++++ b/drivers/media/i2c/ov8865.c +@@ -2381,6 +2381,7 @@ static int ov8865_ctrls_init(struct ov8865_sensor *sensor) + struct v4l2_ctrl_handler *handler = &ctrls->handler; + const struct v4l2_ctrl_ops *ops = &ov8865_ctrl_ops; + const struct ov8865_mode *mode = sensor->state.mode; ++ struct v4l2_fwnode_device_properties props; + unsigned int vblank_max, vblank_def; + unsigned int hblank; + int ret; +@@ -2443,6 +2444,15 @@ static int ov8865_ctrls_init(struct ov8865_sensor *sensor) + v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE, 1, + INT_MAX, 1, 1); + ++ /* set properties from fwnode (e.g. rotation, orientation) */ ++ ret = v4l2_fwnode_device_parse(sensor->dev, &props); ++ if (ret) ++ goto error_ctrls; ++ ++ ret = v4l2_ctrl_new_fwnode_properties(handler, ops, &props); ++ if (ret) ++ goto error_ctrls; ++ + if (handler->error) { + ret = handler->error; + goto error_ctrls; +-- +2.33.0 + +From b460f04ba976f91774f3dd797c426d6cf9ca4399 Mon Sep 17 00:00:00 2001 +From: Daniel Scally +Date: Wed, 14 Jul 2021 00:05:04 +0100 +Subject: [PATCH] media: ipu3-cio2: Add INT347A to cio2-bridge + +ACPI _HID INT347A represents the OV8865 sensor, the driver for which can +support the platforms that the cio2-bridge serves. Add it to the array +of supported sensors so the bridge will connect the sensor to the CIO2 +device. + +Signed-off-by: Daniel Scally +Patchset: cameras +--- + drivers/media/pci/intel/ipu3/cio2-bridge.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/media/pci/intel/ipu3/cio2-bridge.c b/drivers/media/pci/intel/ipu3/cio2-bridge.c +index 7e582135dfb8..045b15498aca 100644 +--- a/drivers/media/pci/intel/ipu3/cio2-bridge.c ++++ b/drivers/media/pci/intel/ipu3/cio2-bridge.c +@@ -24,6 +24,8 @@ static const struct cio2_sensor_config cio2_supported_sensors[] = { + CIO2_SENSOR_CONFIG("INT33BE", 0), + /* Omnivision OV2680 */ + CIO2_SENSOR_CONFIG("OVTI2680", 0), ++ /* Omnivision OV8865 */ ++ CIO2_SENSOR_CONFIG("INT347A", 1, 360000000), + }; + + static const struct cio2_property_names prop_names = { +-- +2.33.0 + diff --git a/patches/5.14/0009-amd-gpio.patch b/patches/5.14/0009-amd-gpio.patch new file mode 100644 index 000000000..f655946ff --- /dev/null +++ b/patches/5.14/0009-amd-gpio.patch @@ -0,0 +1,109 @@ +From b6b6a3cb43adec1b0f9951fd421fe55623f8c2a4 Mon Sep 17 00:00:00 2001 +From: Sachi King +Date: Sat, 29 May 2021 17:47:38 +1000 +Subject: [PATCH] ACPI: Add quirk for Surface Laptop 4 AMD missing irq 7 + override + +This patch is the work of Thomas Gleixner and is +copied from: +https://lore.kernel.org/lkml/87lf8ddjqx.ffs@nanos.tec.linutronix.de/ + +This patch adds a quirk to the ACPI setup to patch in the the irq 7 pin +setup that is missing in the laptops ACPI table. + +This patch was used for validation of the issue, and is not a proper +fix, but is probably a better temporary hack than continuing to probe +the Legacy PIC and run with the PIC in an unknown state. + +Patchset: amd-gpio +--- + arch/x86/kernel/acpi/boot.c | 17 +++++++++++++++++ + 1 file changed, 17 insertions(+) + +diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c +index e55e0c1fad8c..46dfad41b401 100644 +--- a/arch/x86/kernel/acpi/boot.c ++++ b/arch/x86/kernel/acpi/boot.c +@@ -22,6 +22,7 @@ + #include + #include + #include ++#include + + #include + #include +@@ -1143,6 +1144,17 @@ static void __init mp_config_acpi_legacy_irqs(void) + } + } + ++static const struct dmi_system_id surface_quirk[] __initconst = { ++ { ++ .ident = "Microsoft Surface Laptop 4 (AMD)", ++ .matches = { ++ DMI_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"), ++ DMI_MATCH(DMI_PRODUCT_SKU, "Surface_Laptop_4_1952:1953") ++ }, ++ }, ++ {} ++}; ++ + /* + * Parse IOAPIC related entries in MADT + * returns 0 on success, < 0 on error +@@ -1198,6 +1210,11 @@ static int __init acpi_parse_madt_ioapic_entries(void) + acpi_sci_ioapic_setup(acpi_gbl_FADT.sci_interrupt, 0, 0, + acpi_gbl_FADT.sci_interrupt); + ++ if (dmi_check_system(surface_quirk)) { ++ pr_warn("Surface hack: Override irq 7\n"); ++ mp_override_legacy_irq(7, 3, 3, 7); ++ } ++ + /* Fill in identity legacy mappings where no override */ + mp_config_acpi_legacy_irqs(); + +-- +2.33.0 + +From d99c891ab3b5956ef33ab6e821ab8183496279bc Mon Sep 17 00:00:00 2001 +From: Maximilian Luz +Date: Thu, 3 Jun 2021 14:04:26 +0200 +Subject: [PATCH] ACPI: Add AMD 13" Surface Laptop 4 model to irq 7 override + quirk + +The 13" version of the Surface Laptop 4 has the same problem as the 15" +version, but uses a different SKU. Add that SKU to the quirk as well. + +Patchset: amd-gpio +--- + arch/x86/kernel/acpi/boot.c | 9 ++++++++- + 1 file changed, 8 insertions(+), 1 deletion(-) + +diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c +index 46dfad41b401..78bf6a097dc5 100644 +--- a/arch/x86/kernel/acpi/boot.c ++++ b/arch/x86/kernel/acpi/boot.c +@@ -1146,12 +1146,19 @@ static void __init mp_config_acpi_legacy_irqs(void) + + static const struct dmi_system_id surface_quirk[] __initconst = { + { +- .ident = "Microsoft Surface Laptop 4 (AMD)", ++ .ident = "Microsoft Surface Laptop 4 (AMD 15\")", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"), + DMI_MATCH(DMI_PRODUCT_SKU, "Surface_Laptop_4_1952:1953") + }, + }, ++ { ++ .ident = "Microsoft Surface Laptop 4 (AMD 13\")", ++ .matches = { ++ DMI_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"), ++ DMI_MATCH(DMI_PRODUCT_SKU, "Surface_Laptop_4_1958:1959") ++ }, ++ }, + {} + }; + +-- +2.33.0 + diff --git a/patches/5.14/0010-amd-s0ix.patch b/patches/5.14/0010-amd-s0ix.patch new file mode 100644 index 000000000..e3a73e67f --- /dev/null +++ b/patches/5.14/0010-amd-s0ix.patch @@ -0,0 +1,33 @@ +From d5e180201380b2ec10f34229eabcfa2fb8e85895 Mon Sep 17 00:00:00 2001 +From: Sachi King +Date: Sat, 29 May 2021 22:27:25 +1000 +Subject: [PATCH] platform/x86: amd-pmc: Add device HID for AMD PMC + +The Surface Laptop 4 appears to have used AMD0005 for the PMC instead of +the AMDI0005 which would match the ACPI ID Registry. + +AMD appears to have previously used "AMD" in a number of IDs in the past, +and AMD is not allocated to any other entity as an ID, so adding this ID +should not cause any harm. + +Signed-off-by: Sachi King +Patchset: amd-s0ix +--- + drivers/platform/x86/amd-pmc.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/platform/x86/amd-pmc.c b/drivers/platform/x86/amd-pmc.c +index 3481479a2942..1f4a1cd1f58d 100644 +--- a/drivers/platform/x86/amd-pmc.c ++++ b/drivers/platform/x86/amd-pmc.c +@@ -476,6 +476,7 @@ static const struct acpi_device_id amd_pmc_acpi_ids[] = { + {"AMDI0006", 0}, + {"AMDI0007", 0}, + {"AMD0004", 0}, ++ {"AMD0005", 0}, + { } + }; + MODULE_DEVICE_TABLE(acpi, amd_pmc_acpi_ids); +-- +2.33.0 +