300 lines
8.7 KiB
C
300 lines
8.7 KiB
C
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/*
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* Copyright (C) 2012-2017 ARM Limited or its affiliates.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _CC_CRYPTO_CTX_H_
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#define _CC_CRYPTO_CTX_H_
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#ifdef __KERNEL__
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#include <linux/types.h>
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#define INT32_MAX 0x7FFFFFFFL
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#else
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#include <stdint.h>
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#endif
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#ifndef max
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#define max(a, b) ((a) > (b) ? (a) : (b))
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#define min(a, b) ((a) < (b) ? (a) : (b))
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#endif
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/* context size */
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#ifndef CC_CTX_SIZE_LOG2
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#if (CC_SUPPORT_SHA > 256)
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#define CC_CTX_SIZE_LOG2 8
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#else
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#define CC_CTX_SIZE_LOG2 7
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#endif
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#endif
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#define CC_CTX_SIZE (1<<CC_CTX_SIZE_LOG2)
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#define CC_DRV_CTX_SIZE_WORDS (CC_CTX_SIZE >> 2)
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#define CC_DRV_DES_IV_SIZE 8
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#define CC_DRV_DES_BLOCK_SIZE 8
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#define CC_DRV_DES_ONE_KEY_SIZE 8
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#define CC_DRV_DES_DOUBLE_KEY_SIZE 16
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#define CC_DRV_DES_TRIPLE_KEY_SIZE 24
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#define CC_DRV_DES_KEY_SIZE_MAX CC_DRV_DES_TRIPLE_KEY_SIZE
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#define CC_AES_IV_SIZE 16
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#define CC_AES_IV_SIZE_WORDS (CC_AES_IV_SIZE >> 2)
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#define CC_AES_BLOCK_SIZE 16
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#define CC_AES_BLOCK_SIZE_WORDS 4
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#define CC_AES_128_BIT_KEY_SIZE 16
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#define CC_AES_128_BIT_KEY_SIZE_WORDS (CC_AES_128_BIT_KEY_SIZE >> 2)
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#define CC_AES_192_BIT_KEY_SIZE 24
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#define CC_AES_192_BIT_KEY_SIZE_WORDS (CC_AES_192_BIT_KEY_SIZE >> 2)
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#define CC_AES_256_BIT_KEY_SIZE 32
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#define CC_AES_256_BIT_KEY_SIZE_WORDS (CC_AES_256_BIT_KEY_SIZE >> 2)
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#define CC_AES_KEY_SIZE_MAX CC_AES_256_BIT_KEY_SIZE
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#define CC_AES_KEY_SIZE_WORDS_MAX (CC_AES_KEY_SIZE_MAX >> 2)
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#define CC_MD5_DIGEST_SIZE 16
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#define CC_SHA1_DIGEST_SIZE 20
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#define CC_SHA224_DIGEST_SIZE 28
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#define CC_SHA256_DIGEST_SIZE 32
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#define CC_SHA256_DIGEST_SIZE_IN_WORDS 8
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#define CC_SHA384_DIGEST_SIZE 48
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#define CC_SHA512_DIGEST_SIZE 64
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#define CC_SHA1_BLOCK_SIZE 64
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#define CC_SHA1_BLOCK_SIZE_IN_WORDS 16
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#define CC_MD5_BLOCK_SIZE 64
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#define CC_MD5_BLOCK_SIZE_IN_WORDS 16
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#define CC_SHA224_BLOCK_SIZE 64
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#define CC_SHA256_BLOCK_SIZE 64
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#define CC_SHA256_BLOCK_SIZE_IN_WORDS 16
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#define CC_SHA1_224_256_BLOCK_SIZE 64
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#define CC_SHA384_BLOCK_SIZE 128
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#define CC_SHA512_BLOCK_SIZE 128
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#if (CC_SUPPORT_SHA > 256)
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#define CC_DIGEST_SIZE_MAX CC_SHA512_DIGEST_SIZE
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#define CC_HASH_BLOCK_SIZE_MAX CC_SHA512_BLOCK_SIZE /*1024b*/
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#else /* Only up to SHA256 */
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#define CC_DIGEST_SIZE_MAX CC_SHA256_DIGEST_SIZE
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#define CC_HASH_BLOCK_SIZE_MAX CC_SHA256_BLOCK_SIZE /*512b*/
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#endif
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#define CC_HMAC_BLOCK_SIZE_MAX CC_HASH_BLOCK_SIZE_MAX
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#define CC_MULTI2_SYSTEM_KEY_SIZE 32
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#define CC_MULTI2_DATA_KEY_SIZE 8
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#define CC_MULTI2_SYSTEM_N_DATA_KEY_SIZE (CC_MULTI2_SYSTEM_KEY_SIZE + CC_MULTI2_DATA_KEY_SIZE)
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#define CC_MULTI2_BLOCK_SIZE 8
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#define CC_MULTI2_IV_SIZE 8
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#define CC_MULTI2_MIN_NUM_ROUNDS 8
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#define CC_MULTI2_MAX_NUM_ROUNDS 128
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#define CC_DRV_ALG_MAX_BLOCK_SIZE CC_HASH_BLOCK_SIZE_MAX
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enum drv_engine_type {
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DRV_ENGINE_NULL = 0,
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DRV_ENGINE_AES = 1,
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DRV_ENGINE_DES = 2,
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DRV_ENGINE_HASH = 3,
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DRV_ENGINE_RC4 = 4,
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DRV_ENGINE_DOUT = 5,
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DRV_ENGINE_RESERVE32B = INT32_MAX,
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};
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enum drv_crypto_alg {
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DRV_CRYPTO_ALG_NULL = -1,
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DRV_CRYPTO_ALG_AES = 0,
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DRV_CRYPTO_ALG_DES = 1,
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DRV_CRYPTO_ALG_HASH = 2,
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DRV_CRYPTO_ALG_C2 = 3,
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DRV_CRYPTO_ALG_HMAC = 4,
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DRV_CRYPTO_ALG_AEAD = 5,
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DRV_CRYPTO_ALG_BYPASS = 6,
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DRV_CRYPTO_ALG_NUM = 7,
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DRV_CRYPTO_ALG_RESERVE32B = INT32_MAX
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};
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enum drv_crypto_direction {
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DRV_CRYPTO_DIRECTION_NULL = -1,
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DRV_CRYPTO_DIRECTION_ENCRYPT = 0,
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DRV_CRYPTO_DIRECTION_DECRYPT = 1,
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DRV_CRYPTO_DIRECTION_DECRYPT_ENCRYPT = 3,
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DRV_CRYPTO_DIRECTION_RESERVE32B = INT32_MAX
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};
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enum drv_cipher_mode {
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DRV_CIPHER_NULL_MODE = -1,
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DRV_CIPHER_ECB = 0,
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DRV_CIPHER_CBC = 1,
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DRV_CIPHER_CTR = 2,
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DRV_CIPHER_CBC_MAC = 3,
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DRV_CIPHER_XTS = 4,
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DRV_CIPHER_XCBC_MAC = 5,
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DRV_CIPHER_OFB = 6,
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DRV_CIPHER_CMAC = 7,
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DRV_CIPHER_CCM = 8,
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DRV_CIPHER_CBC_CTS = 11,
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DRV_CIPHER_GCTR = 12,
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DRV_CIPHER_ESSIV = 13,
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DRV_CIPHER_BITLOCKER = 14,
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DRV_CIPHER_RESERVE32B = INT32_MAX
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};
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enum drv_hash_mode {
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DRV_HASH_NULL = -1,
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DRV_HASH_SHA1 = 0,
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DRV_HASH_SHA256 = 1,
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DRV_HASH_SHA224 = 2,
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DRV_HASH_SHA512 = 3,
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DRV_HASH_SHA384 = 4,
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DRV_HASH_MD5 = 5,
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DRV_HASH_CBC_MAC = 6,
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DRV_HASH_XCBC_MAC = 7,
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DRV_HASH_CMAC = 8,
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DRV_HASH_MODE_NUM = 9,
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DRV_HASH_RESERVE32B = INT32_MAX
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};
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enum drv_hash_hw_mode {
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DRV_HASH_HW_MD5 = 0,
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DRV_HASH_HW_SHA1 = 1,
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DRV_HASH_HW_SHA256 = 2,
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DRV_HASH_HW_SHA224 = 10,
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DRV_HASH_HW_SHA512 = 4,
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DRV_HASH_HW_SHA384 = 12,
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DRV_HASH_HW_GHASH = 6,
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DRV_HASH_HW_RESERVE32B = INT32_MAX
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};
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enum drv_multi2_mode {
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DRV_MULTI2_NULL = -1,
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DRV_MULTI2_ECB = 0,
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DRV_MULTI2_CBC = 1,
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DRV_MULTI2_OFB = 2,
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DRV_MULTI2_RESERVE32B = INT32_MAX
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};
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/* drv_crypto_key_type[1:0] is mapped to cipher_do[1:0] */
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/* drv_crypto_key_type[2] is mapped to cipher_config2 */
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enum drv_crypto_key_type {
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DRV_NULL_KEY = -1,
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DRV_USER_KEY = 0, /* 0x000 */
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DRV_ROOT_KEY = 1, /* 0x001 */
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DRV_PROVISIONING_KEY = 2, /* 0x010 */
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DRV_SESSION_KEY = 3, /* 0x011 */
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DRV_APPLET_KEY = 4, /* NA */
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DRV_PLATFORM_KEY = 5, /* 0x101 */
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DRV_CUSTOMER_KEY = 6, /* 0x110 */
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DRV_END_OF_KEYS = INT32_MAX,
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};
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enum drv_crypto_padding_type {
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DRV_PADDING_NONE = 0,
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DRV_PADDING_PKCS7 = 1,
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DRV_PADDING_RESERVE32B = INT32_MAX
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};
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/*******************************************************************/
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/***************** DESCRIPTOR BASED CONTEXTS ***********************/
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/*******************************************************************/
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/* Generic context ("super-class") */
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struct drv_ctx_generic {
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enum drv_crypto_alg alg;
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} __attribute__((__may_alias__));
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struct drv_ctx_hash {
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enum drv_crypto_alg alg; /* DRV_CRYPTO_ALG_HASH */
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enum drv_hash_mode mode;
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uint8_t digest[CC_DIGEST_SIZE_MAX];
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/* reserve to end of allocated context size */
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uint8_t reserved[CC_CTX_SIZE - 2 * sizeof(uint32_t) -
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CC_DIGEST_SIZE_MAX];
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};
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/* !!!! drv_ctx_hmac should have the same structure as drv_ctx_hash except
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k0, k0_size fields */
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struct drv_ctx_hmac {
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enum drv_crypto_alg alg; /* DRV_CRYPTO_ALG_HMAC */
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enum drv_hash_mode mode;
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uint8_t digest[CC_DIGEST_SIZE_MAX];
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uint32_t k0[CC_HMAC_BLOCK_SIZE_MAX/sizeof(uint32_t)];
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uint32_t k0_size;
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/* reserve to end of allocated context size */
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uint8_t reserved[CC_CTX_SIZE - 3 * sizeof(uint32_t) -
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CC_DIGEST_SIZE_MAX - CC_HMAC_BLOCK_SIZE_MAX];
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};
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struct drv_ctx_cipher {
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enum drv_crypto_alg alg; /* DRV_CRYPTO_ALG_AES */
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enum drv_cipher_mode mode;
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enum drv_crypto_direction direction;
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enum drv_crypto_key_type crypto_key_type;
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enum drv_crypto_padding_type padding_type;
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uint32_t key_size; /* numeric value in bytes */
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uint32_t data_unit_size; /* required for XTS */
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/* block_state is the AES engine block state.
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* It is used by the host to pass IV or counter at initialization.
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* It is used by SeP for intermediate block chaining state and for
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* returning MAC algorithms results. */
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uint8_t block_state[CC_AES_BLOCK_SIZE];
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uint8_t key[CC_AES_KEY_SIZE_MAX];
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uint8_t xex_key[CC_AES_KEY_SIZE_MAX];
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/* reserve to end of allocated context size */
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uint32_t reserved[CC_DRV_CTX_SIZE_WORDS - 7 -
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CC_AES_BLOCK_SIZE/sizeof(uint32_t) - 2 *
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(CC_AES_KEY_SIZE_MAX/sizeof(uint32_t))];
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};
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/* authentication and encryption with associated data class */
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struct drv_ctx_aead {
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enum drv_crypto_alg alg; /* DRV_CRYPTO_ALG_AES */
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enum drv_cipher_mode mode;
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enum drv_crypto_direction direction;
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uint32_t key_size; /* numeric value in bytes */
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uint32_t nonce_size; /* nonce size (octets) */
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uint32_t header_size; /* finit additional data size (octets) */
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uint32_t text_size; /* finit text data size (octets) */
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uint32_t tag_size; /* mac size, element of {4, 6, 8, 10, 12, 14, 16} */
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/* block_state1/2 is the AES engine block state */
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uint8_t block_state[CC_AES_BLOCK_SIZE];
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uint8_t mac_state[CC_AES_BLOCK_SIZE]; /* MAC result */
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uint8_t nonce[CC_AES_BLOCK_SIZE]; /* nonce buffer */
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uint8_t key[CC_AES_KEY_SIZE_MAX];
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/* reserve to end of allocated context size */
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uint32_t reserved[CC_DRV_CTX_SIZE_WORDS - 8 -
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3 * (CC_AES_BLOCK_SIZE/sizeof(uint32_t)) -
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CC_AES_KEY_SIZE_MAX/sizeof(uint32_t)];
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};
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/*******************************************************************/
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/***************** MESSAGE BASED CONTEXTS **************************/
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/*******************************************************************/
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/* Get the address of a @member within a given @ctx address
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@ctx: The context address
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@type: Type of context structure
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@member: Associated context field */
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#define GET_CTX_FIELD_ADDR(ctx, type, member) (ctx + offsetof(type, member))
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#endif /* _CC_CRYPTO_CTX_H_ */
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