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https://github.com/LadybirdBrowser/ladybird.git
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3cc5752a69
The goal was to reduce common setup of messages. Changes: * MailBox turned into singleton to follow existing patterns * Removed device specific messages from MailBox requiring clients to know the details instead * Created base Message class which clients should deriver from It really simplify the usage for more complicated message queues like framebuffer setup - see followup commits.
163 lines
4.7 KiB
C++
163 lines
4.7 KiB
C++
/*
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* Copyright (c) 2021, Nico Weber <thakis@chromium.org>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#include <Kernel/Prekernel/Arch/aarch64/GPIO.h>
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#include <Kernel/Prekernel/Arch/aarch64/MMIO.h>
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#include <Kernel/Prekernel/Arch/aarch64/Timer.h>
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#include <Kernel/Prekernel/Arch/aarch64/UART.h>
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namespace Prekernel {
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// "13.4 Register View" / "11.5 Register View"
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struct UARTRegisters {
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u32 data;
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u32 receive_status_or_error_clear;
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u32 unused[4];
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u32 flag;
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u32 unused2;
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u32 unused_ilpr;
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u32 integer_baud_rate_divisor; // Only the lowest 16 bits are used.
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u32 fractional_baud_rate_divisor; // Only the lowest 6 bits are used.
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u32 line_control;
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u32 control;
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u32 interrupt_fifo_level_select;
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u32 interrupt_mask_set_clear;
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u32 raw_interrupt_status;
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u32 masked_interrupt_status;
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u32 interrupt_clear;
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u32 dma_control;
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u32 test_control;
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};
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// Bits of the `flag` register.
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// See "FR register" in Broadcom doc for details.
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enum FlagBits {
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ClearToSend = 1 << 0,
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UnsupportedDSR = 1 << 1,
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UnsupportedDCD = 1 << 2,
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UARTBusy = 1 << 3,
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ReceiveFifoEmpty = 1 << 4,
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TransmitFifoFull = 1 << 5,
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ReceiveFifoFull = 1 << 6,
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TransmitFifoEmpty = 1 << 7,
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};
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// Bits for the `line_control` register.
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// See "LCRH register" in Broadcom doc for details.
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enum LineControlBits {
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SendBreak = 1 << 0,
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EnableParityCheckingAndGeneration = 1 << 1,
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EvenParity = 1 << 2,
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TransmitTwoStopBits = 1 << 3,
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EnableFIFOs = 1 << 4,
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WordLength5Bits = 0b00 << 5,
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WordLength6Bits = 0b01 << 5,
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WordLength7Bits = 0b10 << 5,
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WordLength8Bits = 0b11 << 5,
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StickParity = 1 << 7,
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};
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// Bits for the `control` register.
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// See "CR register" in Broadcom doc for details. From there:
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// NOTE: Program the control registers as follows:
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// 1. Disable the UART.
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// 2. Wait for the end of transmission or reception of the current character.
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// 3. Flush the transmit FIFO by setting the FEN bit to 0 in the Line Control Register, UART_LCRH.
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// 4. Reprogram the Control Register, UART_CR.
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// 5. Enable the UART
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enum ControlBits {
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UARTEnable = 1 << 0,
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UnsupportedSIREN = 1 << 1,
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UnsupportedSIRLP = 1 << 2,
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// Bits 3-6 are reserved.
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LoopbackEnable = 1 << 7,
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TransmitEnable = 1 << 8,
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ReceiveEnable = 1 << 9,
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UnsupportedDTR = 1 << 10,
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RequestToSend = 1 << 11,
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UnsupportedOut1 = 1 << 12,
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UnsupportedOut2 = 1 << 13,
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RTSHardwareFlowControlEnable = 1 << 14,
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CTSHardwareFlowControlEnable = 1 << 15,
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};
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UART::UART()
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: m_registers(MMIO::the().peripheral<UARTRegisters>(0x20'1000))
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{
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// Disable UART while changing configuration.
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m_registers->control = 0;
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// FIXME: Should wait for current transmission to end and should flush FIFO.
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constexpr int baud_rate = 115'200;
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// Set UART clock so that the baud rate divisor ends up as 1.0.
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// FIXME: Not sure if this is a good UART clock rate.
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u32 rate_in_hz = Timer::the().set_clock_rate(Timer::ClockID::UART, 16 * baud_rate);
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// The BCM's PL011 UART is alternate function 0 on pins 14 and 15.
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auto& gpio = Prekernel::GPIO::the();
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gpio.set_pin_function(14, Prekernel::GPIO::PinFunction::Alternate0);
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gpio.set_pin_function(15, Prekernel::GPIO::PinFunction::Alternate0);
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gpio.set_pin_pull_up_down_state(Array { 14, 15 }, Prekernel::GPIO::PullUpDownState::Disable);
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// Clock and pins are configured. Turn UART on.
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set_baud_rate(baud_rate, rate_in_hz);
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m_registers->line_control = EnableFIFOs | WordLength8Bits;
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m_registers->control = UARTEnable | TransmitEnable | ReceiveEnable;
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}
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UART& UART::the()
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{
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static UART instance;
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return instance;
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}
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void UART::send(u32 c)
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{
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wait_until_we_can_send();
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m_registers->data = c;
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}
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u32 UART::receive()
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{
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wait_until_we_can_receive();
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// Mask out error bits.
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return m_registers->data & 0xFF;
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}
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void UART::set_baud_rate(int baud_rate, int uart_frequency_in_hz)
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{
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// Broadcom doc: """Baud rate divisor BAUDDIV = (FUARTCLK/(16 * Baud rate))""".
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// BAUDDIV is stored as a 16.6 fixed point value, so do computation scaled by (1 << 6) == 64.
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// 64*(FUARTCLK/(16 * Baud rate)) == 4*FUARTCLK/(Baud rate). For rounding, add 0.5 == (Baud rate/2)/(Baud rate).
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u32 baud_rate_divisor_fixed_point = (4 * uart_frequency_in_hz + baud_rate / 2) / baud_rate;
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m_registers->integer_baud_rate_divisor = baud_rate_divisor_fixed_point / 64;
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m_registers->fractional_baud_rate_divisor = baud_rate_divisor_fixed_point % 64;
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}
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void UART::wait_until_we_can_send()
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{
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while (m_registers->flag & TransmitFifoFull)
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;
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}
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void UART::wait_until_we_can_receive()
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{
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while (m_registers->flag & ReceiveFifoEmpty)
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;
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}
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}
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