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07474b4349
First scan PCI bus 0. Find any device on that bus, and if it's a PCI-to-PCI bridge, recursively scan it too. Then try to handle Multiple PCI host bridges on slot 0, device 0. If we happen to miss some PCI buses because they are not reachable through recursive PCI-to-PCI bridges scanning starting from bus 0, we might find them in this scanning.
95 lines
3.2 KiB
C++
95 lines
3.2 KiB
C++
/*
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* Copyright (c) 2020, Liav A. <liavalb@hotmail.co.il>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#include <Kernel/Debug.h>
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#include <Kernel/IO.h>
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#include <Kernel/PCI/IOAccess.h>
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namespace Kernel {
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namespace PCI {
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UNMAP_AFTER_INIT void IOAccess::initialize()
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{
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if (!Access::is_initialized()) {
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new IOAccess();
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dbgln_if(PCI_DEBUG, "PCI: IO access initialised.");
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}
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}
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UNMAP_AFTER_INIT IOAccess::IOAccess()
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{
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dmesgln("PCI: Using I/O instructions for PCI configuration space access");
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enumerate_hardware([&](const Address& address, ID id) {
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m_physical_ids.append({ address, id, get_capabilities(address) });
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});
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}
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u8 IOAccess::read8_field(Address address, u32 field)
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{
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dbgln_if(PCI_DEBUG, "PCI: IO Reading 8-bit field {:#08x} for {}", field, address);
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return Access::early_read8_field(address, field);
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}
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u16 IOAccess::read16_field(Address address, u32 field)
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{
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dbgln_if(PCI_DEBUG, "PCI: IO Reading 16-bit field {:#08x} for {}", field, address);
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return Access::early_read16_field(address, field);
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}
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u32 IOAccess::read32_field(Address address, u32 field)
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{
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dbgln_if(PCI_DEBUG, "PCI: IO Reading 32-bit field {:#08x} for {}", field, address);
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return Access::early_read32_field(address, field);
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}
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void IOAccess::write8_field(Address address, u32 field, u8 value)
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{
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dbgln_if(PCI_DEBUG, "PCI: IO Writing to 8-bit field {:#08x}, value={:#02x} for {}", field, value, address);
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IO::out32(PCI_ADDRESS_PORT, address.io_address_for_field(field));
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IO::out8(PCI_VALUE_PORT + (field & 3), value);
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}
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void IOAccess::write16_field(Address address, u32 field, u16 value)
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{
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dbgln_if(PCI_DEBUG, "PCI: IO Writing to 16-bit field {:#08x}, value={:#02x} for {}", field, value, address);
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IO::out32(PCI_ADDRESS_PORT, address.io_address_for_field(field));
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IO::out16(PCI_VALUE_PORT + (field & 2), value);
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}
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void IOAccess::write32_field(Address address, u32 field, u32 value)
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{
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dbgln_if(PCI_DEBUG, "PCI: IO Writing to 32-bit field {:#08x}, value={:#02x} for {}", field, value, address);
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IO::out32(PCI_ADDRESS_PORT, address.io_address_for_field(field));
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IO::out32(PCI_VALUE_PORT, value);
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}
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void IOAccess::enumerate_hardware(Function<void(Address, ID)> callback)
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{
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dbgln_if(PCI_DEBUG, "PCI: IO enumerating hardware");
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// First scan bus 0. Find any device on that bus, and if it's a PCI-to-PCI
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// bridge, recursively scan it too.
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m_enumerated_buses.set(0, true);
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enumerate_bus(-1, 0, callback, true);
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// Handle Multiple PCI host bridges on slot 0, device 0.
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// If we happen to miss some PCI buses because they are not reachable through
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// recursive PCI-to-PCI bridges starting from bus 0, we might find them here.
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if ((read8_field(Address(), PCI_HEADER_TYPE) & 0x80) != 0) {
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for (int bus = 1; bus < 256; ++bus) {
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if (read16_field(Address(0, 0, 0, bus), PCI_VENDOR_ID) == PCI_NONE)
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continue;
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if (read16_field(Address(0, 0, 0, bus), PCI_CLASS) != 0x6)
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continue;
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if (m_enumerated_buses.get(bus))
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continue;
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enumerate_bus(-1, bus, callback, false);
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m_enumerated_buses.set(bus, true);
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}
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}
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}
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}
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}
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