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Kernel/Storage: Fix typos in HBA capabilities

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Luke 2021-03-18 00:55:05 +00:00 committed by Andreas Kling
parent 4ef0e4b62e
commit 64a240f4df
Notes: sideshowbarker 2024-07-18 21:15:01 +09:00 
Author: https://github.com/Lubrsi
Commit: https://github.com/SerenityOS/serenity/commit/64a240f4dfe
Pull-request: https://github.com/SerenityOS/serenity/pull/5855
2 changed files with 20 additions and 20 deletions
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6
Kernel/Storage/AHCI.h
View file

@ -340,7 +340,7 @@ enum CommandHeaderAttributes : u16 {
R = (1 << 8) /* Reset */
};
enum HBACapabilites : u32 {
enum HBACapabilities : u32 {
S64A = (u32)1 << 31, /* Supports 64-bit Addressing */
SNCQ = 1 << 30, /* Supports Native Command Queuing */
SSNTF = 1 << 29, /* Supports SNotification Register */
@ -372,11 +372,11 @@ struct [[gnu::packed]] HBADefinedCapabilities {
bool slumber_state_capable : 1 { false };
bool pio_multiple_drq_block : 1 { false };
bool fis_based_switching_supported : 1 { false };
bool port_multilier_supported : 1 { false };
bool port_multiplier_supported : 1 { false };
bool ahci_mode_only : 1 { true };
bool command_list_override_supported : 1 { false };
bool activity_led_supported : 1 { false };
bool aggerssive_link_power_management_supported : 1 { false };
bool aggressive_link_power_management_supported : 1 { false };
bool staggered_spin_up_supported : 1 { false };
bool mechanical_presence_switch_supported : 1 { false };
bool snotification_register_supported : 1 { false };

34
Kernel/Storage/AHCIController.cpp
View file

@ -113,23 +113,23 @@ AHCI::HBADefinedCapabilities AHCIController::capabilities() const
(capabilities & 0b11111) + 1,
((capabilities >> 8) & 0b11111) + 1,
(u8)((capabilities >> 20) & 0b1111),
(capabilities & (u32)(AHCI::HBACapabilites::SXS)) != 0,
(capabilities & (u32)(AHCI::HBACapabilites::EMS)) != 0,
(capabilities & (u32)(AHCI::HBACapabilites::CCCS)) != 0,
(capabilities & (u32)(AHCI::HBACapabilites::PSC)) != 0,
(capabilities & (u32)(AHCI::HBACapabilites::SSC)) != 0,
(capabilities & (u32)(AHCI::HBACapabilites::PMD)) != 0,
(capabilities & (u32)(AHCI::HBACapabilites::FBSS)) != 0,
(capabilities & (u32)(AHCI::HBACapabilites::SPM)) != 0,
(capabilities & (u32)(AHCI::HBACapabilites::SAM)) != 0,
(capabilities & (u32)(AHCI::HBACapabilites::SCLO)) != 0,
(capabilities & (u32)(AHCI::HBACapabilites::SAL)) != 0,
(capabilities & (u32)(AHCI::HBACapabilites::SALP)) != 0,
(capabilities & (u32)(AHCI::HBACapabilites::SSS)) != 0,
(capabilities & (u32)(AHCI::HBACapabilites::SMPS)) != 0,
(capabilities & (u32)(AHCI::HBACapabilites::SSNTF)) != 0,
(capabilities & (u32)(AHCI::HBACapabilites::SNCQ)) != 0,
(capabilities & (u32)(AHCI::HBACapabilites::S64A)) != 0
(capabilities & (u32)(AHCI::HBACapabilities::SXS)) != 0,
(capabilities & (u32)(AHCI::HBACapabilities::EMS)) != 0,
(capabilities & (u32)(AHCI::HBACapabilities::CCCS)) != 0,
(capabilities & (u32)(AHCI::HBACapabilities::PSC)) != 0,
(capabilities & (u32)(AHCI::HBACapabilities::SSC)) != 0,
(capabilities & (u32)(AHCI::HBACapabilities::PMD)) != 0,
(capabilities & (u32)(AHCI::HBACapabilities::FBSS)) != 0,
(capabilities & (u32)(AHCI::HBACapabilities::SPM)) != 0,
(capabilities & (u32)(AHCI::HBACapabilities::SAM)) != 0,
(capabilities & (u32)(AHCI::HBACapabilities::SCLO)) != 0,
(capabilities & (u32)(AHCI::HBACapabilities::SAL)) != 0,
(capabilities & (u32)(AHCI::HBACapabilities::SALP)) != 0,
(capabilities & (u32)(AHCI::HBACapabilities::SSS)) != 0,
(capabilities & (u32)(AHCI::HBACapabilities::SMPS)) != 0,
(capabilities & (u32)(AHCI::HBACapabilities::SSNTF)) != 0,
(capabilities & (u32)(AHCI::HBACapabilities::SNCQ)) != 0,
(capabilities & (u32)(AHCI::HBACapabilities::S64A)) != 0
};
}